IEEE Transactions on Very Large Scale Integration (VLSI) Systems, Volume 16

Volume 16, Number 1, January 2008

• Toomas P. Plaks:
  Guest Editorial Special Section on Configurable Computing Design- I: High-Level Reconfiguration. 1-2
  Electronic Edition (link) BibTeX
• Gerard K. Rauwerda, Paul M. Heysters, Gerard J. M. Smit:
  Towards Software Defined Radios Using Coarse-Grained Reconfigurable Hardware. 3-13
  Electronic Edition (link) BibTeX
• Mitchell J. Myjak, José G. Delgado-Frias:
  A Medium-Grain Reconfigurable Architecture for DSP: VLSI Design, Benchmark Mapping, and Performance. 14-23
  Electronic Edition (link) BibTeX
• Vincent Nollet, Prabhat Avasare, Hendrik Eeckhaut, Diederik Verkest, Henk Corporaal:
  Run-Time Management of a MPSoC Containing FPGA Fabric Tiles. 24-33
  Electronic Edition (link) BibTeX
• David L. Andrews, Ron Sass, Erik Anderson, Jason Agron, Wesley Peck, Jim Stevens, Fabrice Baijot, Ed Komp:
  Achieving Programming Model Abstractions for Reconfigurable Computing. 34-44
  Electronic Edition (link) BibTeX
• Jingzhao Ou, Viktor K. Prasanna:
  A Cooperative Management Scheme for Power Efficient Implementations of Real-Time Operating Systems on Soft Processors. 45-56
  Electronic Edition (link) BibTeX
• Sherif Yusuf, Wayne Luk, Morris Sloman, Naranker Dulay, Emil C. Lupu, Geoffrey Brown:
  Reconfigurable Architecture for Network Flow Analysis. 57-65
  Electronic Edition (link) BibTeX
• Justin L. Tripp, Maya Gokhale, Anders A. Hansson:
  A Case Study of Hardware/Software Partitioning of Traffic Simulation on the Cray XD1. 66-74
  Electronic Edition (link) BibTeX
• Sami Khawam, Ioannis Nousias, Mark Milward, Ying Yi, Mark Muir, Tughrul Arslan:
  The Reconfigurable Instruction Cell Array. 75-85
  Electronic Edition (link) BibTeX
• Kanak Agarwal, Sani R. Nassif:
  The Impact of Random Device Variation on SRAM Cell Stability in Sub-90-nm CMOS Technologies. 86-97
  Electronic Edition (link) BibTeX
• Irith Pomeranz, Sudhakar M. Reddy:
  Transition Path Delay Faults: A New Path Delay Fault Model for Small and Large Delay Defects. 98-107
  Electronic Edition (link) BibTeX
• C.-Y. Chang, H.-M. Chen:
  Design Migration From Peripheral ASIC Design to Area-I/O Flip-Chip Design by Chip I/O Planning and Legalization. 108-112
  Electronic Edition (link) BibTeX

Volume 16, Number 2, February 2008

• Toomas P. Plaks:
  Guest Editorial Special Section on Configurable Computing Design-II: Hardware Level Reconfiguration. 113-114
  Electronic Edition (link) BibTeX
• Paul Beckett:
  A Low-Power Reconfigurable Logic Array Based on Double-Gate Transistors. 115-123
  Electronic Edition (link) BibTeX
• Yan Lin, Lei He, Mike Hutton:
  Stochastic Physical Synthesis Considering Prerouting Interconnect Uncertainty and Process Variation for FPGAs. 124-133
  Electronic Edition (link) BibTeX
• Peter Zipf:
  Applying Dynamic Reconfiguration for Fault Tolerance in Fine-Grained Logic Arrays. 134-143
  Electronic Edition (link) BibTeX
• Guy Gogniat, Tilman Wolf, Wayne P. Burleson, Jean-Philippe Diguet, Lilian Bossuet, Romain Vaslin:
  Reconfigurable Hardware for High-Security/ High-Performance Embedded Systems: The SAFES Perspective. 144-155
  Electronic Edition (link) BibTeX
• Ioannis Sourdis, Dionisios N. Pnevmatikatos, Stamatis Vassiliadis:
  Scalable Multigigabit Pattern Matching for Packet Inspection. 156-166
  Electronic Edition (link) BibTeX
• Ronald Scrofano, Ling Zhuo, Viktor K. Prasanna:
  Area-Efficient Arithmetic Expression Evaluation Using Deeply Pipelined Floating-Point Cores. 167-176
  Electronic Edition (link) BibTeX
• Michael J. Beauchamp, Scott Hauck, Keith D. Underwood, K. Scott Hemmert:
  Architectural Modifications to Enhance the Floating-Point Performance of FPGAs. 177-187
  Electronic Edition (link) BibTeX
• X. Huang, C. Liang, J. Ma:
  System Architecture and Implementation of MIMO Sphere Decoders on FPGA. 188-197
  Electronic Edition (link) BibTeX
• W. N. Chelton, M. Benaissa:
  Fast Elliptic Curve Cryptography on FPGA. 198-205
  Electronic Edition (link) BibTeX
• Jie Gu, John Keane, Sachin S. Sapatnekar, Chris H. Kim:
  Statistical Leakage Estimation of Double Gate FinFET Devices Considering the Width Quantization Property. 206-209
  Electronic Edition (link) BibTeX
• Saralees Nadarajah, Samuel Kotz:
  Exact Distribution of the Max/Min of Two Gaussian Random Variables. 210-212
  Electronic Edition (link) BibTeX