ACM Transactions on Architecture and Code Optimization (TACO), Volume 5

Volume 5, Number 1, May 2008

• Brad Calder, Dean M. Tullsen:
  Editorial.
  
• Shashidhar Mysore, Banit Agrawal, Rodolfo Neuber, Timothy Sherwood, Nisheeth Shrivastava, Subhash Suri:
  Formulating and implementing profiling over adaptive ranges.
  
• Antonia Zhai, J. Gregory Steffan, Christopher B. Colohan, Todd C. Mowry:
  Compiler and hardware support for reducing the synchronization of speculative threads.
  
• Jonathan A. Winter, David H. Albonesi:
  Addressing thermal nonuniformity in SMT workloads.
  
• Asadollah Shahbahrami, Ben H. H. Juurlink, Stamatis Vassiliadis:
  Versatility of extended subwords and the matrix register file.
  
• Zhi Guo, Walid A. Najjar, Betul Buyukkurt:
  Efficient hardware code generation for FPGAs.
  
• Thomas Kotzmann, Christian Wimmer, Hanspeter Mössenböck, Thomas Rodriguez, Kenneth Russell, David Cox:
  Design of the Java HotSpot™ client compiler for Java 6.
  

Volume 5, Number 2, August 2008

• Ram Rangan, Neil Vachharajani, Guilherme Ottoni, David I. August:
  Performance scalability of decoupled software pipelining.
  
• Jieyi Long, Seda Ogrenci Memik, Gokhan Memik, Rajarshi Mukherjee:
  Thermal monitoring mechanisms for chip multiprocessors.
  
• Ajay Joshi, Lieven Eeckhout, Robert H. Bell Jr., Lizy Kurian John:
  Distilling the essence of proprietary workloads into miniature benchmarks.
  
• Vincenzo Catania, Maurizio Palesi, Davide Patti:
  Reducing complexity of multiobjective design space exploration in VLIW-based embedded systems.
  

Volume 5, Number 3, November 2008

• Jacob Leverich, Hideho Arakida, Alex Solomatnikov, Amin Firoozshahian, Mark Horowitz, Christos Kozyrakis:
  Comparative evaluation of memory models for chip multiprocessors.
  
• Joseph J. Sharkey, Jason Loew, Dmitry V. Ponomarev:
  Reducing register pressure in SMT processors through L2-miss-driven early register release.
  
• Mojtaba Mehrara, Todd M. Austin:
  Exploiting selective placement for low-cost memory protection.
  
• Hans Vandierendonck, André Seznec:
  Speculative return address stack management revisited.
  

Volume 5, Number 4, March 2009

• Siddhartha Chhabra, Brian Rogers, Yan Solihin, Milos Prvulovic:
  Making secure processors OS- and performance-friendly.
  
• Daniel A. Jiménez:
  Generalizing neural branch prediction.
  
• Jinseong Jeon, Keoncheol Shin, Hwansoo Han:
  Abstracting access patterns of dynamic memory using regular expressions.
  
• Ghassan Shobaki, Kent D. Wilken, Mark Heffernan:
  Optimal trace scheduling using enumeration.