Microprocessing and Microprogramming, Volume 41

Volume 41, Number 1, April 1995

Mariagiovanna Sami, Lutz Richter:
Letter from the editors-in-chief. 1-3
K. W. Ng, C. K. Luk:
A survey of languages integrating functional, object-oriented and logic programming. 5-36
Shih-Hsu Huang, Cheng-Tsung Hwang, Yu-Chin Hsu, Yen-Jen Oyang:
A new approach to schedule operations across nested-ifs and nested-loops. 37-52
Brian A. Coghlan, Jeremy Jones:
Stable memory for a disk write cache. 53-70
Philippe Olivier Alexandre Navaux, César A. F. De Rose, Gerson G. H. Cavalheiro:
Performance evaluation in image processing with GAPP array processor. 71-82
Ananta K. Majhi, Lalit M. Patnaik, Srilata Raman:
A genetic algorithm-based circuit partitioner for MCMs. 83-96
Robert Manger, Mladen Grbic, Vito Leonardo Plantamura, Branko Soucek:
A parallel SVD algorithm and its application to financial ratio analysis. 97-106

John G. Vaughan:
Incorporating job sizes in distributed load balancing. 111-119
Jang-Suk Park, Gwang Seon Ahn:
A software-controlled prefetching mechanism for software-managed TLBs. 121-136
C. P. Ravikumar, Naresh Vedi:
Heuristic and neural algorithms for mapping tasks to a reconfigurable array. 137-151
H. T. Verges, D. Nikolos:
Efficient fault tolerant cache memory design. 153-169
Constantinos V. Papadopoulos:
On the routing of signals in parallel processor meshes. 171-189

Ranjani Parthasarathi, Ashok Jhunjhunwala:
Modified straight division: A computer implementation of multiple-precision division. 193-209
Weili Chu, Stamatis Vassiliadis, José G. Delgado-Frias:
The multi-associative branch target buffer: a cost effective BTB mechanism. 211-225
Jae Cheol Kwak, Songchun Moon:
Two-dimensional specification of queries in object-oriented databases. 227-244
Rushikesh K. Joshi, D. Janaki Ram:
Parset: A language construct for system independent parallel programming on distributed systems. 245-259

Reinhard Posch, Franz Pucher:
An experimental mixed purpose network. 263-271
S. K. Basu, Jayasree Dattagupta, R. Dattagupta:
On synthesizing cube and tree for parallel processing. 273-288
Q. Song, Eam Khwang Teoh, Dinesh P. Mital:
Multilayered neural network implementation on transputer systolic array. 289-299
Friedrich Mayer-Lindenberg:
A parallel computer based on simple DSP modules. 301-314
Jim-Min Lin, Shang-Rong Tsai:
Supporting user mobility in the Distributed Logical Machine System. 315-330

Francky Catthoor, Marc Moonen:
Parallel programmable architectures and compilation for multi-dimensional processing. 333-337
Joachim König, Lothar Thiele:
Algorithm-architecture co-design by example: a coprocessor for on-line arithmetic. 339-357
Thibault Duboux, Afonso Ferreira, Michel Gastaldo:
A scalable design for VLSI dictionary machines. 359-372
Kees A. Vissers, Gerben Essink, P. van Gerwen, P. J. M. Janssen, O. Popp, E. Riddersma, W. J. M. Smits, Harry J. M. Veendrick:
Architecture and programming of two generations video signal processors. 373-390
Johannes Kneip, Martin Ohmacht, Karsten Rönner, Peter Pirsch:
Architecture and C++-programming environment of a highly parallel image signal processor. 391-408
Eddy de Greef, Francky Catthoor, Hugo De Man:
Mapping real-time motion estimation type algorithms to memory efficient, programmable multi-processor architectures. 409-423
Paul Feautrier:
Compiling for massively parallel architectures: a perspective. 425-439

Hong Shen:
Parallel K-set mutual range-join in hypercubes. 443-448
Myung-Kyun Kim, Hyunsoo Yoon, Seung Ryoul Maeng:
Bit-permute multistage interconnection networks. 449-468
R. K. Arora, Vimal K. Khanna:
Design of a kernel for implementing communication protocols. 469-485
Enrico Macii, Massimo Poncino:
Using connectivity and spectral methods to characterize the structure of sequential logic circuits. 487-500
Shih-Hsu Huang, Yu-Chin Hsu, Yen-Jen Oyang:
A new scheduling algorithm for synthesizing the control blocks of control-dominated circuits. 501-519

Peter Milligan, Stephen Winter:
Parallel systems engineering. 523-524
C. A. R. Hoare:
The logic of engineering design. 525-539
D. Conde, Rafael Menéndez de Llano, Michael González Harbour, José A. Gregorio:
A two-level programming strategy for distributed systems. 541-554
François Spies:
Modeling of optimal load balancing strategy using queueing theory. 555-570
Sergei Gorlatch:
From transformations to methodology in parallel program development: A case study. 571-588
Thomas Rauber, Gudula Rünger:
Deriving structured parallel implementations for numerical methods. 589-608
Yves Arrouye:
Scope: An extensible interactive environment for the performance evaluation of parallel systems. 609-623
Péter Kacsuk, Gábor Dózsa, Tibor Fadgyas:
Designing parallel programs by the graphical language GRAPNEL. 625-643
Salvatore Orlando, Raffaele Perego:
Exploiting partial replication in unbalanced parallel loop scheduling on multicomputer. 645-658
Alberto Broggi, Francesco Gregoretti:
Performance evaluation and optimization in low-cost cellular SIMD systems. 659-678

W. Liu, Erik F. Dirkx, Guido H. Petit, J. Tiberghien:
Modelling and performance assessment of large ATM switching networks on loosely-coupled parallel processors. 681-689
Humayun Khalid:
A neural network-based replacement strategy for high performance computer architectures. 691-702
Alexander Romanovsky:
Application specific conversation schemes for ADA programs. 703-713
Ye-In Chang:
A hybrid distributed mutual exclusion algorithm. 715-731
R. J. Dewhurst, Q. Shan:
An improved algorithm for evaluation of the product of an exponential function with an error function complement. 733-736
H. A. Barker, P. W. Grant, J. Song:
A graphical simulator for programmable logic controllers based on Petri nets. 737-756
Davide Anguita, Benedict A. Gomes:
Mixing floating- and fixed-point formats for neural network learning on neuroprocessors. 757-769