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Sungjoo Yoo Vis

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*2009
44EEJun-hee Yoo, Sungjoo Yoo, Kiyoung Choi: Multiprocessor System-on-Chip designs with active memory processors for higher memory efficiency. DAC 2009: 806-811
43EEWoo-Cheol Kwon, Sungjoo Yoo, Junhyung Um, Seh-Woong Jeong: In-network reorder buffer to improve overall NoC performance while resolving the in-order requirement problem. DATE 2009: 1058-1063
42EEJungsoo Kim, Sungjoo Yoo, Chong-Min Kyung: Program phase and runtime distribution-aware online DVFS for combined Vdd/Vbb scaling. DATE 2009: 417-422
41EEJungsoo Kim, Seungyong Oh, Sungjoo Yoo, Chong-Min Kyung: An Analytical Dynamic Scaling of Supply Voltage and Body Bias Based on Parallelism-Aware Workload and Runtime Distribution. IEEE Trans. on CAD of Integrated Circuits and Systems 28(4): 568-581 (2009)
2008
40EESoo-Kwan Eo, Sungjoo Yoo, Kyu-Myung Choi: An industrial perspective of power-aware reliable SoC design. ASP-DAC 2008: 555-557
39EEMinje Jun, Sungjoo Yoo, Eui-Young Chung: Mixed integer linear programming-based optimal topology synthesis of cascaded crossbar switches. ASP-DAC 2008: 583-588
38EEWoo-Cheol Kwon, Sungjoo Yoo, Sung-Min Hong, Byeong Min, Kyu-Myung Choi, Soo-Kwan Eo: A practical approach of memory access parallelization to exploit multiple off-chip DDR memories. DAC 2008: 447-452
37EEWoo-Cheol Kwon, Sung-Min Hong, Sungjoo Yoo, Byeong Min, Kyu-Myung Choi, Soo-Kwan Eo: An Open-Loop Flow Control Scheme Based on the Accurate Global Information of On-Chip Communication. DATE 2008: 1244-1249
36EESungpack Hong, Sungjoo Yoo, Byeong Bin, Kyu-Myung Choi, Soo-Kwan Eo, Taehwan Kim: Dynamic Voltage Scaling of Supply and Body Bias Exploiting Software Runtime Distribution. DATE 2008: 242-247
35EEDongwook Lee, Sungjoo Yoo, Kiyoung Choi: Entry control in network-on-chip for memory power reduction. ISLPED 2008: 171-176
2007
34EEJun-hee Yoo, Dongwook Lee, Sungjoo Yoo, Kiyoung Choi: Communication Architecture Synthesis of Cascaded Bus Matrix. ASP-DAC 2007: 171-177
2006
33EEIkhwan Lee, Hyunsuk Kim, Peng Yang, Sungjoo Yoo, Eui-Young Chung, Kyu-Myung Choi, Jeong-Taek Kong, Soo-Kwan Eo: PowerViP: Soc power estimation framework at transaction level. ASP-DAC 2006: 551-558
32EESungpack Hong, Sungjoo Yoo, Sheayun Lee, Sangwoo Lee, Hye Jeong Nam, Bum-Seok Yoo, Jaehyung Hwang, Donghyun Song, Janghwan Kim, Jeongeun Kim, HoonSang Jin, Kyu-Myung Choi, Jeong-Taek Kong, Soo-Kwan Eo: Creation and utilization of a virtual platform for embedded software optimization: : an industrial case study. CODES+ISSS 2006: 235-240
31EESungpack Hong, Sungjoo Yoo, HoonSang Jin, Kyu-Myung Choi, Jeong-Taek Kong, Soo-Kwan Eo: Runtime distribution-aware dynamic voltage scaling. ICCAD 2006: 587-594
2005
30EEYoungchul Cho, Sungjoo Yoo, Kiyoung Choi, Nacer-Eddine Zergainoh, Ahmed Amine Jerraya: Scheduler implementation in MP SoC design. ASP-DAC 2005: 151-156
29EEIuliana Bacivarov, Aimen Bouchhima, Sungjoo Yoo, Ahmed Amine Jerraya: ChronoSym: a new approach for fast and accurate SoC cosimulation. IJES 1(1/2): 103-111 (2005)
2004
28EEAimen Bouchhima, Sungjoo Yoo, Ahmed Amine Jerraya: Fast and accurate timed execution of high level embedded software using HW/SW interface simulation model. ASP-DAC 2004: 469-474
27EEMohamed-Wassim Youssef, Sungjoo Yoo, Arif Sasongko, Yanick Paviot, Ahmed Amine Jerraya: Debugging HW/SW interface for MPSoC: video encoder system design case study. DAC 2004: 908-913
26EESungjoo Yoo, Mohamed-Wassim Youssef, Aimen Bouchhima, Ahmed Amine Jerraya, Mario Diaz-Nava: Multi-Processor SoC Design Methodology Using a Concept of Two-Layer Hardware-Dependent Software. DATE 2004: 1382-1383
2003
25EESungjoo Yoo, Ahmed Amine Jerraya: Introduction to Hardware Abstraction Layers for SoC. DATE 2003: 10336-10337
24EESungjoo Yoo, Iuliana Bacivarov, Aimen Bouchhima, Yanick Paviot, Ahmed Amine Jerraya: Building Fast and Accurate SW Simulation Models Based on Hardware Abstraction Layer and Simulation Environment Abstraction Layer. DATE 2003: 10550-10555
23EEYoungchul Cho, Ganghee Lee, Sungjoo Yoo, Kiyoung Choi, Nacer-Eddine Zergainoh: Scheduling and Timing Analysis of HW/SW On-Chip Communication in MP SoC Design. DATE 2003: 20132-20137
2002
22EESunghyun Lee, Sungjoo Yoo, Kiyoung Choi: Reconfigurable SoC design with hierarchical FSM and synchronous dataflow model. CODES 2002: 199-204
21EEWander O. Cesário, Amer Baghdadi, Lovic Gauthier, Damien Lyonnard, Gabriela Nicolescu, Yanick Paviot, Sungjoo Yoo, Ahmed Amine Jerraya, Mario Diaz-Nava: Component-based design approach for multicore SoCs. DAC 2002: 789-794
20EESungjoo Yoo, Gabriela Nicolescu, Lovic Gauthier, Ahmed Amine Jerraya: Automatic Generation of Fast Timed Simulation Models for Operating Systems in SoC Design. DATE 2002: 620-627
19EESunghyun Lee, Kiyoung Choi, Sungjoo Yoo: An intra-task dynamic voltage scaling method for SoC design with hierarchical FSM and synchronous dataflow model. ISLPED 2002: 84-87
18EEAhmed Amine Jerraya, Sungjoo Yoo, Aimen Bouchhima, Gabriela Nicolescu: Validation in a Component-Based Design Flow for Multicore SoCs. ISSS 2002: 162-167
17EEGabriela Nicolescu, S. Martinez, Lobna Kriaa, Wassim Youssef, Sungjoo Yoo, Benoît Charlot, Ahmed Amine Jerraya: Application of Multi-Domain and Multi-Language Cosimulation to an Optical MEM Switch Design. VLSI Design 2002: 426-
16EEWander O. Cesário, Damien Lyonnard, Gabriela Nicolescu, Yanick Paviot, Sungjoo Yoo, Ahmed Amine Jerraya, Lovic Gauthier, Mario Diaz-Nava: Multiprocessor SoC Platforms: A Component-Based Design Approach. IEEE Design & Test of Computers 19(6): 52-63 (2002)
15EEGabriela Nicolescu, Kjetil Svarstad, Wander O. Cesário, Lovic Gauthier, Damien Lyonnard, Sungjoo Yoo, Philippe Coste, Ahmed Amine Jerraya: Desiderata pour la spécification et la conception des systèmes électroniques. Technique et Science Informatiques 21(3): 291-314 (2002)
2001
14EEPatrice Gerin, Sungjoo Yoo, Gabriela Nicolescu, Ahmed Amine Jerraya: Scalable and flexible cosimulation of SoC designs with heterogeneous multi-processor target architectures. ASP-DAC 2001: 63-68
13EESungjoo Yoo, Gabriela Nicolescu, Damien Lyonnard, Amer Baghdadi, Ahmed Amine Jerraya: A generic wrapper architecture for multi-processor SoC cosimulation and design. CODES 2001: 195-200
12EEDamien Lyonnard, Sungjoo Yoo, Amer Baghdadi, Ahmed Amine Jerraya: Automatic Generation of Application-Specific Architectures for Heterogeneous Multiprocessor System-on-Chip. DAC 2001: 518-523
11EELovic Gauthier, Sungjoo Yoo, Ahmed Amine Jerraya: Automatic generation and targeting of application specific operating systems and embedded systems software. DATE 2001: 679-685
10EEJinyong Jung, Sungjoo Yoo, Kiyoung Choi: Performance improvement of multi-processor systems cosimulation based on SW analysis. DATE 2001: 749-753
9EEGabriela Nicolescu, Sungjoo Yoo, Ahmed Amine Jerraya: Mixed-level cosimulation for fine gradual refinement of communication in SoC design. DATE 2001: 754-759
8EELovic Gauthier, Sungjoo Yoo, Ahmed Amine Jerraya: Automatic generation and targeting of application-specificoperating systems and embedded systems software. IEEE Trans. on CAD of Integrated Circuits and Systems 20(11): 1293-1301 (2001)
2000
7EEByungil Jeong, Sungjoo Yoo, Sunghyun Lee, Kiyoung Choi: Hardware-software cosynthesis for run-time incrementally reconfigurable FPGAs. ASP-DAC 2000: 169-174
6EESungjoo Yoo, Kyoungseok Rha, Youngchul Cho, Jinyong Jung, Kiyoung Choi: Performance estimation of multiple-cache IP-based systems: case study of an interdependency problem and application of an extended shared memory model. CODES 2000: 77-81
5EESungjoo Yoo, Jong-eun Lee, Jinyong Jung, Kyungseok Rha, Youngchul Cho, Kiyoung Choi: Fast Hardware-Software Coverification by Optimistic Execution of Real Processor. DATE 2000: 663-668
4EESungjoo Yoo, Kiyoung Choi, Dong Sam Ha: Performance improvement of geographically distributed cosimulation by hierarchically grouped messages. IEEE Trans. VLSI Syst. 8(5): 492-502 (2000)
1999
3EESungjoo Yoo, Kiyoung Choi: Optimizing geographically distributed timed cosimulation by hierarchically grouped messages. CODES 1999: 100-104
2EEByungil Jeong, Sungjoo Yoo, Kiyoung Choi: Exploiting Early Partial Reconfiguration of Run-Time Reconfigurable FPGAs in Embedded Systems Design. FPGA 1999: 247
1998
1EESungjoo Yoo, Kiyoung Choi: Optimistic distributed timed cosimulation based on thread simulation model. CODES 1998: 71-75

Coauthor Index

1Iuliana Bacivarov [24] [29]
2Amer Baghdadi [12] [13] [21]
3Byeong Bin [36]
4Aimen Bouchhima [18] [24] [26] [28] [29]
5Wander O. Cesário [15] [16] [21]
6Benoît Charlot [17]
7Youngchul Cho [5] [6] [23] [30]
8Kiyoung Choi [1] [2] [3] [4] [5] [6] [7] [10] [19] [22] [23] [30] [34] [35] [44]
9Kyu-Myung Choi [31] [32] [33] [36] [37] [38] [40]
10Eui-Young Chung [33] [39]
11Philippe Coste [15]
12Mario Diaz-Nava [16] [21] [26]
13Soo-Kwan Eo [31] [32] [33] [36] [37] [38] [40]
14Lovic Gauthier [8] [11] [15] [16] [20] [21]
15Patrice Gerin [14]
16Dong Sam Ha [4]
17Sung-Min Hong [37] [38]
18Sungpack Hong [31] [32] [36]
19Jaehyung Hwang [32]
20Byungil Jeong [2] [7]
21Seh-Woong Jeong [43]
22Ahmed Amine Jerraya [8] [9] [11] [12] [13] [14] [15] [16] [17] [18] [20] [21] [24] [25] [26] [27] [28] [29] [30]
23HoonSang Jin [31] [32]
24Minje Jun [39]
25Jinyong Jung [5] [6] [10]
26Hyunsuk Kim [33]
27Janghwan Kim [32]
28Jeongeun Kim [32]
29Jungsoo Kim [41] [42]
30Taehwan Kim [36]
31Jeong-Taek Kong [31] [32] [33]
32Lobna Kriaa [17]
33Woo-Cheol Kwon [37] [38] [43]
34Chong-Min Kyung [41] [42]
35Dongwook Lee [34] [35]
36Ganghee Lee [23]
37Ikhwan Lee [33]
38Jong-eun Lee [5]
39Sangwoo Lee [32]
40Sheayun Lee [32]
41Sunghyun Lee [7] [19] [22]
42Damien Lyonnard [12] [13] [15] [16] [21]
43S. Martinez [17]
44Byeong Min [37] [38]
45Hye Jeong Nam [32]
46Gabriela Nicolescu [9] [13] [14] [15] [16] [17] [18] [20] [21]
47Seungyong Oh [41]
48Yanick Paviot [16] [21] [24] [27]
49Kyoungseok Rha [6]
50Kyungseok Rha [5]
51Arif Sasongko [27]
52Donghyun Song [32]
53Kjetil Svarstad [15]
54Junhyung Um [43]
55Peng Yang [33]
56Bum-Seok Yoo [32]
57Jun-hee Yoo [34] [44]
58Mohamed-Wassim Youssef [26] [27]
59Wassim Youssef [17]
60Nacer-Eddine Zergainoh [23] [30]

Colors in the list of coauthors

Copyright © Tue Nov 3 08:52:44 2009 by Michael Ley (ley@uni-trier.de)