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Yutaka Yamada Vis

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*2009
6EEHiroki Matsutani, Michihiro Koibuchi, Yutaka Yamada, D. Frank Hsu, Hideharu Amano: Fat H-Tree: A Cost-Efficient Tree-Based On-Chip Network. IEEE Trans. Parallel Distrib. Syst. 20(8): 1126-1141 (2009)
2006
5EEMichihiro Koibuchi, Kenichiro Anjo, Yutaka Yamada, Akiya Jouraku, Hideharu Amano: A Simple Data Transfer Technique Using Local Address for Networks-on-Chips. IEEE Trans. Parallel Distrib. Syst. 17(12): 1425-1437 (2006)
2005
4EEHiroki Matsutani, Michihiro Koibuchi, Yutaka Yamada, Akiya Jouraku, Hideharu Amano: Non-Minimal Routing Strategy for Application-Specific Networks-on-Chips. ICPP Workshops 2005: 273-280
2004
3EEYutaka Yamada, Hideharu Amano, Michihiro Koibuchi, Akiya Jouraku, Kenichiro Anjo, Katsunobu Nishimura: Folded Fat H-Tree: An Interconnection Topology for Dynamically Reconfigurable Processor Array. EUC 2004: 301-311
2EENoriaki Suzuki, Shunsuke Kurotaki, Masayasu Suzuki, Naoto Kaneko, Yutaka Yamada, Katsuaki Deguchi, Yohei Hasegawa, Hideharu Amano, Kenichiro Anjo, Masato Motomura, Kazutoshi Wakabayashi, Takeo Toi, Toru Awashima: Implementing and Evaluating Stream Applications on the Dynamically Reconfigurable Processor. FCCM 2004: 328-329
1EEKenichiro Anjo, Yutaka Yamada, Michihiro Koibuchi, Akiya Jouraku, Hideharu Amano: BLACK-BUS: A New Data-Transfer Technique Using Local Address on Networks-on-Chips. IPDPS 2004

Coauthor Index

1Hideharu Amano [1] [2] [3] [4] [5] [6]
2Kenichiro Anjo [1] [2] [3] [5]
3Toru Awashima [2]
4Katsuaki Deguchi [2]
5Yohei Hasegawa [2]
6D. Frank Hsu [6]
7Akiya Jouraku [1] [3] [4] [5]
8Naoto Kaneko [2]
9Michihiro Koibuchi [1] [3] [4] [5] [6]
10Shunsuke Kurotaki [2]
11Hiroki Matsutani [4] [6]
12Masato Motomura [2]
13Katsunobu Nishimura [3]
14Masayasu Suzuki [2]
15Noriaki Suzuki [2]
16Takeo Toi [2]
17Kazutoshi Wakabayashi [2]

Copyright © Tue Nov 3 08:52:44 2009 by Michael Ley (ley@uni-trier.de)