Chun Xue

2007
28	EE	Meikang Qiu, Chun Xue, Zili Shao, Edwin Hsing-Mean Sha: Energy minimization with soft real-time and DVS for uniprocessor and multiprocessor embedded systems. DATE 2007: 1641-1646
27	EE	Guochen Hua, Meng Wang, Zili Shao, Hui Liu, Chun Xue: Real-Time Loop Scheduling with Energy Optimization Via DVS and ABB for Multi-core Embedded System. EUC 2007: 1-12
26	EE	Chun Xue, Zili Shao, Meilin Liu, Qingfeng Zhuge, Edwin Hsing-Mean Sha: Parallel Network Intrusion Detection on Reconfigurable Platforms. EUC 2007: 75-86
25	EE	Meng Wang, Zili Shao, Chun Xue, Edwin Hsing-Mean Sha: Real-Time Loop Scheduling with Leakage Energy Minimization for Embedded VLIW DSP Processors. RTCSA 2007: 12-19
24	EE	Meikang Qiu, Zhiping Jia, Chun Xue, Zili Shao, Edwin Hsing-Mean Sha: Voltage Assignment with Guaranteed Probability Satisfying Timing Constraint for Real-time Multiproceesor DSP. VLSI Signal Processing 46(1): 55-73 (2007)
23	EE	Chun Xue, Zili Shao, Edwin Hsing-Mean Sha: Maximize Parallelism Minimize Overhead for Nested Loops via Loop Striping. VLSI Signal Processing 47(2): 153-167 (2007)
2006
22	EE	Mei Kang Qiu, Chun Xue, Qingfeng Zhuge, Zili Shao, Meilin Liu, Edwin Hsing-Mean Sha: Voltage Assignment and Loop Scheduling for Energy Minimization while Satisfying Timing Constraint with Guaranteed Probability. ASAP 2006: 178-181
21	EE	Mei Kang Qiu, Chun Xue, Zili Shao, Qingfeng Zhuge, Meilin Liu, Edwin Hsing-Mean Sha: Efficent Algorithm of Energy Minimization for Heterogeneous Wireless Sensor Network. EUC 2006: 25-34
20	EE	Chun Xue, Zili Shao, Meilin Liu, Mei Kang Qiu, Edwin Hsing-Mean Sha: Loop Striping: Maximize Parallelism for Nested Loops. EUC 2006: 405-414
19	EE	Chun Xue, Zili Shao, Meilin Liu, Mei Kang Qiu, Edwin Hsing-Mean Sha: Loop Scheduling with Complete Memory Latency Hiding on Multi-core Architecture. ICPADS (1) 2006: 375-382
18		Meilin Liu, Chun Xue, Edwin Hsing-Mean Sha: Optimizing Timing and Code Size Using Maximum Direct Loop Fusion. ISCA PDCS 2006: 38-43
17	EE	Zili Shao, Bin Xiao, Chun Xue, Qingfeng Zhuge, Edwin Hsing-Mean Sha: Loop scheduling with timing and switching-activity minimization for VLIW DSP. ACM Trans. Design Autom. Electr. Syst. 11(1): 165-185 (2006)
16	EE	Zili Shao, Chun Xue, Qingfeng Zhuge, Mei Kang Qiu, Bin Xiao, Edwin Hsing-Mean Sha: Security Protection and Checking for Embedded System Integration against Buffer Overflow Attacks via Hardware/Software. IEEE Trans. Computers 55(4): 443-453 (2006)
15	EE	Zili Shao, Jiannong Cao, Keith C. C. Chan, Chun Xue, Edwin Hsing-Mean Sha: Hardware/software optimization for array & pointer boundary checking against buffer overflow attacks. J. Parallel Distrib. Comput. 66(9): 1129-1136 (2006)
14	EE	Qingfeng Zhuge, Chun Xue, Zili Shao, Meilin Liu, Meikang Qiu, Edwin Hsing-Mean Sha: Design optimization and space minimization considering timing and code size via retiming and unfolding. Microprocessors and Microsystems 30(4): 173-183 (2006)
2005
13	EE	Zili Shao, Qingfeng Zhuge, Chun Xue, Bin Xiao, Edwin Hsing-Mean Sha: High-level synthesis for DSP applications using heterogeneous functional units. ASP-DAC 2005: 302-304
12	EE	Chun Xue, Zili Shao, Meilin Liu, Edwin Hsing-Mean Sha: Iterational retiming: maximize iteration-level parallelism for nested loops. CODES+ISSS 2005: 309-314
11	EE	Meilin Liu, Qingfeng Zhuge, Zili Shao, Chun Xue, Mei Kang Qiu, Edwin Hsing-Mean Sha: Loop Distribution and Fusion with Timing and Code Size Optimization for Embedded DSPs. EUC 2005: 121-130
10	EE	Chun Xue, Zili Shao, Meilin Liu, Mei Kang Qiu, Edwin Hsing-Mean Sha: Optimizing Nested Loops with Iterational and Instructional Retiming. EUC 2005: 164-173
9		Mei Kang Qiu, Meilin Liu, Chun Xue, Qingfeng Zhuge, Edwin Hsing-Mean Sha, Zili Shao: Optimal Assignment with Guaranteed Confidence Probability for Trees on Heterogeneous DSP Systems. IASTED PDCS 2005: 295-300
8	EE	Ying Chen, Zili Shao, Qingfeng Zhuge, Chun Xue, Bin Xiao, Edwin Hsing-Mean Sha: Minimizing Energy via Loop Scheduling and DVS for Multi-Core Embedded Systems. ICPADS (2) 2005: 2-6
7		Meilin Liu, Zili Shao, Chun Xue, Kevin F. Chen, Edwin Hsing-Mean Sha: Multi-level Loop Fusion with Minimal Code Size. ISCA PDCS 2005: 348-
6	EE	Meilin Liu, Qingfeng Zhuge, Zili Shao, Chun Xue, Meikang Qiu, Edwin Hsing-Mean Sha: Maximum Loop Distribution and Fusion for Two-level Loops Considering Code Size. ISPAN 2005: 126-131
5	EE	Zili Shao, Chun Xue, Qingfeng Zhuge, Edwin Hsing-Mean Sha, Bin Xiao: Efficient Array & Pointer Bound Checking Against Buffer Overflow Attacks via Hardware/Software. ITCC (1) 2005: 780-785
4	EE	Zili Shao, Qingfeng Zhuge, Chun Xue, Edwin Hsing-Mean Sha: Efficient Assignment and Scheduling for Heterogeneous DSP Systems. IEEE Trans. Parallel Distrib. Syst. 16(6): 516-525 (2005)
2004
3	EE	Chun Xue, Zili Shao, Edwin Hsing-Mean Sha, Bin Xiao: Optimizing Address Assignment for Scheduling Embedded DSPs. EUC 2004: 64-73
2	EE	Zili Shao, Qingfeng Zhuge, Yi He, Chun Xue, Meilin Liu, Edwin Hsing-Mean Sha: Assignment and Scheduling of Real-time DSP Applications for Heterogeneous Functional Units. IPDPS 2004
1	EE	Zili Shao, Chun Xue, Qingfeng Zhuge, Edwin Hsing-Mean Sha, Bin Xiao: Security Protection and Checking in Embedded System Integration Against Buffer Overflow Attacks. ITCC (1) 2004: 409-413

Coauthor Index

1	Jiannong Cao	[15]
2	Keith C. C. Chan	[15]
3	Kevin F. Chen	[7]
4	Ying Chen	[8]
5	Yi He	[2]
6	Guochen Hua	[27]
7	Zhiping Jia	[24]
8	Hui Liu	[27]
9	Meilin Liu	[2] [6] [7] [9] [10] [11] [12] [14] [18] [19] [20] [21] [22] [26]
10	Meikang Qiu (Mei Kang Qiu)	[6] [9] [10] [11] [14] [16] [19] [20] [21] [22] [24] [28]
11	Edwin Hsing-Mean Sha	[1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] [13] [14] [15] [16] [17] [18] [19] [20] [21] [22] [23] [24] [25] [26] [28]
12	Zili Shao	[1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] [13] [14] [15] [16] [17] [19] [20] [21] [22] [23] [24] [25] [26] [27] [28]
13	Meng Wang	[25] [27]
14	Bin Xiao	[1] [3] [5] [8] [13] [16] [17]
15	Qingfeng Zhuge	[1] [2] [4] [5] [6] [8] [9] [11] [13] [14] [16] [17] [21] [22] [26]