Qiang Xu Vis

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41EEXiao Liu, Qiang Xu: Interconnection fabric design for tracing signals in post-silicon validation. DAC 2009: 352-357
40EEFeng Yuan, Qiang Xu: On systematic illegal state identification for pseudo-functional testing. DAC 2009: 702-707
39EEXiao Liu, Qiang Xu: Trace signal selection for visibility enhancement in post-silicon validation. DATE 2009: 1338-1343
38EEXiao Liu, Qiang Xu: A generic framework for scan capture power reduction in fixed-length symbol-based test compression environment. DATE 2009: 1494-1499
37EELi Jiang, Lin Huang, Qiang Xu: Test architecture design and optimization for three-dimensional SoCs. DATE 2009: 220-225
36EELin Huang, Feng Yuan, Qiang Xu: Lifetime reliability-aware task allocation and scheduling for MPSoC platforms. DATE 2009: 51-56
35EEQiang Xu, Yubin Zhang, Krishnendu Chakrabarty: SOC test-architecture optimization for the testing of embedded cores and signal-integrity faults on core-external interconnects. ACM Trans. Design Autom. Electr. Syst. 14(1): (2009)
34EEShan Tang, Qiang Xu: A debug probe for concurrently debugging multiple embedded cores and inter-core transactions in NoC-based systems. ASP-DAC 2008: 416-421
33EEJia Li, Qiang Xu, Yu Hu, Xiaowei Li: On reducing both shift and capture power for scan-based testing. ASP-DAC 2008: 653-658
32EELin Huang, Feng Yuan, Qiang Xu: On reliable modular testing with vulnerable test access mechanisms. DAC 2008: 834-839
31EEJia Li, Qiang Xu, Yu Hu, Xiaowei Li: iFill: An Impact-Oriented X-Filling Method for Shift- and Capture-Power Reduction in At-Speed Scan-Based Testing. DATE 2008: 1184-1189
30EEShan Tang, Qiang Xu: In-band Cross-Trigger Event Transmission for Transaction-Based Debug. DATE 2008: 414-419
29EEFeng Yuan, Lin Huang, Qiang Xu: Re-Examining the Use of Network-on-Chip as Test Access Mechanism. DATE 2008: 808-811
28EELei Zhang, Yinhe Han, Qiang Xu, Xiaowei Li: Defect Tolerance in Homogeneous Manycore Processors Using Core-Level Redundancy with Unified Topology. DATE 2008: 891-896
27EEJia Li, Qiang Xu, Yu Hu, Xiaowei Li: Channel Width Utilization Improvement in Testing NoC-Based Systems for Test Time Reduction. DELTA 2008: 26-31
26EEQiang Xu, Jaspal Subhlok: Construction and Evaluation of Coordinated Performance Skeletons. HiPC 2008: 73-86
25EEJia Li, Xiao Liu, Yubin Zhang, Yu Hu, Xiaowei Li, Qiang Xu: On capture power-aware test data compression for scan-based testing. ICCAD 2008: 67-72
24 Jaspal Subhlok, Qiang Xu: Automatic construction of coordinated performance skeletons. IPDPS 2008: 1-5
23EELin Huang, Qiang Xu: On Modeling the Lifetime Reliability of Homogeneous Manycore Systems. PRDC 2008: 87-94
22EESukhdeep Sodhi, Jaspal Subhlok, Qiang Xu: Performance prediction with skeletons. Cluster Computing 11(2): 151-165 (2008)
21EEJing-Ling Yang, Qiang Xu: State-Sensitive X-Filling Scheme for Scan Capture Power Reduction. IEEE Trans. on CAD of Integrated Circuits and Systems 27(7): 1338-1343 (2008)
20EEQiang Xu, Yubin Zhang, Krishnendu Chakrabarty: SOC Test Architecture Optimization for Signal Integrity Faults on Core-External Interconnects. DAC 2007: 676-681
19EEShan Tang, Qiang Xu: A multi-core debug platform for NoC-based systems. DATE 2007: 870-875
18EEXiucheng Dong, Haibin Wang, Qiang Xu, Xiaoxiao Zhao: Research on Applications of a New-Type Fuzzy-Neural Network Controller. LSMS (1) 2007: 679-687
17EEQiang Xu, Nicola Nicolici, Krishnendu Chakrabarty: Test Wrapper Design and Optimization Under Power Constraints for Embedded Cores With Multiple Clock Domains. IEEE Trans. on CAD of Integrated Circuits and Systems 26(8): 1539-1547 (2007)
16EEQiang Xu, Baosheng Wang, F. Y. Young: Retention-Aware Test Scheduling for BISTed Embedded SRAMs. European Test Symposium 2006: 83-88
15EEQiang Xu, Nicola Nicolici: DFT Infrastructure for Broadside Two-Pattern Test of Core-Based SOCs. IEEE Trans. Computers 55(4): 470-485 (2006)
14EEQiang Xu, Nicola Nicolici: Multifrequency TAM design for hierarchical SOCs. IEEE Trans. on CAD of Integrated Circuits and Systems 25(1): 181-196 (2006)
13EEHo Fai Ko, Qiang Xu, Nicola Nicolici: Register-transfer level functional scan for hierarchical designs. ASP-DAC 2005: 1172-1175
12EEQiang Xu, Nicola Nicolici, Krishnendu Chakrabarty: Multi-frequency wrapper design and optimization for embedded cores under average power constraints. DAC 2005: 123-128
11EEQiang Xu, Jaspal Subhlok: Automatic clustering of grid nodes. GRID 2005: 227-233
10EEQiang Xu, Nicola Nicolici: Modular and rapid testing of SOCs with unwrapped logic blocks. IEEE Trans. VLSI Syst. 13(11): 1275-1285 (2005)
9EEQiang Xu, Nicola Nicolici: Wrapper design for multifrequency IP cores. IEEE Trans. VLSI Syst. 13(6): 678-685 (2005)
8EEQiang Xu, Nicola Nicolici: Modular SOC testing with reduced wrapper count. IEEE Trans. on CAD of Integrated Circuits and Systems 24(12): 1894-1908 (2005)
7EEQiang Xu, Nicola Nicolici: Multi-Frequency Test Access Mechanism Design for Modular SOC Testing. Asian Test Symposium 2004: 2-7
6EEQiang Xu, Nicola Nicolici: Wrapper Design for Testing IP Cores with Multiple Clock Domains. DATE 2004: 416-421
5EEQiang Xu: Content Management and Resources Integration: A Practice in Shanghai Digital Library. ICADL 2004: 25-34
4EEQiang Xu, Nicola Nicolici: Time/Area Tradeoffs in Testing Hierarchical SOCs With Hard Mega-Cores. ITC 2004: 1196-1202
3EEQiang Xu, Nicola Nicolici: Delay Fault Testing of Core-Based Systems-on-a-Chi. DATE 2003: 10744-10752
2EEBai Hong Fang, Qiang Xu, Nicola Nicolici: Hardware/Software Co-testing of Embedded Memories in Complex SOCs. ICCAD 2003: 599-606
1EEQiang Xu, Nicola Nicolici: On Reducing Wrapper Boundary Register Cells in Modular SOC Testing. ITC 2003: 622-631

Coauthor Index

1Krishnendu Chakrabarty [12] [17] [20] [35]
2Xiucheng Dong [18]
3Bai Hong Fang [2]
4Yinhe Han [28]
5Yu Hu [25] [27] [31] [33]
6Lin Huang [23] [29] [32] [36] [37]
7Li Jiang [37]
8Ho Fai Ko [13]
9Jia Li [25] [27] [31] [33]
10Xiaowei Li [25] [27] [28] [31] [33]
11Xiao Liu [25] [38] [39] [41]
12Nicola Nicolici [1] [2] [3] [4] [6] [7] [8] [9] [10] [12] [13] [14] [15] [17]
13Sukhdeep Sodhi [22]
14Jaspal Subhlok [11] [22] [24] [26]
15Shan Tang [19] [30] [34]
16Baosheng Wang [16]
17Haibin Wang [18]
18Jing-Ling Yang [21]
19Evangeline F. Y. Young (F. Y. Young, Fung Yu Young) [16]
20Feng Yuan [29] [32] [36] [40]
21Lei Zhang [28]
22Yubin Zhang [20] [25] [35]
23Xiaoxiao Zhao [18]

Colors in the list of coauthors

Copyright © Tue Nov 3 08:52:44 2009 by Michael Ley (ley@uni-trier.de)