Yuan Xie

Pennsylvania State University

other persons with the same name:

• Yuan Xie - Center for Computational Regulatory Genomics, California Institute of Technology
• Yuan Xie - Shanghai Jiao Tong University

2008
66	EE	Syed M. Alam, Mike Ignatowski, Yuan Xie: Technology, CAD tools, and designs for emerging 3D integration technology. ACM Great Lakes Symposium on VLSI 2008: 1-2
65	EE	Prasanth Mangalagiri, Karthik Sarpatwari, Aditya Yanamandra, VijayKrishnan Narayanan, Yuan Xie, Mary Jane Irwin, Osama Awadel Karim: A low-power phase change memory based hybrid cache architecture. ACM Great Lakes Symposium on VLSI 2008: 395-398
64	EE	Feng Wang, Xiaoxia Wu, Yuan Xie: Variability-driven module selection with joint design time optimization and post-silicon tuning. ASP-DAC 2008: 2-9
2007
63	EE	Feng Wang, Yuan Xie, Hai Ju: A novel criticality computation method in statistical timing analysis. DATE 2007: 1611-1616
62	EE	Yu Wang, Hong Luo, Ku He, Rong Luo, Huazhong Yang, Yuan Xie: Temperature-aware NBTI modeling and the impact of input vector control on performance degradation. DATE 2007: 546-551
61	EE	Feng Wang, Chrysostomos Nicopoulos, Xiaoxia Wu, Yuan Xie, Narayanan Vijaykrishnan: Variation-aware task allocation and scheduling for MPSoC. ICCAD 2007: 598-603
60	EE	Jongman Kim, Chrysostomos Nicopoulos, Dongkook Park, Reetuparna Das, Yuan Xie, Narayanan Vijaykrishnan, Mazin S. Yousif, Chita R. Das: A novel dimensionally-decomposed router for on-chip communication in 3D architectures. ISCA 2007: 138-149
59	EE	Hong Luo, Yu Wang, Ku He, Rong Luo, Huazhong Yang, Yuan Xie: Modeling of PMOS NBTI Effect Considering Temperature Variation. ISQED 2007: 139-144
58	EE	Amol Mupid, Madhu Mutyam, Narayanan Vijaykrishnan, Yuan Xie, Mary Jane Irwin: Variation Analysis of CAM Cells. ISQED 2007: 333-338
57	EE	K. Ramakrishnan, R. Rajaraman, S. Suresh, Narayanan Vijaykrishnan, Yuan Xie, Mary Jane Irwin: Variation Impact on SER of Combinational Circuits. ISQED 2007: 911-916
56	EE	Hong Luo, Yu Wang, Ku He, Rong Luo, Huazhong Yang, Yuan Xie: A Novel Gate-Level NBTI Delay Degradation Model with Stacking Effect. PATMOS 2007: 160-170
55	EE	Balaji Vaidyanathan, Wei-Lun Hung, Feng Wang, Yuan Xie, Narayanan Vijaykrishnan, Mary Jane Irwin: Architecting Microprocessor Components in 3D Design Space. VLSI Design 2007: 103-108
54	EE	Feng Wang, Yuan Xie, R. Rajaraman, Balaji Vaidyanathan: Soft Error Rate Analysis for Combinational Logic Using An Accurate Electrical Masking Model. VLSI Design 2007: 165-170
53	EE	W.-L. Hung, Yuan Xie, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Mary Jane Irwin: Thermal-Aware Task Allocation and Scheduling for Embedded Systems CoRR abs/0710.4660: (2007)
52	EE	Suleyman Tosun, Nazanin Mansouri, Ercument Arvas, Mahmut T. Kandemir, Yuan Xie: Reliability-Centric High-Level Synthesis CoRR abs/0710.4684: (2007)
51	EE	Yuh-Fang Tsai, Vijaykrishnan Narayaynan, Yuan Xie, Mary Jane Irwin: Leakage-Aware Interconnect for On-Chip Network CoRR abs/0710.4731: (2007)
50	EE	Gabriel H. Loh, Yuan Xie, Bryan Black: Processor Design in 3D Die-Stacking Technologies. IEEE Micro 27(3): 31-48 (2007)
49	EE	Chang Hong Lin, Yuan Xie, Wayne Wolf: Code Compression for VLIW Embedded Systems Using a Self-Generating Table. IEEE Trans. VLSI Syst. 15(10): 1160-1171 (2007)
48	EE	Yuan Xie, Wayne Wolf, Haris Lekatsas: Code Decompression Unit Design for VLIW Embedded Processors. IEEE Trans. VLSI Syst. 15(8): 975-980 (2007)
47	EE	Yuan Xie, Lin Li, Mahmut T. Kandemir, Vijaykrishnan Vijaykrishnan, Mary Jane Irwin: Reliability-aware Co-synthesis for Embedded Systems. VLSI Signal Processing 49(1): 87-99 (2007)
2006
46	EE	Balaji Vaidyanathan, Suresh Srinivasan, Yuan Xie, Narayanan Vijaykrishnan, Rong Luo: Leakage Optimized DECAP Design for FPGAs. APCCAS 2006: 960-963
45	EE	Ozcan Ozturk, Feng Wang, Mahmut T. Kandemir, Yuan Xie: Optimal topology exploration for application-specific 3D architectures. ASP-DAC 2006: 390-395
44	EE	Suresh Srinivasan, Prasanth Mangalagiri, Yuan Xie, Narayanan Vijaykrishnan, Karthik Sarpatwari: FLAW: FPGA lifetime awareness. DAC 2006: 630-635
43	EE	Feng Wang, Yuan Xie, Narayanan Vijaykrishnan, Mary Jane Irwin: On-chip bus thermal analysis and optimization. DATE 2006: 850-855
42	EE	W.-L. Hung, Xiaoxia Wu, Yuan Xie: Guaranteeing performance yield in high-level synthesis. ICCAD 2006: 303-309
41	EE	Feihui Li, Chrysostomos Nicopoulos, Thomas D. Richardson, Yuan Xie, Narayanan Vijaykrishnan, Mahmut T. Kandemir: Design and Management of 3D Chip Multiprocessors Using Network-in-Memory. ISCA 2006: 130-141
40	EE	Wei-Lun Hung, Greg M. Link, Yuan Xie, Narayanan Vijaykrishnan, Mary Jane Irwin: Interconnect and Thermal-aware Floorplanning for 3D Microprocessors. ISQED 2006: 98-104
39	EE	Shengqi Yang, Wayne Wolf, Narayanan Vijaykrishnan, Yuan Xie: Reliability-Aware SOC Voltage Islands Partition and Floorplan. ISVLSI 2006: 343-348
38	EE	Madhu Mutyam, Melvin Eze, Narayanan Vijaykrishnan, Yuan Xie: Delay and Energy Efficient Data Transmission for On-Chip Buses. ISVLSI 2006: 355-360
37	EE	Feng Wang, Yuan Xie, Kerry Bernstein, Yan Luo: Dependability Analysis of Nano-scale FinFET circuits. ISVLSI 2006: 399-404
36	EE	R. Rajaraman, J. S. Kim, Narayanan Vijaykrishnan, Yuan Xie, Mary Jane Irwin: SEAT-LA: A Soft Error Analysis Tool for Combinational Logic. VLSI Design 2006: 499-502
35	EE	Thomas D. Richardson, Chrysostomos Nicopoulos, Dongkook Park, Narayanan Vijaykrishnan, Yuan Xie, Chita R. Das, Vijay Degalahal: A Hybrid SoC Interconnect with Dynamic TDMA-Based Transaction-Less Buses and On-Chip Networks. VLSI Design 2006: 657-664
34	EE	Narayanan Vijaykrishnan, Yuan Xie: Reliability Concerns in Embedded System Designs. IEEE Computer 39(1): 118-120 (2006)
33	EE	Yuan Xie, Wayne Wolf, Haris Lekatsas: Code Compression for Embedded VLIW Processors Using Variable-to-Fixed Coding. IEEE Trans. VLSI Syst. 14(5): 525-536 (2006)
32	EE	Yuan Xie, Gabriel H. Loh, Bryan Black, Kerry Bernstein: Design space exploration for 3D architectures. JETC 2(2): 65-103 (2006)
31	EE	Yuan Xie, Wei-Lun Hung: Temperature-Aware Task Allocation and Scheduling for Embedded Multiprocessor Systems-on-Chip (MPSoC) Design. VLSI Signal Processing 45(3): 177-189 (2006)
2005
30	EE	Narayanan Vijaykrishnan, Yuan Xie, Mary Jane Irwin: Designing reliable circuit in the presence of soft errors. ASP-DAC 2005: 1
29	EE	Shengqi Yang, Wayne Wolf, Wenping Wang, Narayanan Vijaykrishnan, Yuan Xie: Low-leakage robust SRAM cell design for sub-100nm technologies. ASP-DAC 2005: 539-544
28	EE	John Conner, Yuan Xie, Mahmut T. Kandemir, Robert Dick, Greg M. Link: FD-HGAC: a hybrid heuristic/genetic algorithm hardware/software co-synthesis framework with fault detection. ASP-DAC 2005: 709-712
27	EE	Suleyman Tosun, Nazanin Mansouri, Ercument Arvas, Mahmut T. Kandemir, Yuan Xie: Reliability-Centric High-Level Synthesis. DATE 2005: 1258-1263
26	EE	Yuh-Fang Tsai, Narayanan Vijaykrishnan, Yuan Xie, Mary Jane Irwin: Leakage-Aware Interconnect for On-Chip Network. DATE 2005: 230-231
25	EE	Shengqi Yang, Wayne Wolf, Narayanan Vijaykrishnan, Dimitrios N. Serpanos, Yuan Xie: Power Attack Resistant Cryptosystem Design: A Dynamic Voltage and Frequency Switching Approach. DATE 2005: 64-69
24	EE	Wei-Lun Hung, Yuan Xie, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Mary Jane Irwin: Thermal-Aware Task Allocation and Scheduling for Embedded Systems. DATE 2005: 898-899
23	EE	Yuh-Fang Tsai, Yuan Xie, Narayanan Vijaykrishnan, Mary Jane Irwin: Three-Dimensional Cache Design Exploration Using 3DCacti. ICCD 2005: 519-524
22	EE	Sri Hari Krishna Narayanan, Guilin Chen, Mahmut T. Kandemir, Yuan Xie: Temperature-Sensitive Loop Parallelization for Chip Multiprocessors. ICCD 2005: 677-682
21	EE	Wei-Lun Hung, Greg M. Link, Yuan Xie, Narayanan Vijaykrishnan, Nagu R. Dhanwada, John Conner: Temperature-Aware Voltage Islands Architecting in System-on-Chip Design. ICCD 2005: 689-696
20	EE	Suleyman Tosun, Ozcan Ozturk, Nazanin Mansouri, Ercument Arvas, Mahmut T. Kandemir, Yuan Xie, Wei-Lun Hung: An ILP Formulation for Reliability-Oriented High-Level Synthesis. ISQED 2005: 364-369
19	EE	Suleyman Tosun, Nazanin Mansouri, Ercument Arvas, Mahmut T. Kandemir, Yuan Xie, Wei-Lun Hung: Reliability-Centric Hardware/Software Co-Design. ISQED 2005: 375-380
18	EE	Wei-Lun Hung, Yuan Xie, Narayanan Vijaykrishnan, Charles Addo-Quaye, Theo Theocharides, Mary Jane Irwin: Thermal-Aware Floorplanning Using Genetic Algorithms. ISQED 2005: 634-639
17	EE	Daniel Hostetler, Yuan Xie: Adaptive Power Management in Software Radios Using Resolution Adaptive Analog to Digital Converters. ISVLSI 2005: 186-191
16	EE	Shengqi Yang, Wayne Wolf, Narayanan Vijaykrishnan, Yuan Xie, Wenping Wang: Accurate Stacking Effect Macro-Modeling of Leakage Power in Sub-100nm Circuits. VLSI Design 2005: 165-170
15	EE	Yuh-Fang Tsai, Narayanan Vijaykrishnan, Yuan Xie, Mary Jane Irwin: Influence of Leakage Reduction Techniques on Delay/Leakage Uncertainty. VLSI Design 2005: 374-379
2004
14	EE	Wei Xu, Narayanan Vijaykrishnan, Yuan Xie, Mary Jane Irwin: Design of a nanosensor array architecture. ACM Great Lakes Symposium on VLSI 2004: 298-303
13	EE	Yuan Xie, Lin Li, Mahmut T. Kandemir, Narayanan Vijaykrishnan, Mary Jane Irwin: Reliability-Aware Co-Synthesis for Embedded Systems. ASAP 2004: 41-50
12	EE	Chang Hong Lin, Yuan Xie, Wayne Wolf: LZW-Based Code Compression for VLIW Embedded Systems. DATE 2004: 76-81
11	EE	Suresh Srinivasan, Aman Gayasen, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Yuan Xie, Mary Jane Irwin: Improving soft-error tolerance of FPGA configuration bits. ICCAD 2004: 107-110
10	EE	Wei-Lun Hung, Charles Addo-Quaye, Theo Theocharides, Yuan Xie, Narayanan Vijaykrishnan, Mary Jane Irwin: Thermal-Aware IP Virtualization and Placement for Networks-on-Chip Architecture. ICCD 2004: 430-437
9	EE	Vijay Degalahal, R. Ramanarayanan, Narayanan Vijaykrishnan, Yuan Xie, Mary Jane Irwin: The Effect of Threshold Voltages on the Soft Error Rate. ISQED 2004: 503-508
2003
8	EE	Yuan Xie, Wayne Wolf, Haris Lekatsas: Profile-Driven Selective Code Compression. DATE 2003: 10462-10467
7	EE	Yuan Xie, Wayne Wolf, Haris Lekatsas: Code Compression Using Variable-to-fixed Coding Based on Arithmetic Coding. DCC 2003: 382-391
6	EE	Yuan Xie, Jiang Xu, Wayne Wolf: Augmenting Platform-Based Design with Synthesis Tools. Journal of Circuits, Systems, and Computers 12(2): 125-142 (2003)
2002
5	EE	Haris Lekatsas, Wayne Wolf, Yuan Xie: Code Compression for VLIW Processors Using Variable-to-Fixed Coding. ISSS 2002: 138-143
2001
4	EE	Yuan Xie, Wayne Wolf: Allocation and scheduling of conditional task graph in hardware/software co-synthesis. DATE 2001: 620-625
3	EE	Yuan Xie, Haris Lekatsas, Wayne Wolf: Code Compression for VLIW Processors. Data Compression Conference 2001: 525
2	EE	Yuan Xie, Wayne Wolf, Haris Lekatsas: A code decompression architecture for VLIW processors. MICRO 2001: 66-75
2000
1	EE	Yuan Xie, Wayne Wolf: Co-synthesis with custom ASICs. ASP-DAC 2000: 129-134

Coauthor Index

1	Charles Addo-Quaye	[10] [18]
2	Syed M. Alam	[66]
3	Ercument Arvas	[19] [20] [27] [52]
4	Kerry Bernstein	[32] [37]
5	Bryan Black	[32] [50]
6	Guilin Chen	[22]
7	John Conner	[21] [28]
8	Chita R. Das	[35] [60]
9	Reetuparna Das	[60]
10	Vijay Degalahal	[9] [35]
11	Nagu R. Dhanwada	[21]
12	Robert Dick	[28]
13	Melvin Eze	[38]
14	Aman Gayasen	[11]
15	Ku He	[56] [59] [62]
16	Daniel Hostetler	[17]
17	W.-L. Hung	[42] [53]
18	Wei-Lun Hung	[10] [18] [19] [20] [21] [24] [31] [40] [55]
19	Mike Ignatowski	[66]
20	Mary Jane Irwin	[9] [10] [11] [13] [14] [15] [18] [23] [24] [26] [30] [36] [40] [43] [47] [51] [53] [55] [57] [58] [65]
21	Hai Ju	[63]
22	Mahmut T. Kandemir	[11] [13] [19] [20] [22] [24] [27] [28] [41] [45] [47] [52] [53]
23	Osama Awadel Karim	[65]
24	J. S. Kim	[36]
25	Jongman Kim	[60]
26	Haris Lekatsas	[2] [3] [5] [7] [8] [33] [48]
27	Feihui Li	[41]
28	Lin Li	[13] [47]
29	Chang Hong Lin	[12] [49]
30	Greg M. Link	[21] [28] [40]
31	Gabriel H. Loh	[32] [50]
32	Hong Luo	[56] [59] [62]
33	Rong Luo	[46] [56] [59] [62]
34	Yan Luo	[37]
35	Prasanth Mangalagiri	[44] [65]
36	Nazanin Mansouri	[19] [20] [27] [52]
37	Amol Mupid	[58]
38	Madhu Mutyam	[38] [58]
39	Sri Hari Krishna Narayanan	[22]
40	VijayKrishnan Narayanan	[65]
41	Vijaykrishnan Narayaynan	[51]
42	Chrysostomos Nicopoulos	[35] [41] [60] [61]
43	Ozcan Ozturk	[20] [45]
44	Dongkook Park	[35] [60]
45	R. Rajaraman	[36] [54] [57]
46	K. Ramakrishnan	[57]
47	R. Ramanarayanan	[9]
48	Thomas D. Richardson	[35] [41]
49	Karthik Sarpatwari	[44] [65]
50	Dimitrios N. Serpanos	[25]
51	Suresh Srinivasan	[11] [44] [46]
52	S. Suresh	[57]
53	Theo Theocharides	[10] [18]
54	Suleyman Tosun	[19] [20] [27] [52]
55	Yuh-Fang Tsai	[15] [23] [26] [51]
56	Balaji Vaidyanathan	[46] [54] [55]
57	Narayanan Vijaykrishnan	[9] [10] [11] [13] [14] [15] [16] [18] [21] [23] [24] [25] [26] [29] [30] [34] [35] [36] [38] [39] [40] [41] [43] [44] [46] [53] [55] [57] [58] [60] [61]
58	Vijaykrishnan Vijaykrishnan	[47]
59	Wenping Wang	[16] [29]
60	Yu Wang	[56] [59] [62]
61	Feng Wang	[37] [43] [45] [54] [55] [61] [63] [64]
62	Wayne Wolf	[1] [2] [3] [4] [5] [6] [7] [8] [12] [16] [25] [29] [33] [39] [48] [49]
63	Xiaoxia Wu	[42] [61] [64]
64	Jiang Xu	[6]
65	Wei Xu	[14]
66	Aditya Yanamandra	[65]
67	Huazhong Yang	[56] [59] [62]
68	Shengqi Yang	[16] [25] [29] [39]
69	Mazin S. Yousif	[60]

Colors in the list of coauthors