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Yuan Xie Vis

Pennsylvania State University

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*2009
98EEXiangyu Dong, Yuan Xie: System-level cost analysis and design exploration for three-dimensional integrated circuits (3D ICs). ASP-DAC 2009: 234-241
97EEMichael DeBole, Krishnan Ramakrishnan, Varsha Balakrishnan, Wenping Wang, Hong Luo, Yu Wang, Yuan Xie, Yu Cao, Narayanan Vijaykrishnan: A framework for estimating NBTI degradation of microarchitectural components. ASP-DAC 2009: 455-460
96EEYibo Chen, Yuan Xie: Tolerating process variations in high-level synthesis using transparent latches. ASP-DAC 2009: 73-78
95EESrinath Sridharan, Michael DeBole, Guangyu Sun, Yuan Xie, Vijaykrishnan Narayanan: A criticality-driven microarchitectural three dimensional (3D) floorplanner. ASP-DAC 2009: 763-768
94EEFeng Wang, Yuan Xie, Andres Takach: Variation-aware resource sharing and binding in behavioral synthesis. ASP-DAC 2009: 79-84
93EEJin Ouyang, Raghuveer Raghavendra, Sibin Mohan, Tao Zhang, Yuan Xie, Frank Mueller: CheckerCore: enhancing an FPGA soft core to capture worst-case execution times. CASES 2009: 175-184
92EEYu Wang, Xiaoming Chen, Wenping Wang, Yu Cao, Yuan Xie, Huazhong Yang: Gate replacement techniques for simultaneous leakage and aging optimization. DATE 2009: 328-333
91EEXiaoxia Wu, Jian Li, Lixin Zhang, Evan Speight, Yuan Xie: Power and performance of read-write aware Hybrid Caches with non-volatile memories. DATE 2009: 737-742
90EEGuangyu Sun, Xiangyu Dong, Yuan Xie, Jian Li, Yiran Chen: A novel architecture of the 3D stacked MRAM L2 cache for CMPs. HPCA 2009: 239-249
89EEXiaoxia Wu, Jian Li, Lixin Zhang, Evan Speight, Ramakrishnan Rajamony, Yuan Xie: Hybrid cache architecture with disparate memory technologies. ISCA 2009: 34-45
88EEBalaji Vaidyanathan, Anthony S. Oates, Yuan Xie, Yu Wang: NBTI-aware statistical circuit delay assessment. ISQED 2009: 13-18
87EEYu Wang, Xiaoming Chen, Wenping Wang, Varsha Balakrishnan, Yu Cao, Yuan Xie, Huazhong Yang: On the efficacy of input Vector Control to mitigate NBTI effects and leakage power. ISQED 2009: 19-26
86EEHong Luo, Yu Wang, Rong Luo, Huazhong Yang, Yuan Xie: Temperature-Aware NBTI Modeling Techniques in Digital Circuits. IEICE Transactions 92-C(6): 875-886 (2009)
85EEXiaoxia Wu, Paul Falkenstern, Krishnendu Chakrabarty, Yuan Xie: Scan-chain design and optimization for three-dimensional integrated circuits. JETC 5(2): (2009)
2008
84EESyed M. Alam, Mike Ignatowski, Yuan Xie: Technology, CAD tools, and designs for emerging 3D integration technology. ACM Great Lakes Symposium on VLSI 2008: 1-2
83EEPrasanth Mangalagiri, Karthik Sarpatwari, Aditya Yanamandra, Vijaykrishnan Narayanan, Yuan Xie, Mary Jane Irwin, Osama Awadel Karim: A low-power phase change memory based hybrid cache architecture. ACM Great Lakes Symposium on VLSI 2008: 395-398
82EEFeng Wang, Xiaoxia Wu, Yuan Xie: Variability-driven module selection with joint design time optimization and post-silicon tuning. ASP-DAC 2008: 2-9
81EEXiangyu Dong, Xiaoxia Wu, Guangyu Sun, Yuan Xie, Helen Li, Yiran Chen: Circuit and microarchitecture evaluation of 3D stacking magnetic RAM (MRAM) as a universal memory replacement. DAC 2008: 554-559
80EEFeng Wang, Guangyu Sun, Yuan Xie: A Variation Aware High Level Synthesis Framework. DATE 2008: 1063-1068
79EEPrasanth Mangalagiri, Sungmin Bae, Krishnan Ramakrishnan, Yuan Xie, Vijaykrishnan Narayanan: Thermal-aware reliability analysis for platform FPGAs. ICCAD 2008: 722-727
78EEKrishnan Ramakrishnan, Xiaoxia Wu, Narayanan Vijaykrishnan, Yuan Xie: Comparative analysis of NBTI effects on low power and high performance flip-flops. ICCD 2008: 200-205
77EEXiaoxia Wu, Yibo Chen, Krishnendu Chakrabarty, Yuan Xie: Test-access mechanism optimization for core-based three-dimensional SOCs. ICCD 2008: 212-218
76EEFeng Wang, Yuan Xie: Embedded Multi-Processor System-on-chip (MPSoC) design considering process variations. IPDPS 2008: 1-5
75EEDongkook Park, Soumya Eachempati, Reetuparna Das, Asit K. Mishra, Yuan Xie, Narayanan Vijaykrishnan, Chita R. Das: MIRA: A Multi-layered On-Chip Interconnect Router Architecture. ISCA 2008: 251-261
74EEKrishnan Ramakrishnan, R. Rajaraman, Narayanan Vijaykrishnan, Yuan Xie, Mary Jane Irwin, K. Unlu: Hierarchical Soft Error Estimation Tool (HSEET). ISQED 2008: 680-683
73EEHai Lin, Guangyu Sun, Yunsi Fei, Yuan Xie, Anand Sivasubramaniam: Thermal-aware Design Considerations for Application-Specific Instruction Set Processor. SASP 2008: 63-68
72EEXuebin Wu, Zhiyuan Yan, Yuan Xie: Two-dimensional crosstalk avoidance codes. SiPS 2008: 106-111
71EEJin Ouyang, Yuan Xie: Power optimization for FinFET-based circuits using genetic algorithms. SoCC 2008: 211-214
70EEYibo Chen, Jin Ouyang, Yuan Xie: ILP-based scheme for timing variation-aware scheduling and resource binding. SoCC 2008: 27-30
69EESuresh Srinivasan, Krishnan Ramakrishnan, Prasanth Mangalagiri, Yuan Xie, Vijaykrishnan Narayanan, Mary Jane Irwin, Karthik Sarpatwari: Toward Increasing FPGA Lifetime. IEEE Trans. Dependable Sec. Comput. 5(2): 115-127 (2008)
68EEYuh-Fang Tsai, Feng Wang, Yuan Xie, Narayanan Vijaykrishnan, Mary Jane Irwin: Design Space Exploration for 3-D Cache. IEEE Trans. VLSI Syst. 16(4): 444-455 (2008)
67EEShengqi Yang, Wenping Wang, Tiehan Lv, Wayne Wolf, Narayanan Vijaykrishnan, Yuan Xie: Case Study of Reliability-Aware and Low-Power Design. IEEE Trans. VLSI Syst. 16(7): 861-873 (2008)
66EEYuan Xie, Jason Cong, Paul Franzon: Editorial: Special issue on 3D integrated circuits and microarchitectures. JETC 4(4): (2008)
2007
65EEFeng Wang, Yuan Xie, Hai Ju: A novel criticality computation method in statistical timing analysis. DATE 2007: 1611-1616
64EEYu Wang, Hong Luo, Ku He, Rong Luo, Huazhong Yang, Yuan Xie: Temperature-aware NBTI modeling and the impact of input vector control on performance degradation. DATE 2007: 546-551
63EEFeng Wang, Chrysostomos Nicopoulos, Xiaoxia Wu, Yuan Xie, Narayanan Vijaykrishnan: Variation-aware task allocation and scheduling for MPSoC. ICCAD 2007: 598-603
62EESuresh Srinivasan, Prasanth Mangalagiri, Yuan Xie, Narayanan Vijaykrishnan: FPGA routing architecture analysis under variations. ICCD 2007: 152-157
61EEXiaoxia Wu, Paul Falkenstern, Yuan Xie: Scan chain design for three-dimensional integrated circuits (3D ICs). ICCD 2007: 208-214
60EEJongman Kim, Chrysostomos Nicopoulos, Dongkook Park, Reetuparna Das, Yuan Xie, Narayanan Vijaykrishnan, Mazin S. Yousif, Chita R. Das: A novel dimensionally-decomposed router for on-chip communication in 3D architectures. ISCA 2007: 138-149
59EEHong Luo, Yu Wang, Ku He, Rong Luo, Huazhong Yang, Yuan Xie: Modeling of PMOS NBTI Effect Considering Temperature Variation. ISQED 2007: 139-144
58EEAmol Mupid, Madhu Mutyam, Narayanan Vijaykrishnan, Yuan Xie, Mary Jane Irwin: Variation Analysis of CAM Cells. ISQED 2007: 333-338
57EEKrishnan Ramakrishnan, R. Rajaraman, S. Suresh, Narayanan Vijaykrishnan, Yuan Xie, Mary Jane Irwin: Variation Impact on SER of Combinational Circuits. ISQED 2007: 911-916
56EEHong Luo, Yu Wang, Ku He, Rong Luo, Huazhong Yang, Yuan Xie: A Novel Gate-Level NBTI Delay Degradation Model with Stacking Effect. PATMOS 2007: 160-170
55EEBalaji Vaidyanathan, Wei-Lun Hung, Feng Wang, Yuan Xie, Narayanan Vijaykrishnan, Mary Jane Irwin: Architecting Microprocessor Components in 3D Design Space. VLSI Design 2007: 103-108
54EEFeng Wang, Yuan Xie, R. Rajaraman, Balaji Vaidyanathan: Soft Error Rate Analysis for Combinational Logic Using An Accurate Electrical Masking Model. VLSI Design 2007: 165-170
53EEWei-Lun Hung, Yuan Xie, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Mary Jane Irwin: Thermal-Aware Task Allocation and Scheduling for Embedded Systems CoRR abs/0710.4660: (2007)
52EESuleyman Tosun, Nazanin Mansouri, Ercument Arvas, Mahmut T. Kandemir, Yuan Xie: Reliability-Centric High-Level Synthesis CoRR abs/0710.4684: (2007)
51EEYuh-Fang Tsai, Vijaykrishnan Narayanan, Yuan Xie, Mary Jane Irwin: Leakage-Aware Interconnect for On-Chip Network CoRR abs/0710.4731: (2007)
50EEGabriel H. Loh, Yuan Xie, Bryan Black: Processor Design in 3D Die-Stacking Technologies. IEEE Micro 27(3): 31-48 (2007)
49EEChang Hong Lin, Yuan Xie, Wayne Wolf: Code Compression for VLIW Embedded Systems Using a Self-Generating Table. IEEE Trans. VLSI Syst. 15(10): 1160-1171 (2007)
48EEYuan Xie, Wayne Wolf, Haris Lekatsas: Code Decompression Unit Design for VLIW Embedded Processors. IEEE Trans. VLSI Syst. 15(8): 975-980 (2007)
47EEYuan Xie, Lin Li, Mahmut T. Kandemir, Narayanan Vijaykrishnan, Mary Jane Irwin: Reliability-aware Co-synthesis for Embedded Systems. VLSI Signal Processing 49(1): 87-99 (2007)
2006
46EEBalaji Vaidyanathan, Suresh Srinivasan, Yuan Xie, Narayanan Vijaykrishnan, Rong Luo: Leakage Optimized DECAP Design for FPGAs. APCCAS 2006: 960-963
45EEOzcan Ozturk, Feng Wang, Mahmut T. Kandemir, Yuan Xie: Optimal topology exploration for application-specific 3D architectures. ASP-DAC 2006: 390-395
44EESuresh Srinivasan, Prasanth Mangalagiri, Yuan Xie, Narayanan Vijaykrishnan, Karthik Sarpatwari: FLAW: FPGA lifetime awareness. DAC 2006: 630-635
43EEFeng Wang, Yuan Xie, Narayanan Vijaykrishnan, Mary Jane Irwin: On-chip bus thermal analysis and optimization. DATE 2006: 850-855
42EEWei-Lun Hung, Xiaoxia Wu, Yuan Xie: Guaranteeing performance yield in high-level synthesis. ICCAD 2006: 303-309
41EEFeihui Li, Chrysostomos Nicopoulos, Thomas D. Richardson, Yuan Xie, Narayanan Vijaykrishnan, Mahmut T. Kandemir: Design and Management of 3D Chip Multiprocessors Using Network-in-Memory. ISCA 2006: 130-141
40EEWei-Lun Hung, Greg M. Link, Yuan Xie, Narayanan Vijaykrishnan, Mary Jane Irwin: Interconnect and Thermal-aware Floorplanning for 3D Microprocessors. ISQED 2006: 98-104
39EEShengqi Yang, Wayne Wolf, Narayanan Vijaykrishnan, Yuan Xie: Reliability-Aware SOC Voltage Islands Partition and Floorplan. ISVLSI 2006: 343-348
38EEMadhu Mutyam, Melvin Eze, Narayanan Vijaykrishnan, Yuan Xie: Delay and Energy Efficient Data Transmission for On-Chip Buses. ISVLSI 2006: 355-360
37EEFeng Wang, Yuan Xie, Kerry Bernstein, Yan Luo: Dependability Analysis of Nano-scale FinFET circuits. ISVLSI 2006: 399-404
36EER. Rajaraman, J. S. Kim, Narayanan Vijaykrishnan, Yuan Xie, Mary Jane Irwin: SEAT-LA: A Soft Error Analysis Tool for Combinational Logic. VLSI Design 2006: 499-502
35EEThomas D. Richardson, Chrysostomos Nicopoulos, Dongkook Park, Narayanan Vijaykrishnan, Yuan Xie, Chita R. Das, Vijay Degalahal: A Hybrid SoC Interconnect with Dynamic TDMA-Based Transaction-Less Buses and On-Chip Networks. VLSI Design 2006: 657-664
34EENarayanan Vijaykrishnan, Yuan Xie: Reliability Concerns in Embedded System Designs. IEEE Computer 39(1): 118-120 (2006)
33EEYuan Xie, Wayne Wolf, Haris Lekatsas: Code Compression for Embedded VLIW Processors Using Variable-to-Fixed Coding. IEEE Trans. VLSI Syst. 14(5): 525-536 (2006)
32EEYuan Xie, Gabriel H. Loh, Bryan Black, Kerry Bernstein: Design space exploration for 3D architectures. JETC 2(2): 65-103 (2006)
31EEYuan Xie, Wei-Lun Hung: Temperature-Aware Task Allocation and Scheduling for Embedded Multiprocessor Systems-on-Chip (MPSoC) Design. VLSI Signal Processing 45(3): 177-189 (2006)
2005
30EENarayanan Vijaykrishnan, Yuan Xie, Mary Jane Irwin: Designing reliable circuit in the presence of soft errors. ASP-DAC 2005: 1
29EEShengqi Yang, Wayne Wolf, Wenping Wang, Narayanan Vijaykrishnan, Yuan Xie: Low-leakage robust SRAM cell design for sub-100nm technologies. ASP-DAC 2005: 539-544
28EEJohn Conner, Yuan Xie, Mahmut T. Kandemir, Robert Dick, Greg M. Link: FD-HGAC: a hybrid heuristic/genetic algorithm hardware/software co-synthesis framework with fault detection. ASP-DAC 2005: 709-712
27EESuleyman Tosun, Nazanin Mansouri, Ercument Arvas, Mahmut T. Kandemir, Yuan Xie: Reliability-Centric High-Level Synthesis. DATE 2005: 1258-1263
26EEYuh-Fang Tsai, Narayanan Vijaykrishnan, Yuan Xie, Mary Jane Irwin: Leakage-Aware Interconnect for On-Chip Network. DATE 2005: 230-231
25EEShengqi Yang, Wayne Wolf, Narayanan Vijaykrishnan, Dimitrios N. Serpanos, Yuan Xie: Power Attack Resistant Cryptosystem Design: A Dynamic Voltage and Frequency Switching Approach. DATE 2005: 64-69
24EEWei-Lun Hung, Yuan Xie, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Mary Jane Irwin: Thermal-Aware Task Allocation and Scheduling for Embedded Systems. DATE 2005: 898-899
23EEYuh-Fang Tsai, Yuan Xie, Narayanan Vijaykrishnan, Mary Jane Irwin: Three-Dimensional Cache Design Exploration Using 3DCacti. ICCD 2005: 519-524
22EESri Hari Krishna Narayanan, Guilin Chen, Mahmut T. Kandemir, Yuan Xie: Temperature-Sensitive Loop Parallelization for Chip Multiprocessors. ICCD 2005: 677-682
21EEWei-Lun Hung, Greg M. Link, Yuan Xie, Narayanan Vijaykrishnan, Nagu R. Dhanwada, John Conner: Temperature-Aware Voltage Islands Architecting in System-on-Chip Design. ICCD 2005: 689-696
20EESuleyman Tosun, Ozcan Ozturk, Nazanin Mansouri, Ercument Arvas, Mahmut T. Kandemir, Yuan Xie, Wei-Lun Hung: An ILP Formulation for Reliability-Oriented High-Level Synthesis. ISQED 2005: 364-369
19EESuleyman Tosun, Nazanin Mansouri, Ercument Arvas, Mahmut T. Kandemir, Yuan Xie, Wei-Lun Hung: Reliability-Centric Hardware/Software Co-Design. ISQED 2005: 375-380
18EEWei-Lun Hung, Yuan Xie, Narayanan Vijaykrishnan, Charles Addo-Quaye, Theo Theocharides, Mary Jane Irwin: Thermal-Aware Floorplanning Using Genetic Algorithms. ISQED 2005: 634-639
17EEDaniel Hostetler, Yuan Xie: Adaptive Power Management in Software Radios Using Resolution Adaptive Analog to Digital Converters. ISVLSI 2005: 186-191
16EEShengqi Yang, Wayne Wolf, Narayanan Vijaykrishnan, Yuan Xie, Wenping Wang: Accurate Stacking Effect Macro-Modeling of Leakage Power in Sub-100nm Circuits. VLSI Design 2005: 165-170
15EEYuh-Fang Tsai, Narayanan Vijaykrishnan, Yuan Xie, Mary Jane Irwin: Influence of Leakage Reduction Techniques on Delay/Leakage Uncertainty. VLSI Design 2005: 374-379
2004
14EEWei Xu, Narayanan Vijaykrishnan, Yuan Xie, Mary Jane Irwin: Design of a nanosensor array architecture. ACM Great Lakes Symposium on VLSI 2004: 298-303
13EEYuan Xie, Lin Li, Mahmut T. Kandemir, Narayanan Vijaykrishnan, Mary Jane Irwin: Reliability-Aware Co-Synthesis for Embedded Systems. ASAP 2004: 41-50
12EEChang Hong Lin, Yuan Xie, Wayne Wolf: LZW-Based Code Compression for VLIW Embedded Systems. DATE 2004: 76-81
11EESuresh Srinivasan, Aman Gayasen, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Yuan Xie, Mary Jane Irwin: Improving soft-error tolerance of FPGA configuration bits. ICCAD 2004: 107-110
10EEWei-Lun Hung, Charles Addo-Quaye, Theo Theocharides, Yuan Xie, Narayanan Vijaykrishnan, Mary Jane Irwin: Thermal-Aware IP Virtualization and Placement for Networks-on-Chip Architecture. ICCD 2004: 430-437
9EEVijay Degalahal, R. Ramanarayanan, Narayanan Vijaykrishnan, Yuan Xie, Mary Jane Irwin: The Effect of Threshold Voltages on the Soft Error Rate. ISQED 2004: 503-508
2003
8EEYuan Xie, Wayne Wolf, Haris Lekatsas: Profile-Driven Selective Code Compression. DATE 2003: 10462-10467
7EEYuan Xie, Wayne Wolf, Haris Lekatsas: Code Compression Using Variable-to-fixed Coding Based on Arithmetic Coding. DCC 2003: 382-391
6EEYuan Xie, Jiang Xu, Wayne Wolf: Augmenting Platform-Based Design with Synthesis Tools. Journal of Circuits, Systems, and Computers 12(2): 125-142 (2003)
2002
5EEHaris Lekatsas, Wayne Wolf, Yuan Xie: Code Compression for VLIW Processors Using Variable-to-Fixed Coding. ISSS 2002: 138-143
2001
4EEYuan Xie, Wayne Wolf: Allocation and scheduling of conditional task graph in hardware/software co-synthesis. DATE 2001: 620-625
3EEYuan Xie, Haris Lekatsas, Wayne Wolf: Code Compression for VLIW Processors. Data Compression Conference 2001: 525
2EEYuan Xie, Wayne Wolf, Haris Lekatsas: A code decompression architecture for VLIW processors. MICRO 2001: 66-75
2000
1EEYuan Xie, Wayne Wolf: Co-synthesis with custom ASICs. ASP-DAC 2000: 129-134

Coauthor Index

1Charles Addo-Quaye [10] [18]
2Syed M. Alam [84]
3Ercument Arvas [19] [20] [27] [52]
4Sungmin Bae [79]
5Varsha Balakrishnan [87] [97]
6Kerry Bernstein [32] [37]
7Bryan Black [32] [50]
8Yu Cao [87] [92] [97]
9Krishnendu Chakrabarty [77] [85]
10Guilin Chen [22]
11Xiaoming Chen [87] [92]
12Yibo Chen [70] [77] [96]
13Yiran Chen [81] [90]
14Jason Cong [66]
15John Conner [21] [28]
16Chita R. Das [35] [60] [75]
17Reetuparna Das [60] [75]
18Michael DeBole [95] [97]
19Vijay Degalahal [9] [35]
20Nagu R. Dhanwada [21]
21Robert Dick [28]
22Xiangyu Dong [81] [90] [98]
23Soumya Eachempati [75]
24Melvin Eze [38]
25Paul Falkenstern [61] [85]
26Yunsi Fei [73]
27Paul Franzon [66]
28Aman Gayasen [11]
29Ku He [56] [59] [64]
30Daniel Hostetler [17]
31Wei-Lun Hung [10] [18] [19] [20] [21] [24] [31] [40] [42] [53] [55]
32Mike Ignatowski [84]
33Mary Jane Irwin [9] [10] [11] [13] [14] [15] [18] [23] [24] [26] [30] [36] [40] [43] [47] [51] [53] [55] [57] [58] [68] [69] [74] [83]
34Hai Ju [65]
35Mahmut T. Kandemir [11] [13] [19] [20] [22] [24] [27] [28] [41] [45] [47] [52] [53]
36Osama Awadel Karim [83]
37J. S. Kim [36]
38Jongman Kim [60]
39Haris Lekatsas [2] [3] [5] [7] [8] [33] [48]
40Feihui Li [41]
41Helen Li [81]
42Jian Li [89] [90] [91]
43Lin Li [13] [47]
44Chang Hong Lin [12] [49]
45Hai Lin [73]
46Greg M. Link [21] [28] [40]
47Gabriel H. Loh [32] [50]
48Hong Luo [56] [59] [64] [86] [97]
49Rong Luo [46] [56] [59] [64] [86]
50Yan Luo [37]
51Tiehan Lv [67]
52Prasanth Mangalagiri [44] [62] [69] [79] [83]
53Nazanin Mansouri [19] [20] [27] [52]
54Asit K. Mishra [75]
55Sibin Mohan [93]
56Frank Mueller [93]
57Amol Mupid [58]
58Madhu Mutyam [38] [58]
59Sri Hari Krishna Narayanan [22]
60Chrysostomos Nicopoulos [35] [41] [60] [63]
61Anthony S. Oates [88]
62Jin Ouyang [70] [71] [93]
63Ozcan Ozturk [20] [45]
64Dongkook Park [35] [60] [75]
65Raghuveer Raghavendra [93]
66Ramakrishnan Rajamony [89]
67R. Rajaraman [36] [54] [57] [74]
68Krishnan Ramakrishnan [57] [69] [74] [78] [79] [97]
69R. Ramanarayanan [9]
70Thomas D. Richardson [35] [41]
71Karthik Sarpatwari [44] [69] [83]
72Dimitrios N. Serpanos [25]
73Anand Sivasubramaniam [73]
74William Evan Speight (Evan Speight) [89] [91]
75Srinath Sridharan [95]
76Suresh Srinivasan [11] [44] [46] [62] [69]
77Guangyu Sun [73] [80] [81] [90] [95]
78S. Suresh [57]
79Andres Takach [94]
80Theo Theocharides [10] [18]
81Suleyman Tosun [19] [20] [27] [52]
82Yuh-Fang Tsai [15] [23] [26] [51] [68]
83K. Unlu [74]
84Balaji Vaidyanathan [46] [54] [55] [88]
85Narayanan Vijaykrishnan (Vijaykrishnan Narayanan) [9] [10] [11] [13] [14] [15] [16] [18] [21] [23] [24] [25] [26] [29] [30] [34] [35] [36] [38] [39] [40] [41] [43] [44] [46] [47] [51] [53] [55] [57] [58] [60] [62] [63] [67] [68] [69] [74] [75] [78] [79] [83] [95] [97]
86Wenping Wang [16] [29] [67] [87] [92] [97]
87Yu Wang [56] [59] [64] [86] [87] [88] [92] [97]
88Feng Wang [37] [43] [45] [54] [55] [63] [65] [68] [76] [80] [82] [94]
89Wayne Wolf [1] [2] [3] [4] [5] [6] [7] [8] [12] [16] [25] [29] [33] [39] [48] [49] [67]
90Xiaoxia Wu [42] [61] [63] [77] [78] [81] [82] [85] [89] [91]
91Xuebin Wu [72]
92Jiang Xu [6]
93Wei Xu [14]
94Zhiyuan Yan [72]
95Aditya Yanamandra [83]
96Huazhong Yang [56] [59] [64] [86] [87] [92]
97Shengqi Yang [16] [25] [29] [39] [67]
98Mazin S. Yousif [60]
99Lixin Zhang [89] [91]
100Tao Zhang [93]

Colors in the list of coauthors

Copyright © Tue Nov 3 08:52:44 2009 by Michael Ley (ley@uni-trier.de)