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Chuan-lin Wu Vis

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*1997
47EEW. Lynn Gallagher, Chuan-lin Wu: Evaluation of a memory hierarchy for the MTS multithreaded processor. ICPADS 1997: 346-351
1995
46EEJin Li, Chuan-lin Wu: A modular growth architecture for an ATM switch. ICCCN 1995: 420
45EEJin Li, Chuan-lin Wu: A novel architecture for an ATM switch. ICCD 1995: 340-345
44EEJin Li, Chuan-lin Wu: Design and implementation of a multicast-buffer ATM switch. ICNP 1995: 84-91
43 Chao Chi Tong, Chuan-lin Wu: Routing in a Three-Dimensional Chip. IEEE Trans. Computers 44(1): 106-117 (1995)
1994
42 Dz-Ching Ju, Chuan-lin Wu, Paul R. Carini: Statement Merge: an Inter-Statement Optimization of Array Language Programs. ICPP 1994: 126-129
41 Hsiao-chen Chung, Chuan-lin Wu, James Rakes, Peter J. Zievers, Yin-Kuan Lin: Design and Evaluation of a Multiprocessor Architecture with Decentralized Control. ICPP (1) 1994: 97-100
40EEDz-Ching Ju, Chuan-lin Wu, Paul R. Carini: The Classification, Fusion, and Parallelization of Array Language Primitives. IEEE Trans. Parallel Distrib. Syst. 5(10): 1113-1120 (1994)
1993
39 Yi-Hsiu Wei, Chuan-lin Wu: Integrating RPC and Message Passing for Distributed Programming. DCE Workshop 1993: 192-206
38 Terence M. Potter, Hsiao-chen Chung, Chuan-lin Wu: Reconfigurable Branch Processing Strategy in Super-Scalar Microprocessors. ICPP 1993: 47-50
37 Avijit Saha, Chuan-lin Wu, Dun-Sung Tang: Approximation, Dimension Reduction, and Nonconvex Optimization Using Linear Superpositions of Gaussians. IEEE Trans. Computers 42(10): 1222-1233 (1993)
1992
36 Dz-Ching Ju, Chuan-lin Wu, Paul R. Carini: The Synthesis of Array Functions and Its Use in Parallel Computation. ICPP (2) 1992: 293-296
35EEThang Tran, Chuan-lin Wu: Limitation of superscalar microprocessor performance. MICRO 1992: 33-36
34 Chuan-lin Wu, Manjai Lee: Performance Analysis of Multistage Interconnection Network Configurations and Operations. IEEE Trans. Computers 41(1): 18-27 (1992)
1991
33EEDz-Ching Ju, Wai-Mee Ching, Chuan-lin Wu: On Performance and Space Usage Improvements for Parallelized Compiled APL Code. APL 1991: 234-243
32 Thang Tran, Chuan-lin Wu: Microprocessor Architecture with Multi-Bit Scoreboard Concurrency Control. ICPP (1) 1991: 128-135
31 R. Guru Prasadh, Chuan-lin Wu: A Benchmark Evaluation of a Multi-threaded RISC Processor Architecture. ICPP (1) 1991: 84-91
30 Lingtao Wang, Chuan-lin Wu: Distributed Instruction Set Computer Architecture. IEEE Trans. Computers 40(8): 915-934 (1991)
29EENader Bagherzadeh, Seng-lai Heng, Chuan-lin Wu: A Parallel Asynchronous Garbage Collection Algorithm for Distributed Systems. IEEE Trans. Knowl. Data Eng. 3(1): 100-107 (1991)
28EEAlbert C. Chen, Chuan-lin Wu: A Parallel Execution Model of Logic Programs. IEEE Trans. Parallel Distrib. Syst. 2(1): 79-92 (1991)
1990
27EEAvijit Saha, Jim Christian, Dun-Sung Tang, Chuan-lin Wu: Oriented Non-Radial Basis Functions for Image Coding and Analysis. NIPS 1990: 728-734
1989
26 Woei Lin, Chuan-lin Wu: A Fault-Tolerant Mapping Scheme for a Configurable Multiprocessor System. IEEE Trans. Computers 38(2): 227-237 (1989)
25 Geoffrey M. Brown, Mohamed G. Gouda, Chuan-lin Wu: Token Systems that Self-Stabilize. IEEE Trans. Computers 38(6): 845-852 (1989)
24 Woei Lin, Tsang-Ling Sheu, Chita R. Das, Tse-Yun Feng, Chuan-lin Wu: A Conflict-Free Routing Scheme on Multistage Interconnection Networks. IEEE Trans. Computers 38(8): 1086-1097 (1989)
1988
23 Chung-Yang Chiang, Chuan-lin Wu: Adaptive Checkpointing and Rollback in Multiprocessor Systems. ICPP (1) 1988: 400-403
22 Lingtao Wang, Chuan-lin Wu: Distributed Instruction Set Computer. ICPP (1) 1988: 426-429
21EELingtao Wang, Chuan-lin Wu: I-NET mechanism for issuing multiple instructions. SC 1988: 88-95
20 Woei Lin, Chuan-lin Wu: A Distributed Resource Management Mechanism for a Partitionable Multiprocessor System. IEEE Trans. Computers 37(2): 201-210 (1988)
1986
19 Geoffrey M. Brown, Chuan-lin Wu: Operating System Kernel for a Reconfigurable Multiprocessor System. ICPP 1986: 234-241
18 Chung-Yang Chiang, Chuan-lin Wu: Fail Safe Distributed Fault Diagnosis of Multiprocessor Systems. ICPP 1986: 358-365
17 Karam Mossaad, Chuan-lin Wu: Efficient Execution of Programs with Pipeline Configuration of Reconfigurable Multiprocessor. ICPP 1986: 552-554
16 Woei Lin, Chuan-lin Wu: Reconfiguration Procedures for a Polymorphic and Partitionable Multiprocessor. IEEE Trans. Computers 35(10): 910-916 (1986)
1985
15 Manjai Lee, Eric Fiene, Chuan-lin Wu, Geoffrey Brown, Nader Bagherzadeh: Network Facility for a Reconfigurable Computer Architecture. ICDCS 1985: 264-271
14 Woei Lin, Chuan-lin Wu: Design of Configuration Algorithms of Commonly-Used Topologies for a Multiprocessor : STAR. ICPP 1985: 734-741
13 Chuan-lin Wu: Multiprocessing Technology - Guest Editor's Introduction. IEEE Computer 18(6): 6-7 (1985)
1984
12 Manjai Lee, Chuan-lin Wu: Performance Analysis of Circuit Switching Baseline Interconnection Networks. ISCA 1984: 82-90
1983
11 Woei Lin, Chuan-lin Wu: Configuring Computation Tree Topologies on a Distributed Computing System. ICPP 1983: 114-116
1982
10 Chuan-lin Wu: DDBC - A Distributed Database Computer for Very Large Data Base Management. COMPCON 1982: 24-27
9 Chuan-lin Wu, Woei Lin, Min-Chang Lin: Distributed circuit switching starnet. ICPP 1982: 26-33
8EEWoei Lin, Chuan-lin Wu: Design of a 2 × 2 fault-tolerant switching element. ISCA 1982: 181-189
7 Chuan-lin Wu, Tse-Yun Feng, Min-Chang Lin: Star: A Local Network System for Real-Time Management of Imagery Data. IEEE Trans. Computers 31(10): 923-933 (1982)
1981
6 Chuan-lin Wu: Interconnection Networks - Guest Editor's Introduction. IEEE Computer 14(12): 8-9 (1981)
5 Tse-Yun Feng, Chuan-lin Wu: Fault-Diagnosis for a Class of Multistage Interconnection Networks. IEEE Trans. Computers 30(10): 743-758 (1981)
4 Chuan-lin Wu, Tse-Yun Feng: The Universality of the Shuffle-Exchange Network. IEEE Trans. Computers 30(5): 324-332 (1981)
1980
3 Chuan-lin Wu, Tse-Yun Feng: On a Class of Multistage Interconnection Networks. IEEE Trans. Computers 29(8): 694-702 (1980)
2 Chuan-lin Wu, Tse-Yun Feng: The Reverse-Exchange Interconnection Network. IEEE Trans. Computers 29(9): 801-811 (1980)
1979
1 Tse-Yun Feng, Chuan-lin Wu, Dharma P. Agrawal: A Microprocessor-Controlled Asynchronous Circuit Switching Network. ISCA 1979: 202-215

Coauthor Index

1Dharma P. Agrawal [1]
2Nader Bagherzadeh [15] [29]
3Geoffrey Brown [15]
4Geoffrey M. Brown [19] [25]
5Paul R. Carini [36] [40] [42]
6Albert C. Chen [28]
7Chung-Yang Chiang [18] [23]
8Wai-Mee Ching [33]
9Jim Christian [27]
10Hsiao-chen Chung [38] [41]
11Chita R. Das [24]
12Tse-Yun Feng [1] [2] [3] [4] [5] [7] [24]
13Eric Fiene [15]
14W. Lynn Gallagher [47]
15Mohamed G. Gouda [25]
16Seng-lai Heng [29]
17Roy Dz-Ching Ju (Roy Ju, Dz-Ching Ju) [33] [36] [40] [42]
18Manjai Lee [12] [15] [34]
19Jin Li [44] [45] [46]
20Min-Chang Lin [7] [9]
21Woei Lin [8] [9] [11] [14] [16] [20] [24] [26]
22Yin-Kuan Lin [41]
23Karam Mossaad [17]
24Terence M. Potter [38]
25R. Guru Prasadh [31]
26James Rakes [41]
27Avijit Saha [27] [37]
28Tsang-Ling Sheu [24]
29Dun-Sung Tang [27] [37]
30Chao Chi Tong [43]
31Thang Tran [32] [35]
32Lingtao Wang [21] [22] [30]
33Yi-Hsiu Wei [39]
34Peter J. Zievers [41]

Colors in the list of coauthors

Copyright © Tue Nov 3 08:52:44 2009 by Michael Ley (ley@uni-trier.de)