dblp.uni-trier.dewww.uni-trier.de

Cheng-Wen Wu Vis

List of publications from the DBLP Bibliography Server - FAQ
Coauthor Index - Ask others: ACM DL/Guide - CiteSeerX - CSB - MetaPress - Google - Bing - Yahoo

*2009
122EELi-Ming Denq, Yu-Tsao Hsing, Cheng-Wen Wu: Hybrid BIST Scheme for Multiple Heterogeneous Embedded Memories. IEEE Design & Test of Computers 26(2): 64-73 (2009)
2008
121EEJen-Chieh Yeh, Chao-Hsun Chen, Cheng-Wen Wu, Shuo-Fen Kuo: A Systematic Approach to Memory Test Time Reduction. IEEE Design & Test of Computers 25(6): 560-570 (2008)
120EEChin-Lung Su, Chih-Wea Tsai, Cheng-Wen Wu, Chien-Chung Hung, Young-Shying Chen, Ding-Yeong Wang, Yuan-Jen Lee, Ming-Jer Kao: Write Disturbance Modeling and Testing for MRAM. IEEE Trans. VLSI Syst. 16(3): 277-288 (2008)
2007
119EEYu-Tsao Hsing, Chun-Chieh Huang, Jen-Chieh Yeh, Cheng-Wen Wu: SDRAM Delay Fault Modeling and Performance Testing. VTS 2007: 53-58
118EECheng-Wen Wu: SOC Testing Methodology and Practice CoRR abs/0710.4669: (2007)
117EERei-Fu Huang, Chao-Hsun Chen, Cheng-Wen Wu: Economic Aspects of Memory Built-in Self-Repair. IEEE Design & Test of Computers 24(2): 164-172 (2007)
116EERei-Fu Huang, Jin-Fu Li, Jen-Chieh Yeh, Cheng-Wen Wu: Raisin: Redundancy Analysis Algorithm Simulation. IEEE Design & Test of Computers 24(4): 386-396 (2007)
115EEChih-Yen Lo, Chen-Hsing Wang, Kuo-Liang Cheng, Jing-Reng Huang, Chih-Wea Wang, Shin-Moe Wang, Cheng-Wen Wu: STEAC: A Platform for Automatic SOC Test Integration. IEEE Trans. VLSI Syst. 15(5): 541-545 (2007)
114EEJen-Chieh Yeh, Kuo-Liang Cheng, Yung-Fa Chou, Cheng-Wen Wu: Flash Memory Testing and Built-In Self-Diagnosis With March-Like Test Algorithms. IEEE Trans. on CAD of Integrated Circuits and Systems 26(6): 1101-1113 (2007)
2006
113EEChen-Hsing Wang, Chih-Yen Lo, Min-Sheng Lee, Jen-Chieh Yeh, Chih-Tsun Huang, Cheng-Wen Wu, Shi-Yu Huang: A network security processor design based on an integrated SOC design and test platform. DAC 2006: 490-495
112EEMu-Hsien Hsu, Yu-Tsao Hsing, Jen-Chieh Yeh, Cheng-Wen Wu: Fault-Pattern Oriented Defect Diagnosis for Flash Memory. MTDT 2006: 3-8
111EEYu-Ying Hsiao, Chao-Hsun Chen, Cheng-Wen Wu: A Built-In Self-Repair Scheme for NOR-Type Flash Memory. VTS 2006: 114-119
110EECheng-Wen Wu: Session Abstract. VTS 2006: 128-129
109EEShyue-Kung Lu, Yu-Chen Tsai, Chih-Hsien Hsu, Kuo-Hua Wang, Cheng-Wen Wu: Efficient built-in redundancy analysis for embedded memories with 2-D redundancy. IEEE Trans. VLSI Syst. 14(1): 34-42 (2006)
2005
108EEChih-Pin Su, Chia-Lung Horng, Chih-Tsun Huang, Cheng-Wen Wu: A configurable AES processor for enhanced security. ASP-DAC 2005: 361-366
107EEChih-Pin Su, Chen-Hsing Wang, Kuo-Liang Cheng, Chih-Tsun Huang, Cheng-Wen Wu: Design and test of a scalable security processor. ASP-DAC 2005: 372-375
106EEYu-Chun Dawn, Jen-Chieh Yeh, Cheng-Wen Wu, Chia-Ching Wang, Yung-Chen Lin, Chao-Hsun Chen: Flash Memory Die Sort by a Sample Classification Method. Asian Test Symposium 2005: 182-187
105EECheng-Wen Wu: SOC Testing Methodology and Practice. DATE 2005: 1120-1121
104EEChin-Lung Su, Yi-Ting Yeh, Cheng-Wen Wu: An Integrated ECC and Redundancy Repair Scheme for Memory Reliability Enhancement. DFT 2005: 81-92
103EEJen-Chieh Yeh, Yan-Ting Lai, Yuan-Yuan Shih, Cheng-Wen Wu, Chien-Hung Ho, Yen-Tai Lin: Flash Memory Built-In Self-Diagnosis with Test Mode Control. VTS 2005: 15-20
102EEChun-Chieh Wang, Jing-Jia Liou, Yen-Lin Peng, Chih-Tsun Huang, Cheng-Wen Wu: A BIST Scheme for FPGA Interconnect Delay Faults. VTS 2005: 201-206
101EEJin-Fu Li, Jen-Chieh Yeh, Rei-Fu Huang, Cheng-Wen Wu: A built-in self-repair design for RAMs with 2-D redundancy. IEEE Trans. VLSI Syst. 13(6): 742-745 (2005)
2004
100EERei-Fu Huang, Yan-Ting Lai, Yung-Fa Chou, Cheng-Wen Wu: SRAM delay fault modeling and test algorithm development. ASP-DAC 2004: 104-109
99EEMao-Yin Wang, Chih-Pin Su, Chih-Tsun Huang, Cheng-Wen Wu: An HMAC processor with integrated SHA-1 and MD5 algorithms. ASP-DAC 2004: 456-458
98EEChih-Tsun Huang, Jen-Chieh Yeh, Yuan-Yuan Shih, Rei-Fu Huang, Cheng-Wen Wu: On Test and Diagnostics of Flash Memories. Asian Test Symposium 2004: 260-265
97EERei-Fu Huang, Chin-Lung Su, Cheng-Wen Wu, Shen-Tien Lin, Kun-Lun Luo, Yeong-Jar Chang: Fail Pattern Identification for Memory Built-In Self-Repair. Asian Test Symposium 2004: 366-371
96EEHao-Chiao Hong, Cheng-Wen Wu, Kwang-Ting Cheng: A Signa-Delta Modulation Based Analog BIST System with a Wide Bandwidth Fifth-Order Analog Response Extractor for Diagnosis Purpose. Asian Test Symposium 2004: 62-67
95EEYu-Tsao Hsing, Chih-Wea Wang, Ching-Wei Wu, Chih-Tsun Huang, Cheng-Wen Wu: Failure Factor Based Yield Enhancement for SRAM Designs. DFT 2004: 20-28
94EEYen-Lin Peng, Jing-Jia Liou, Chih-Tsun Huang, Cheng-Wen Wu: An Application-Independent Delay Testing Methodology for Island-Style FPGA. DFT 2004: 478-486
93EEChin-Lung Su, Rei-Fu Huang, Cheng-Wen Wu, Chien-Chung Hung, Ming-Jer Kao, Yeong-Jar Chang, Wen Ching Wu: MRAM Defect Analysis and Fault Modeli. ITC 2004: 124-133
92EELi-Ming Denq, Rei-Fu Huang, Cheng-Wen Wu, Yeong-Jar Chang, Wen Ching Wu: A Parallel Built-in Diagnostic Scheme for Multiple Embedded Memories. MTDT 2004: 65-69
91EEBin-Hong Lin, Cheng-Wen Wu, Hwei-Tsu Ann Luh: Efficient and Economical Test Equipment Setup Using Procorrelation. IEEE Design & Test of Computers 21(1): 34-43 (2004)
90EEChih-Pin Su, Cheng-Wen Wu: A Graph-Based Approach to Power-Constrained SOC Test Scheduling. J. Electronic Testing 20(1): 45-60 (2004)
2003
89EERei-Fu Huang, Yung-Fa Chou, Cheng-Wen Wu: Defect Oriented Fault Analysis for SRAM. Asian Test Symposium 2003: 256-261
88EEChin-Lung Su, Rei-Fu Huang, Cheng-Wen Wu: A Processor-Based Built-In Self-Repair Design for Embedded Memories. Asian Test Symposium 2003: 366-371
87EEKuo-Liang Cheng, Chih-Wea Wang, Jih-Nung Lee, Yung-Fa Chou, Chih-Tsun Huang, Cheng-Wen Wu: FAME: A Fault-Pattern Based Memory Failure Analysis Framework. ICCAD 2003: 595-598
86EEShyue-Kung Lu, Jian-Long Chen, Cheng-Wen Wu, Ken-Feng Chang, Shi-Yu Huang: Combinational circuit fault diagnosis using logic emulation. ISCAS (5) 2003: 549-552
85EEChih-Wea Wang, Kuo-Liang Cheng, Jih-Nung Lee, Yung-Fa Chou, Chih-Tsun Huang, Cheng-Wen Wu, Frank Huang, Hong-Tzer Yang: Fault Pattern Oriented Defect Diagnosis for Memories. ITC 2003: 29-38
84EEJin-Fu Li, Jen-Chieh Yeh, Rei-Fu Huang, Cheng-Wen Wu, Peir-Yuan Tsai, Archer Hsu, Eugene Chow: A Built-In Self-Repair Scheme for Semiconductor Memories with 2-D Redundancy. ITC 2003: 393-402
83EERei-Fu Huang, Li-Ming Denq, Cheng-Wen Wu, Jin-Fu Li: A Testability-Driven Optimizer and Wrapper Generator for Embedded Memories. MTDT 2003: 53-
82EEChih-Wea Wang, Kuo-Liang Cheng, Chih-Tsun Huang, Cheng-Wen Wu: Test and Diagnosis of Word-Oriented Multiport Memories. VTS 2003: 248-253
81EEJin-Hua Hong, Cheng-Wen Wu: Cellular-array modular multiplier for fast RSA public-key cryptosystem based on modified Booth's algorithm. IEEE Trans. VLSI Syst. 11(3): 474-484 (2003)
80EEChih-Tsun Huang, Chi-Feng Wu, Jin-Fu Li, Cheng-Wen Wu: Built-in redundancy analysis for memory yield improvement. IEEE Transactions on Reliability 52(4): 386-399 (2003)
79EEJin-Fu Li, Ruey-Shing Tzeng, Cheng-Wen Wu: Testing and Diagnosis Methodologies for Embedded Content Addressable Memories. J. Electronic Testing 19(2): 207-215 (2003)
78EEHong-Chou Kao, Ming-Fu Tsai, Shi-Yu Huang, Cheng-Wen Wu, Wen-Feng Chang, Shyue-Kung Lu: Efficient Double Fault Diagnosis for CMOS Logic Circuits With a Specific Application to Generic Bridging Faults. J. Inf. Sci. Eng. 19(4): 571-587 (2003)
77EEShao-Hui Shieh, Cheng-Wen Wu: Asymmetric High-Radix Signed-Digit Number Systems for Carry-Free Addition. J. Inf. Sci. Eng. 19(6): 1015-1039 (2003)
2002
76EEChih-Wea Wang, Jing-Reng Huang, Yen-Fu Lin, Kuo-Liang Cheng, Chih-Tsun Huang, Cheng-Wen Wu, Youn-Long Lin: Test Scheduling of BISTed Memory Cores for SOC. Asian Test Symposium 2002: 356-
75EEHuan-Shan Hsu, Jing-Reng Huang, Kuo-Liang Cheng, Chih-Wea Wang, Chih-Tsun Huang, Cheng-Wen Wu, Youn-Long Lin: Test Scheduling and Test Access Architecture Optimization for System-on-Chip. Asian Test Symposium 2002: 411-
74EEHao-Chiao Hong, Jiun-Lang Huang, Kwang-Ting Cheng, Cheng-Wen Wu: On-chip Analog Response Extraction with 1-Bit ? - Modulators. Asian Test Symposium 2002: 49-
73EEJin-Fu Li, Hsin-Jung Huang, Jeng-Bin Chen, Chih-Pin Su, Cheng-Wen Wu, Chuang Cheng, Shao-I Chen, Chi-Yi Hwang, Hsiao-Ping Lin: A Hierarchical Test Scheme for System-On-Chip Designs. DATE 2002: 486-490
72EEJen-Chieh Yeh, Chi-Feng Wu, Kuo-Liang Cheng, Yung-Fa Chou, Chih-Tsun Huang, Cheng-Wen Wu: Flash Memory Built-In Self-Test Using March-Like Algorithm. DELTA 2002: 137-141
71EERei-Fu Huang, Jin-Fu Li, Jen-Chieh Yeh, Cheng-Wen Wu: A Simulator for E aluating Redundancy Analysis Algorithms of Repairable Embedded Memories. IOLTW 2002: 262-
70EESau-Kwo Chiu, Jen-Chieh Yeh, Chih-Tsun Huang, Cheng-Wen Wu: Diagonal Test and Diagnostic Schemes for Flash Memorie. ITC 2002: 37-46
69EERei-Fu Huang, Jin-Fu Li, Jen-Chieh Yeh, Cheng-Wen Wu: A Simulator for Evaluating Redundancy Analysis Algorithms of Repairable Embedded Memories. MTDT 2002: 68-
68EEKuo-Liang Cheng, Jen-Chieh Yeh, Chih-Wea Wang, Chih-Tsun Huang, Cheng-Wen Wu: RAMSES-FT: A Fault Simulator for Flash Memory Testing and Diagnostics. VTS 2002: 281-288
67EEJin-Fu Li, Ruey-Shing Tzeng, Cheng-Wen Wu: Testing and Diagnosing Embedded Content Addressable Memories. VTS 2002: 389-394
66EEJin-Fu Li, Hsin-Jung Huang, Jeng-Bin Chen, Chih-Pin Su, Cheng-Wen Wu, Chuang Cheng, Shao-I Chen, Chi-Yi Hwang, Hsiao-Ping Lin: A Hierarchical Test Methodology for Systems on Chip. IEEE Micro 22(5): 69-81 (2002)
65EEJin-Fu Li, Cheng-Wen Wu: Efficient FFT network testing and diagnosis schemes. IEEE Trans. VLSI Syst. 10(3): 267-278 (2002)
64EEKuo-Liang Cheng, Ming-Fu Tsai, Cheng-Wen Wu: Neighborhood pattern-sensitive fault testing and diagnostics for random-access memories. IEEE Trans. on CAD of Integrated Circuits and Systems 21(11): 1328-1336 (2002)
63EEChi-Feng Wu, Chih-Tsun Huang, Kuo-Liang Cheng, Cheng-Wen Wu: Fault simulation and test algorithm generation for random accessmemories. IEEE Trans. on CAD of Integrated Circuits and Systems 21(4): 480-490 (2002)
62EEJin-Fu Li, Ruey-Shing Tzeng, Cheng-Wen Wu: Diagnostic Data Compression Techniques for Embedded Memories with Built-In Self-Test. J. Electronic Testing 18(4-5): 515-527 (2002)
61EEChih-Wea Wang, Chi-Feng Wu, Jin-Fu Li, Cheng-Wen Wu, Tony Teng, Kevin Chiu, Hsiao-Ping Lin: A Built-in Self-Test Scheme with Diagnostics Support for Embedded SRAM. J. Electronic Testing 18(6): 637-647 (2002)
2001
60EEChing-Hong Tsai, Cheng-Wen Wu: Processor-programmable memory BIST for bus-connected embedded memories. ASP-DAC 2001: 325-330
59EEChung-Hsien Wu, Jin-Hua Hong, Cheng-Wen Wu: RSA cryptosystem design based on the Chinese remainder theorem. ASP-DAC 2001: 391-395
58EEChih-Wea Wang, Ruey-Shing Tzeng, Chi-Feng Wu, Chih-Tsun Huang, Cheng-Wen Wu, Shi-Yu Huang, Shyh-Horng Lin, Hsin-Po Wang: A Built-in Self-Test and Self-Diagnosis Scheme for Heterogeneous SRAM Clusters. Asian Test Symposium 2001: 103-
57EEKuo-Liang Cheng, Chia-Ming Hsueh, Jing-Reng Huang, Jen-Chieh Yeh, Chih-Tsun Huang, Cheng-Wen Wu: Automatic Generation of Memory Built-in Self-Test Cores for System-on-Chip. Asian Test Symposium 2001: 91-96
56EEChi-Feng Wu, Chih-Tsun Huang, Kuo-Liang Cheng, Chih-Wea Wang, Cheng-Wen Wu: Simulation-Based Test Algorithm Generation and Port Scheduling for Multi-Port Memories. DAC 2001: 301-306
55EEJin-Fu Li, Cheng-Wen Wu: Memory fault diagnosis by syndrome compression. DATE 2001: 97-101
54 Jin-Fu Li, Kuo-Liang Cheng, Chih-Tsun Huang, Cheng-Wen Wu: March-based RAM diagnosis algorithms for stuck-at and coupling faults. ITC 2001: 758-767
53EEKuo-Liang Cheng, Ming-Fu Tsai, Cheng-Wen Wu: Efficient Neighborhood Pattern-Sensitive Fault Test Algorithms for Semiconductor Memories. VTS 2001: 225-230
52EEShih-Arn Hwang, Cheng-Wen Wu: Unified VLSI systolic array design for LZ data compression. IEEE Trans. VLSI Syst. 9(4): 489-499 (2001)
51EEChung-Hsien Wu, Jin-Hua Hong, Cheng-Wen Wu: VLSI Design of RSA Cryptosystem Based on the Chinese Remainder Theorem. J. Inf. Sci. Eng. 17(6): 967-980 (2001)
2000
50EEChih-Tsun Huang, Jing-Reng Huang, Cheng-Wen Wu: A programmable built-in self-test core for embedded memories. ASP-DAC 2000: 11-12
49EEJin-Hua Hong, Cheng-Wen Wu: Radix-4 modular multiplication and exponentiation algorithms for the RSA public-key cryptosystem. ASP-DAC 2000: 565-570
48EELijian Li, Xiaoyang Yu, Cheng-Wen Wu, Yinghua Min: A waveform simulator based on Boolean process. Asian Test Symposium 2000: 145-150
47EEShyue-Kung Lu, Jeh-Sheng Shih, Cheng-Wen Wu: A Testable/Fault Tolerant FFT Processor Design. Asian Test Symposium 2000: 429-
46EEChih-Wea Wang, Chi-Feng Wu, Jin-Fu Li, Cheng-Wen Wu, Tony Teng, Kevin Chiu, Hsiao-Ping Lin: A built-in self-test and self-diagnosis scheme for embedded SRAM. Asian Test Symposium 2000: 45-50
45EEJing-Reng Huang, Chee-Kian Ong, Kwang-Ting Cheng, Cheng-Wen Wu: An FPGA-based re-configurable functional tester for memory chips. Asian Test Symposium 2000: 51-57
44EEJuin-Ming Lu, Cheng-Wen Wu: Cost and Benefit Models for Logic and Memory BIST. DATE 2000: 710-714
43EEChuang Cheng, Chih-Tsun Huang, Jing-Reng Huang, Cheng-Wen Wu, Chen-Jong Wey, Ming-Chang Tsai: BRAINS: A BIST Compiler for Embedded Memories. DFT 2000: 299-
42 Chi-Feng Wu, Chih-Tsun Huang, Chih-Wea Wang, Kuo-Liang Cheng, Cheng-Wen Wu: Error Catch and Analysis for Semiconductor Memories Using March Tests. ICCAD 2000: 468-471
41EEChi-Feng Wu, Chih-Tsun Huang, Kuo-Liang Cheng, Cheng-Wen Wu: Simulation-Based Test Algorithm Generation for Random Access Memories. VTS 2000: 291-296
40EEKun-Jin Lin, Cheng-Wen Wu: A Low-Power CAM Design for LZ Data Compression. IEEE Trans. Computers 49(10): 1139-1145 (2000)
39EEJin-Hua Hong, Chung-Hung Tsai, Cheng-Wen Wu: Hierarchical system test by an IEEE 1149.5 MTM-bus slave-module interface core. IEEE Trans. VLSI Syst. 8(5): 503-516 (2000)
38EEKun-Jin Lin, Cheng-Wen Wu: Testing content-addressable memories using functional fault modelsand march-like algorithms. IEEE Trans. on CAD of Integrated Circuits and Systems 19(5): 577-588 (2000)
37EEBin-Hong Lin, Shao-Hui Shieh, Cheng-Wen Wu: A fast signature computation algorithm for LFSR and MISR. IEEE Trans. on CAD of Integrated Circuits and Systems 19(9): 1031-1040 (2000)
36EEChih-Yuang Su, Cheng-Wen Wu: A Probabilistic Model for Path Delay Fault Testing. J. Inf. Sci. Eng. 16(5): 783-794 (2000)
1999
35EEChi-Feng Wu, Cheng-Wen Wu: Testing Interconnects of Dynamic Reconfigurable FPGAs. ASP-DAC 1999: 279-282
34EEShyue-Kung Lu, Tsung-Ying Lee, Cheng-Wen Wu: Defect Level Prediction Using Multi-Model Fault Coverage. Asian Test Symposium 1999: 301-
33EEChi-Feng Wu, Chih-Tsun Huang, Cheng-Wen Wu: RAMSES: A Fast Memory Fault Simulator. DFT 1999: 165-173
32EEJin-Fu Li, Cheng-Wen Wu: Testable and Fault Tolerant Design for FFT Networks. DFT 1999: 201-209
31EEShyue-Kung Lu, Cheng-Wen Wu: A novel approach to testing LUT-based FPGAs. ISCAS (1) 1999: 173-177
30EEChih-Tsun Huang, Jing-Reng Huang, Chi-Feng Wu, Cheng-Wen Wu, Tsin-Yuan Chang: A Programmable BIST Core for Embedded DRAM. IEEE Design & Test of Computers 16(1): 59-70 (1999)
29 Wen-Feng Chang, Cheng-Wen Wu: Low-Cost Modular Totally Self-Checking Checker Design for m-out-of-n Code. IEEE Trans. Computers 48(8): 815-826 (1999)
28EEChih-Yuang Su, Shih-Am Hwang, Po-Song Chen, Cheng-Wen Wu: An improved Montgomery's algorithm for high-speed RSA public-key cryptosystem. IEEE Trans. VLSI Syst. 7(2): 280-284 (1999)
27EEWen-Feng Chang, Cheng-Wen Wu: TSC Berger-Code Checker Design for 2r-1-Bit Information. J. Inf. Sci. Eng. 15(3): 429-440 (1999)
26EEShih-Arn Hwang, Cheng-Wen Wu: Test Energy Minimization for C-Testable ILAs. J. Inf. Sci. Eng. 15(6): 899-911 (1999)
1998
25EEYu-Chun Chuang, Cheng-Wen Wu: On-Line Error Detection Schemes for a Systolic Finite-Field Inverter. Asian Test Symposium 1998: 301-305
24EECheng-Wen Wu: Testing Embedded Memories: Is BIST the Ultimate Solution?. Asian Test Symposium 1998: 516-517
23EECheng-Wen Wu, Chih-Yuang Su: A Probabilistic Model for Path Delay Faults. Asian Test Symposium 1998: 70-75
22EEYeong-Ruey Shieh, Cheng-Wen Wu: Control and Observation Structures for Analog Circuits. IEEE Design & Test of Computers 15(2): 56-64 (1998)
21EEShih-Arn Hwang, Jin-Hua Hong, Cheng-Wen Wu: Sequential circuit fault simulation using logic emulation. IEEE Trans. on CAD of Integrated Circuits and Systems 17(8): 724-736 (1998)
1997
20EECheng-Wen Wu: On energy efficiency of VLSI testing. Asian Test Symposium 1997: 132-137
19EEChih-Tsun Huang, Cheng-Wen Wu: High-speed C-testable systolic array design for Galois-field inversion. ED&TC 1997: 342-346
18 Shyue-Kung Lu, Sy-Yen Kuo, Cheng-Wen Wu: Fault-Tolerant Interleaved Memory Systems with Two-Level Redundancy. IEEE Trans. Computers 46(9): 1028-1034 (1997)
17EEWen-Feng Chang, Cheng-Wen Wu: Does There Exist a Combinational TSC Checker for 1/3 Code Using Only Primitive Gates? J. Inf. Sci. Eng. 13(4): 681-695 (1997)
1996
16EEBin-Hong Lin, Shao-Hui Shieh, Cheng-Wen Wu: A MISR Computation Algorithm for Fast Signature Simulation. Asian Test Symposium 1996: 213-218
15EEJin-Hua Hong, Chung-Hung Tsai, Cheng-Wen Wu: Hierarchical Testing Using the IEEE Std 1149.5 Module Test and Maintenance Slave Interface Module. Asian Test Symposium 1996: 50-55
14EEShyue-Kung Lu, Cheng-Wen Wu, Ruei-Zong Hwang: Cell delay fault testing for iterative logic arrays. J. Electronic Testing 9(3): 311-316 (1996)
1995
13EEYeong-Ruey Shieh, Cheng-Wen Wu: DC control and observation structures for analog circuits. Asian Test Symposium 1995: 120-126
12EEShyue-Kung Lu, Jen-Chuan Wang, Cheng-Wen Wu: C-testable design techniques for iterative logic arrays. IEEE Trans. VLSI Syst. 3(1): 146-152 (1995)
11EEYih-Lang Li, Cheng-Wen Wu: Cellular automata for efficient parallel logic and fault simulation. IEEE Trans. on CAD of Integrated Circuits and Systems 14(6): 740-749 (1995)
10EECheng-Wen Wu, Ming-Kwang Chang: Bit-level systolic arrays for finite-field multiplications. VLSI Signal Processing 10(1): 85-92 (1995)
1994
9 Yih-Lang Li, Cheng-Wen Wu: Logic and Fault Simulation by Cellular Automata. EDAC-ETC-EUROASIC 1994: 552-556
8 Cheng-Wen Wu, Yung-Fa Chou: General Modular Multiplication by Block Multiplication and Table Lookup. ISCAS 1994: 295-298
7 Shih-Yuang Su, Cheng-Wen Wu: Testing Iterative Logic Arrays for Sequential Faults with a Constant Number of Patterns. IEEE Trans. Computers 43(4): 495-501 (1994)
1993
6EECheng-Wen Wu, Jiann-Yuan Choue: Fault-Tolerant FFT Butterfly Network Design. J. Inf. Sci. Eng. 9(1): 137-150 (1993)
1991
5 Cheng-Wen Wu, Shyue-Kung Lu: Designing Self-Testable Cellular Arrays. ICCD 1991: 110-113
4EEKun-Jin Lin, Cheng-Wen Wu: Easily Testable Cellular Array Multipliers. J. Inf. Sci. Eng. 7(3): 367-383 (1991)
1990
3 Cheng-Wen Wu, Peter R. Cappello: Easily Testable Iterative Logic Arrays. IEEE Trans. Computers 39(5): 640-652 (1990)
2EECheng-Wen Wu: Relating Tiling and Coloring to Testing of Combinational Iterative Logic Arrays. J. Inf. Sci. Eng. 6(1): 63-72 (1990)
1987
1 Cheng-Wen Wu, Peter R. Cappello: Application-Specific CAD of High-Throughout IIR Filters. COMPCON 1987: 302-305

Coauthor Index

1Peter R. Cappello [1] [3]
2Ken-Feng Chang [86]
3Ming-Kwang Chang [10]
4Tsin-Yuan Chang [30]
5Wen-Feng Chang [17] [27] [29] [78]
6Yeong-Jar Chang [92] [93] [97]
7Chao-Hsun Chen [106] [111] [117] [121]
8Jeng-Bin Chen [66] [73]
9Jian-Long Chen [86]
10Po-Song Chen [28]
11Shao-I Chen [66] [73]
12Young-Shying Chen [120]
13Chuang Cheng [43] [66] [73]
14Kuo-Liang Cheng [41] [42] [53] [54] [56] [57] [63] [64] [68] [72] [75] [76] [82] [85] [87] [107] [114] [115]
15Kwang-Ting Cheng (Kwang-Ting (Tim) Cheng) [45] [74] [96]
16Kevin Chiu [46] [61]
17Sau-Kwo Chiu [70]
18Yung-Fa Chou [8] [72] [85] [87] [89] [100] [114]
19Jiann-Yuan Choue [6]
20Eugene Chow [84]
21Yu-Chun Chuang [25]
22Yu-Chun Dawn [106]
23Li-Ming Denq [83] [92] [122]
24Chien-Hung Ho [103]
25Hao-Chiao Hong [74] [96]
26Jin-Hua Hong [15] [21] [39] [49] [51] [59] [81]
27Chia-Lung Horng [108]
28Yu-Ying Hsiao [111]
29Yu-Tsao Hsing [95] [112] [119] [122]
30Archer Hsu [84]
31Chih-Hsien Hsu [109]
32Huan-Shan Hsu [75]
33Mu-Hsien Hsu [112]
34Chia-Ming Hsueh [57]
35Chih-Tsun Huang [19] [30] [33] [41] [42] [43] [50] [54] [56] [57] [58] [63] [68] [70] [72] [75] [76] [80] [82] [85] [87] [94] [95] [98] [99] [102] [107] [108] [113]
36Chun-Chieh Huang [119]
37Frank Huang [85]
38Hsin-Jung Huang [66] [73]
39Jing-Reng Huang [30] [43] [45] [50] [57] [75] [76] [115]
40Jiun-Lang Huang [74]
41Rei-Fu Huang [69] [71] [83] [84] [88] [89] [92] [93] [97] [98] [100] [101] [116] [117]
42Shi-Yu Huang [58] [78] [86] [113]
43Chien-Chung Hung [93] [120]
44Chi-Yi Hwang [66] [73]
45Ruei-Zong Hwang [14]
46Shih-Am Hwang [28]
47Shih-Arn Hwang [21] [26] [52]
48Hong-Chou Kao [78]
49Ming-Jer Kao [93] [120]
50Shuo-Fen Kuo [121]
51Sy-Yen Kuo [18]
52Yan-Ting Lai [100] [103]
53Jih-Nung Lee [85] [87]
54Min-Sheng Lee [113]
55Tsung-Ying Lee [34]
56Yuan-Jen Lee [120]
57Jin-Fu Li [32] [46] [54] [55] [61] [62] [65] [66] [67] [69] [71] [73] [79] [80] [83] [84] [101] [116]
58Lijian Li [48]
59Yih-Lang Li [9] [11]
60Bin-Hong Lin [16] [37] [91]
61Hsiao-Ping Lin [46] [61] [66] [73]
62Kun-Jin Lin [4] [38] [40]
63Shen-Tien Lin [97]
64Shyh-Horng Lin [58]
65Yen-Fu Lin [76]
66Yen-Tai Lin [103]
67Youn-Long Lin [75] [76]
68Yung-Chen Lin [106]
69Jing-Jia Liou [94] [102]
70Chih-Yen Lo [113] [115]
71Juin-Ming Lu [44]
72Shyue-Kung Lu [5] [12] [14] [18] [31] [34] [47] [78] [86] [109]
73Hwei-Tsu Ann Luh [91]
74Kun-Lun Luo [97]
75Yinghua Min [48]
76Chee-Kian Ong [45]
77Yen-Lin Peng [94] [102]
78Shao-Hui Shieh [16] [37] [77]
79Yeong-Ruey Shieh [13] [22]
80Jeh-Sheng Shih [47]
81Yuan-Yuan Shih [98] [103]
82Chih-Pin Su [66] [73] [90] [99] [107] [108]
83Chih-Yuang Su [23] [28] [36]
84Chin-Lung Su [88] [93] [97] [104] [120]
85Shih-Yuang Su [7]
86Tony Teng [46] [61]
87Chih-Wea Tsai [120]
88Ching-Hong Tsai [60]
89Chung-Hung Tsai [15] [39]
90Ming-Chang Tsai [43]
91Ming-Fu Tsai [53] [64] [78]
92Peir-Yuan Tsai [84]
93Yu-Chen Tsai [109]
94Ruey-Shing Tzeng [58] [62] [67] [79]
95Chen-Hsing Wang [107] [113] [115]
96Chia-Ching Wang [106]
97Chih-Wea Wang [42] [46] [56] [58] [61] [68] [75] [76] [82] [85] [87] [95] [115]
98Chun-Chieh Wang [102]
99Ding-Yeong Wang [120]
100Hsin-Po Wang [58]
101Jen-Chuan Wang [12]
102Kuo-Hua Wang [109]
103Mao-Yin Wang [99]
104Shin-Moe Wang [115]
105Chen-Jong Wey [43]
106Chi-Feng Wu [30] [33] [35] [41] [42] [46] [56] [58] [61] [63] [72] [80]
107Ching-Wei Wu [95]
108Chung-Hsien Wu [51] [59]
109Wen Ching Wu [92] [93]
110Hong-Tzer Yang [85]
111Jen-Chieh Yeh [57] [68] [69] [70] [71] [72] [84] [98] [101] [103] [106] [112] [113] [114] [116] [119] [121]
112Yi-Ting Yeh [104]
113Xiaoyang Yu [48]

Colors in the list of coauthors

Copyright © Tue Nov 3 08:52:44 2009 by Michael Ley (ley@uni-trier.de)