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Heinrich Theodor Vierhaus Vis

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*2009
47EETobias Koal, Daniel Scheit, Heinrich Theodor Vierhaus: A scheme of logic self repair including local interconnects. DDECS 2009: 8-11
2008
46EEHeinrich Theodor Vierhaus, René Kothe: Embedded Diagnostic Logic Test Exploiting Regularity. DSD 2008: 873-879
45EESilvio Misera, Heinrich Theodor Vierhaus, André Sieber: Simulated fault injections and their acceleration in SystemC. Microprocessors and Microsystems - Embedded Hardware Design 32(5-6): 270-278 (2008)
2007
44 René Kothe, Heinrich Theodor Vierhaus: Flip-Flops and Scan-Path Elements for Nanoelectronics. DDECS 2007: 307-312
43EEHeinrich Theodor Vierhaus, Helmut Rossmann, Silvio Misera: Timing- / Power-Optimization for Digital Logic Based on Standard Cells. DSD 2007: 303-306
42EESilvio Misera, Heinrich Theodor Vierhaus, André Sieber: Fault Injection Techniques and their Accelerated Simulation in SystemC. DSD 2007: 587-595
41EER. Frost Brandenburg, D. Rudolph, Christian Galke, René Kothe, Heinrich Theodor Vierhaus: A Configurable Modular Test Processor and Scan Controller Architecture. IOLTS 2007: 277-284
2006
40 Christian Galke, René Kothe, Heinrich Theodor Vierhaus: Logic Self Repair. ARCS Workshops 2006: 36-44
39EEUdo Krautz, Matthias Pflanz, Christian Jacobi, Hans-Werner Tast, Kai Weber, Heinrich Theodor Vierhaus: Evaluating coverage of error detection logic for soft errors using formal methods. DATE 2006: 176-181
38 René Kothe, Christian Galke, S. Schultke, H. Froeschke, S. Gaede, Heinrich Theodor Vierhaus: Hardware/Software Based Hierarchical Self Test for SoCs. DDECS 2006: 159-160
37 René Kothe, Heinrich Theodor Vierhaus, Torsten Coym, Wolfgang Vermeiren, Bernd Straube: Embedded Self Repair by Transistor and Gate Level Reconfiguration. DDECS 2006: 210-215
36EESilvio Misera, Heinrich Theodor Vierhaus, Lars Breitenfeld, André Sieber: A Mixed Language Fault Simulation of VHDL and SystemC. DSD 2006: 275-279
35EEChristian Galke, U. Gätzschmann, Heinrich Theodor Vierhaus: Scan-Based SoC Test Using Space / Time Pattern Compaction Schemes. DSD 2006: 433-438
34EEChristian Galke, René Kothe, S. Schultke, K. Winkler, J. Honko, Heinrich Theodor Vierhaus: Embedded Scan Test with Diagnostic Features for Self-Testing SoCs. IOLTS 2006: 181-182
33EES. Habermann, René Kothe, Heinrich Theodor Vierhaus: Built-in Self Repair by Reconfiguration of FPGAs. IOLTS 2006: 187-188
2005
32 Heinrich Theodor Vierhaus, Helmut Rossmann: Power-/Timing - Optimierung für Zellen-basierte Digitalschaltungen in Submikron-Technologien. GI Jahrestagung (1) 2005: 339-343
31EERené Kothe, Christian Galke, Heinrich Theodor Vierhaus: A Multi-Purpose Concept for SoC Self Test Including Diagnostic Features. IOLTS 2005: 241-246
30EEMarcin Gomulkiewicz, Miroslaw Kutylowski, Heinrich Theodor Vierhaus, Pawel Wlaz: Synchronization Fault Cryptanalysis for Breaking A5/1. WEA 2005: 415-427
2004
29EEClaudia Kretzschmar, Christian Galke, Heinrich Theodor Vierhaus: A Hierarchical Self Test Scheme for SoCs. IOLTS 2004: 37-44
28EESilvio Misera, Heinrich Theodor Vierhaus: FIT - A Parallel Hierarchical Fault Simulation Environment. PARELEC 2004: 289-294
2003
27EEMatthias Pflanz, Heinrich Theodor Vierhaus: Control Signal Protection For High Performance Processors. IOLTS 2003: 173-
26EEChristian Galke, Marcus Grabow, Heinrich Theodor Vierhaus: Perspectives of Combining on-line and off-line Test Technology for Dependable Systems on a Chip. IOLTS 2003: 183-
25EEMatthias Pflanz, K. Walther, Christian Galke, Heinrich Theodor Vierhaus: On-Line Techniques for Error Detection and Correction in Processor Registers with Cross-Parity Check. J. Electronic Testing 19(5): 501-510 (2003)
2002
24EEChristian Galke, Matthias Pflanz, Heinrich Theodor Vierhaus: A Test Processor Concept for Systems-on-a-Chip. ICCD 2002: 210-
23EEChristian Galke, Matthias Pflanz, Heinrich Theodor Vierhaus: On-line Detection and Compensation of Transient Errors in Processor Pipeline-Structures. IOLTW 2002: 178
22EEMatthias Pflanz, K. Walther, Christian Galke, Heinrich Theodor Vierhaus: On-Line Error Detection and Correction in Storage Elements with Cross-Parity Check. IOLTW 2002: 69-73
2001
21EEC. Rousselle, Matthias Pflanz, A. Behling, T. Mohaupt, Heinrich Theodor Vierhaus: A register-transfer-level fault simulator for permanent and transient faults in embedded processors. DATE 2001: 811
20EEMatthias Pflanz, K. Walther, Heinrich Theodor Vierhaus: On-line Error Detection Techniques for Dependable Embedded Processors with High Complexity. IOLTW 2001: 51-53
19EEMatthias Pflanz, Heinrich Theodor Vierhaus: Online Check and Recovery Techniques for Dependable Embedded Processors. IEEE Micro 21(5): 24-40 (2001)
1999
18 Matthias Pflanz, Heinrich Theodor Vierhaus, F. Pompsch: An efficient on-line-test and back-up scheme for embedded processors. ITC 1999: 964-972
17EEFulvio Corno, Uwe Gläser, Paolo Prinetto, Matteo Sonza Reorda, Heinrich Theodor Vierhaus, Massimo Violante: SymFony: a hybrid topological-symbolic ATPG exploiting RT-level information. IEEE Trans. on CAD of Integrated Circuits and Systems 18(2): 191-202 (1999)
1997
16EEH.-Ch. Dahmen, Uwe Gläser, Heinrich Theodor Vierhaus: An Efficient Dynamic Parallel Approach to Automatic Test Pattern Generation. Great Lakes Symposium on VLSI 1997: 112-117
15 H.-Ch. Dahmen, Uwe Gläser, Heinrich Theodor Vierhaus: A Parallel Approach Solving the Test Generation Problem for Synchronous Sequential Circuits. PARCO 1997: 549-556
14EEUwe Hübner, Heinrich Theodor Vierhaus, Raul Camposano: Partitioning and analysis of static digital CMOS circuits. IEEE Trans. on CAD of Integrated Circuits and Systems 16(11): 1292-1310 (1997)
1996
13EEJörg Wilberg, A. Kuth, Raul Camposano, Wolfgang Rosenstiel, Heinrich Theodor Vierhaus: A Design Exploration Environment. Great Lakes Symposium on VLSI 1996: 77-80
12 H.-Ch. Dahmen, Uwe Gläser, Heinrich Theodor Vierhaus: Automatic Test Pattern Generation with Optimal Load Balancing. PVM 1996: 205-212
11EEUwe Gläser, Heinrich Theodor Vierhaus: Mixed level test generation for synchronous sequential circuits using the FOGBUSTER algorithm. IEEE Trans. on CAD of Integrated Circuits and Systems 15(4): 410-423 (1996)
1995
10EEUwe Gläser, Heinrich Theodor Vierhaus: FOGBUSTER: an efficient algorithm for sequential test generation. EURO-DAC 1995: 230-235
9EEFulvio Corno, Paolo Prinetto, Matteo Sonza Reorda, Uwe Gläser, Heinrich Theodor Vierhaus: Improving topological ATPG with symbolic techniques. VTS 1995: 338-343
1994
8 Michel Langevin, Eduard Cerny, Jörg Wilberg, Heinrich Theodor Vierhaus: Local microcode generation in system design. Code Generation for Embedded Processors 1994: 171-187
7EEUwe Gläser, Heinrich Theodor Vierhaus, M. Kley, A. Wiederhold: Test generation for bridging faults in CMOS ICs based on current monitoring versus signal propagation. ICCAD 1994: 36-39
6 R. Wolber, Uwe Gläser, Heinrich Theodor Vierhaus: Testability Analysis for Test Generation in Synchronous Sequential Circuits. ICCD 1994: 350-353
1993
5 Heinrich Theodor Vierhaus, Wolfgang Meyer, Uwe Gläser: CMOS Bridges and Resistive Transistor Faults: IDDQ versus Delay Effects. ITC 1993: 83-91
4EEHeinrich Theodor Vierhaus, Wolfgang Meyer, Uwe Gläser, Raul Camposano: Fault behavior and testability of asynchronous CMOS circuits. Microprocessing and Microprogramming 38(1-5): 223-228 (1993)
1992
3EEUwe Hübner, Heinrich Theodor Vierhaus: Efficient partitioning and analysis of digital CMOS-circuits. ICCAD 1992: 280-283
2 Ursula Westerholz, Heinrich Theodor Vierhaus: Library Mapping of CMOS-Switch-Level-Circuits by Extraction of Isomorphic Subgraphs. ICCD 1992: 472-475
1 Uwe Gläser, Uwe Hübner, Heinrich Theodor Vierhaus: Mixed Level Hierarchical Test Generation for Transition Faults and Overcurrent Related Defects. ITC 1992: 21-29

Coauthor Index

1A. Behling [21]
2R. Frost Brandenburg [41]
3Lars Breitenfeld [36]
4Raul Camposano [4] [13] [14]
5Eduard Cerny [8]
6Fulvio Corno [9] [17]
7Torsten Coym [37]
8H.-Ch. Dahmen [12] [15] [16]
9H. Froeschke [38]
10S. Gaede [38]
11Christian Galke [22] [23] [24] [25] [26] [29] [31] [34] [35] [38] [40] [41]
12U. Gätzschmann [35]
13Uwe Gläser [1] [4] [5] [6] [7] [9] [10] [11] [12] [15] [16] [17]
14Marcin Gomulkiewicz [30]
15Marcus Grabow [26]
16S. Habermann [33]
17J. Honko [34]
18Uwe Hübner [1] [3] [14]
19Christian Jacobi [39]
20M. Kley [7]
21Tobias Koal [47]
22René Kothe [31] [33] [34] [37] [38] [40] [41] [44] [46]
23Udo Krautz [39]
24Claudia Kretzschmar [29]
25A. Kuth [13]
26Miroslaw Kutylowski [30]
27Michel Langevin [8]
28Wolfgang Meyer [4] [5]
29Silvio Misera [28] [36] [42] [43] [45]
30T. Mohaupt [21]
31Matthias Pflanz [18] [19] [20] [21] [22] [23] [24] [25] [27] [39]
32F. Pompsch [18]
33Paolo Prinetto [9] [17]
34Matteo Sonza Reorda [9] [17]
35Wolfgang Rosenstiel [13]
36Helmut Rossmann [32] [43]
37C. Rousselle [21]
38D. Rudolph [41]
39Daniel Scheit [47]
40S. Schultke [34] [38]
41André Sieber [36] [42] [45]
42Bernd Straube [37]
43Hans-Werner Tast [39]
44Wolfgang Vermeiren [37]
45Massimo Violante [17]
46K. Walther [20] [22] [25]
47Kai Weber [39]
48Ursula Westerholz [2]
49A. Wiederhold [7]
50Jörg Wilberg [8] [13]
51K. Winkler [34]
52Pawel Wlaz [30]
53R. Wolber [6]

Colors in the list of coauthors

Copyright © Tue Nov 3 08:52:44 2009 by Michael Ley (ley@uni-trier.de)