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Alexander V. Veidenbaum Vis

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*2009
86 Gearold Johnson, Carsten Trinitis, Georgi Gaydadjiev, Alexander V. Veidenbaum: Proceedings of the 6th Conference on Computing Frontiers, 2009, Ischia, Italy, May 18-20, 2009 ACM 2009
85EEAlexandru Nicolau, Guangqiang Li, Alexander V. Veidenbaum, Arun Kejariwal: Synchronization optimizations for efficient execution on multi-cores. ICS 2009: 169-180
84EEMaja Etinski, Julita Corbalán, Jesús Labarta, Mateo Valero, Alexander V. Veidenbaum: Power-aware load balancing of large scale MPI applications. IPDPS 2009: 1-8
83EEDarshan Desai, Gerolf Hoflehner, Arun Kejariwal, Daniel M. Lavery, Alexandru Nicolau, Alexander V. Veidenbaum, Cameron McNairy: Performance Characterization of Itanium® 2-Based Montecito Processor. SPEC Benchmark Workshop 2009: 36-56
82EEArun Kejariwal, Alexandru Nicolau, Utpal Banerjee, Alexander V. Veidenbaum, Constantine D. Polychronopoulos: Cache-aware partitioning of multi-dimensional iteration spaces. SYSTOR 2009: 15
81EEArun Kejariwal, Alexander V. Veidenbaum, Alexandru Nicolau, Milind Girkar, Xinmin Tian, Hideki Saito: On the exploitation of loop-level parallelism in embedded applications. ACM Trans. Embedded Comput. Syst. 8(2): (2009)
80EEJayram Moorkanikara Nageswaran, Nikil D. Dutt, Jeffrey L. Krichmar, Alex Nicolau, Alexander V. Veidenbaum: A configurable simulation environment for the efficient simulation of large-scale spiking neural networks on graphics processors. Neural Networks 22(5-6): 791-800 (2009)
2008
79EEHouman Homayoun, Mohammad A. Makhzan, Alexander V. Veidenbaum: Multiple sleep mode leakage control for cache peripheral circuits in embedded processors. CASES 2008: 197-206
78EEHouman Homayoun, Sudeep Pasricha, Mohammad A. Makhzan, Alexander V. Veidenbaum: Dynamic register file resizing and frequency scaling to improve embedded processor performance and energy-delay efficiency. DAC 2008: 68-71
77EEHouman Homayoun, Alexander V. Veidenbaum, Jean-Luc Gaudiot: Adaptive techniques for leakage power management in L2 cache peripheral circuits. ICCD 2008: 563-569
76EEHouman Homayoun, Mohammad A. Makhzan, Alexander V. Veidenbaum: ZZ-HVS: Zig-zag horizontal and vertical sleep transistor sharing to reduce leakage power in on-chip SRAM peripheral circuits. ICCD 2008: 699-706
75EEMiquel Pericàs, Adrián Cristal, Francisco J. Cazorla, Ruden González, Alexander V. Veidenbaum, Daniel A. Jiménez, Mateo Valero: A Two-Level Load/Store Queue Based on Execution Locality. ISCA 2008: 25-36
74EECarmen Badea, Alexandru Nicolau, Alexander V. Veidenbaum: Impact of JVM superoperators on energy consumption in resource-constrained embedded systems. LCTES 2008: 23-30
73EEHouman Homayoun, Sudeep Pasricha, Mohammad A. Makhzan, Alexander V. Veidenbaum: Improving performance and reducing energy-delay with adaptive resource resizing for out-of-order embedded processors. LCTES 2008: 71-78
72EEIsidro Gonzalez, Marco Galluzzi, Alexander V. Veidenbaum, Marco A. Ramírez, Adrián Cristal, Mateo Valero: A distributed processor state management architecture for large-window processors. MICRO 2008: 11-22
71EEArun Kejariwal, Alexandru Nicolau, Utpal Banerjee, Alexander V. Veidenbaum, Constantine D. Polychronopoulos: Cache-aware iteration space partitioning. PPOPP 2008: 269-270
70EEJelena Trajkovic, Alexander V. Veidenbaum, Arun Kejariwal: Improving SDRAM access energy efficiency for low-power embedded systems. ACM Trans. Embedded Comput. Syst. 7(3): (2008)
69EEJosé Luis Ayala, Marisa López-Vallejo, Carlos A. López-Barrio, Alexander V. Veidenbaum: A hardware mechanism to reduce the energy consumption of the register file of in-order architectures. IJES 3(4): 285-293 (2008)
68EEJuan L. Aragón, Alexander V. Veidenbaum: Optimizing CAM-based instruction cache designs for low-power embedded systems. Journal of Systems Architecture - Embedded Systems Design 54(12): 1155-1163 (2008)
2007
67EECarmen Badea, Alexandru Nicolau, Alexander V. Veidenbaum: A simplified java bytecode compilation system for resource-constrained embedded processors. CASES 2007: 218-228
66EEHouman Homayoun, Alexander V. Veidenbaum: Reducing leakage power in peripheral circuits of L2 caches. ICCD 2007: 230-237
65 Jeff Furlong, Andrew Felch, Jayram Moorkanikara Nageswaran, Nikil Dutt, Alex Nicolau, Alexander V. Veidenbaum, Ashok Chandrashekar, Richard Granger: Novel Brain-Derived Algorithms Scale Linearly with Number of Processing Elements. PARCO 2007: 767-776
64EEArun Kejariwal, Xinmin Tian, Milind Girkar, Wei Li, Sergey Kozhukhov, Utpal Banerjee, Alexandru Nicolau, Alexander V. Veidenbaum, Constantine D. Polychronopoulos: Tight analysis of the performance potential of thread speculation using spec CPU 2006. PPOPP 2007: 215-225
63EEArun Kejariwal, Gerolf Hoflehner, Darshan Desai, Daniel M. Lavery, Alexandru Nicolau, Alexander V. Veidenbaum: Comparative characterization of SPEC CPU2000 and CPU2006 on Itanium architecture. SIGMETRICS 2007: 361-362
62EEWeiyu Tang, Arun Kejariwal, Alexander V. Veidenbaum, Alexandru Nicolau: A predictive decode filter cache for reducing power consumption in embedded processors. ACM Trans. Design Autom. Electr. Syst. 12(2): (2007)
2006
61EEArun Kejariwal, Alexander V. Veidenbaum, Alexandru Nicolau, Milind Girkar, Xinmin Tian, Hideki Saito: Challenges in exploitation of loop parallelism in embedded applications. CODES+ISSS 2006: 173-180
60EEMilind Girkar, Arun Kejariwal, Xinmin Tian, Hideki Saito, Alexandru Nicolau, Alexander V. Veidenbaum, Constantine D. Polychronopoulos: Probablistic Self-Scheduling. Euro-Par 2006: 253-264
59EEDan Nicolaescu, Babak Salamat, Alexander V. Veidenbaum: Fast Speculative Address Generation and Way Caching for Reducing L1 Data Cache Energy. ICCD 2006
58EEArun Kejariwal, Xinmin Tian, Wei Li, Milind Girkar, Sergey Kozhukhov, Hideki Saito, Utpal Banerjee, Alexandru Nicolau, Alexander V. Veidenbaum, Constantine D. Polychronopoulos: On the performance potential of different types of speculative thread-level parallelism: The DL version of this paper includes corrections that were not made available in the printed proceedings. ICS 2006: 24
2005
57EEJuan L. Aragón, Alexander V. Veidenbaum: Energy-Effective Instruction Fetch Unit for Wide Issue Processors. Asia-Pacific Computer Systems Architecture Conference 2005: 15-27
56EEAna Azevedo, Arun Kejariwal, Alexander V. Veidenbaum, Alexandru Nicolau: High performance annotation-aware JVM for Java cards. EMSOFT 2005: 52-61
55EEMarco A. Ramírez, Adrián Cristal, Mateo Valero, Alexander V. Veidenbaum, Luis Villa: A New Pointer-based Instruction Queue Design and Its Power-Performance Evaluation. ICCD 2005: 647-653
54EERubén González, Adrián Cristal, Miquel Pericàs, Mateo Valero, Alexander V. Veidenbaum: An asymmetric clustered processor based on value content. ICS 2005: 61-70
53EEPaolo D'Alberto, Alexandru Nicolau, Alexander V. Veidenbaum, Rajesh K. Gupta: Line Size Adaptivity Analysis of Parameterized Loop Nests for Direct Mapped Data Cache. IEEE Trans. Computers 54(2): 185-197 (2005)
2004
52EEJuan L. Aragón, Dan Nicolaescu, Alexander V. Veidenbaum, Ana-Maria Badulescu: Energy-Efficient Design for Highly Associative Instruction Caches in Next-Generation Embedded Processors. DATE 2004: 1374-1375
51EEAlexander V. Veidenbaum, Dan Nicolaescu: Low Energy, Highly-Associative Cache Design for Embedded Processors. ICCD 2004: 332-335
50EERubén González, Adrián Cristal, Daniel Ortega, Alexander V. Veidenbaum, Mateo Valero: A Content Aware Integer Register File Organization. ISCA 2004: 314-324
49EEDan Nicolaescu, Alexander V. Veidenbaum, Alexandru Nicolau: Caching Values in the Load Store Queue. MASCOTS 2004: 580-587
48EEMiquel Pericàs, Rubén González, Adrián Cristal, Alexander V. Veidenbaum, Mateo Valero: An Optimized Front-End Physical Register File with Banking and Writeback Filtering. PACS 2004: 1-14
47EEAlexander V. Veidenbaum: Guest Editor's Introduction: Application-Specific Processors. IEEE Micro 24(3): 8-9 (2004)
46EEMarco A. Ramírez, Adrián Cristal, Mateo Valero, Alexander V. Veidenbaum, Luis Villa: A partitioned instruction queue to reduce instruction wakeup energy. IJHPCN 1(4): 153-161 (2004)
2003
45 Alexander V. Veidenbaum, Kazuki Joe, Hideharu Amano, Hideo Aiso: High Performance Computing, 5th International Symposium, ISHPC 2003, Tokyo-Odaiba, Japan, October 20-22, 2003, Proceedings Springer 2003
44EEJosé L. Ayala, Marisa Luisa López-Vallejo, Alexander V. Veidenbaum, Carlos A. Lopez: Energy Aware Register File Implementation through Instruction Predecode. ASAP 2003: 86-96
43EEDan Nicolaescu, Alexander V. Veidenbaum, Alexandru Nicolau: Reducing Power Consumption for High-Associativity Data Caches in Embedded Processors. DATE 2003: 11064-11069
42EESudeep Pasricha, Alexander V. Veidenbaum: Improving Branch Prediction Accuracy in Embedded Processors in the Presence of Context Switches. ICCD 2003: 526-531
41EEMarco A. Ramírez, Adrián Cristal, Alexander V. Veidenbaum, Luis Villa, Mateo Valero: A Simple Low-Energy Instruction Wakeup Mechanism. ISHPC 2003: 99-112
40EEDan Nicolaescu, Alexander V. Veidenbaum, Alexandru Nicolau: Reducing data cache energy consumption via cached load/store queue. ISLPED 2003: 252-257
39EEPaolo D'Alberto, Alexandru Nicolau, Alexander V. Veidenbaum: A Data Cache with Dynamic Mapping. LCPC 2003: 436-450
38 Alex Orailoglu, Alexander V. Veidenbaum: Guest Editors' Introduction: Application-Specific Microprocessors. IEEE Design & Test of Computers 20(1): 6-7 (2003)
37EEJosé L. Ayala, Alexander V. Veidenbaum, Marisa Luisa López-Vallejo: Power-Aware Compilation for Register File Energy Reduction. International Journal of Parallel Programming 31(6): 451-467 (2003)
2002
36EEAna Azevedo, Ilya Issenin, Radu Cornea, Rajesh Gupta, Nikil D. Dutt, Alexander V. Veidenbaum, Alexandru Nicolau: Profile-Based Dynamic Voltage Scheduling Using Program Checkpoints. DATE 2002: 168-175
35EEWeiyu Tang, Alexander V. Veidenbaum, Alexandru Nicolau, Rajesh K. Gupta: Integrated I-cache Way Predictor and Branch Target Buffer to Reduce Energy Consumption. ISHPC 2002: 120-132
34 Alexander V. Veidenbaum: Guest Editor's Introduction. International Journal of Parallel Programming 30(4): 223-224 (2002)
2001
33 Alexander V. Veidenbaum: Guest Editor's Introduction. International Journal of Parallel Programming 29(5): 461-462 (2001)
2000
32EEXiaomei Ji, Dan Nicolaescu, Alexander V. Veidenbaum, Alexandru Nicolau, Rajesh K. Gupta: Compiler-Directed Cache Assist Adaptivity. ISHPC 2000: 88-104
31EEDan Nicolaescu, Xiaomei Ji, Alexander V. Veidenbaum, Alexandru Nicolau, Rajesh K. Gupta: Compiler-Directed Cache Line Size Adaptivity. Intelligent Memory Systems 2000: 183-187
30EESunil Kim, Alexander V. Veidenbaum: On Interaction between Interconnection Network Design and Latency Hiding Techniques in Multiprocessors. The Journal of Supercomputing 16(3): 197-216 (2000)
1999
29EEAlexander V. Veidenbaum, Weiyu Tang, Rajesh K. Gupta, Alexandru Nicolau, Xiaomei Ji: Adapting cache line size to application behavior. International Conference on Supercomputing 1999: 145-154
28EEAlexander V. Veidenbaum, Qingbo Zhao, Abduhl Shameer: Non-Sequential Instruction Cache Prefetching for Multiple-issue Processors. International Journal of High Speed Computing 10(1): 115-140 (1999)
27 Edward H. Gornish, Alexander V. Veidenbaum: An Integrated Hardware/Software Data Prefetching Scheme for Shared-Memory Multiprocessors. International Journal of Parallel Programming 27(1): 35-70 (1999)
26 Sunil Kim, Alexander V. Veidenbaum: Interconnection network organization and its impact on performance and cost in shared memory multiprocessors. Parallel Computing 25(3): 283-309 (1999)
1998
25EEAlexander V. Veidenbaum, Pen-Chung Yew, David J. Kuck, Constantine D. Polychronopoulos, David A. Padua, Edward S. Davidson, Kyle Gallivan: Retrospective: The Cedar System. 25 Years ISCA: Retrospectives and Reprints 1998: 89-91
1997
24EESunil Kim, Alexander V. Veidenbaum: Stride-directed Prefetching for Secondary Caches. ICPP 1997: 314-
23EESunil Kim, Alexander V. Veidenbaum: The Effect of Limited Network Bandwidth and its Utilization by Latency Hiding Techniques in Large-Scale Shared Memory Systems. IEEE PACT 1997: 40-51
22 Alexander V. Veidenbaum: Instruction Cache Prefetching Using Multilevel Branch Prediction. ISHPC 1997: 51-70
1995
21EESunil Kim, Alexander V. Veidenbaum: On Shortest Path Routing in Single Stage Shuffle-Exchange Networks. SPAA 1995: 298-307
1994
20 Edward H. Gornish, Alexander V. Veidenbaum: An Integrated Hardware/Software Data Prefetching Scheme for Shared-Memory Multiprocessors. ICPP 1994: 281-284
19EEStephen W. Turner, Alexander V. Veidenbaum: Scalability of the Cedar system. SC 1994: 247-254
1993
18 Yung-Chin Chen, Alexander V. Veidenbaum: Performance Evaluation of Memory Caches in Multiprocessors. ICPP 1993: 184-187
17 David J. Kuck, Edward S. Davidson, Duncan H. Lawrie, Ahmed H. Sameh, Chuan-Qi Zhu, Alexander V. Veidenbaum, Jeff Konicek, Pen-Chung Yew, Kyle Gallivan, William Jalby, Harry A. G. Wijshoff, Randall Bramley, U. M. Yang, Perry A. Emrath, David A. Padua, Rudolf Eigenmann, Jay Hoeflinger, Greg Jaxon, Zhiyuan Li, T. Murphy, John T. Andrews, Stephen W. Turner: The Cedar System and an Initial Performance Study. ISCA 1993: 213-223
1992
16 Yung-Chin Chen, Alexander V. Veidenbaum: An Effective Write Policy for Software Coherence Schemes. SC 1992: 661-672
1991
15 Jeff Konicek, Tracy Tilton, Alexander V. Veidenbaum, Chuan-Qi Zhu, Edward S. Davidson, Ruppert A. Downing, Michael J. Haney, Manish Sharma, Pen-Chung Yew, P. Michael Farmwald, David J. Kuck, Daniel M. Lavery, Robert A. Lindsey, D. Pointer, John T. Andrews, Thomas Beck, T. Murphy, Stephen W. Turner, Nancy J. Warter: The Organization of the Cedar System. ICPP (1) 1991: 49-56
14 Kyle Gallivan, William Jalby, Stephen W. Turner, Alexander V. Veidenbaum, Harry A. G. Wijshoff: Preliminary Performance Analysis of the Cedar Multiprocessor Memory System. ICPP (1) 1991: 71-75
13 Elana D. Granston, Alexander V. Veidenbaum: An Integrated Hardware/Software Solution for Effective Management of Local Storage in High-Performance Systems. ICPP (2) 1991: 83-90
12EEYung-Chin Chen, Alexander V. Veidenbaum: A software coherence scheme with the assistance of directories. ICS 1991: 284-294
11 John D. Bruner, Hoichi Cheong, Alexander V. Veidenbaum, Pen-Chung Yew: Chief: A Parallel Simulation Environment for Parallel Systems. IPPS 1991: 568-575
10EEYung-Chin Chen, Alexander V. Veidenbaum: Comparison and analysis of software and directory coherence schemes. SC 1991: 818-829
9EEElana D. Granston, Alexander V. Veidenbaum: Detecting redundant accesses to array data. SC 1991: 854-865
1990
8EEEdward H. Gornish, Elana D. Granston, Alexander V. Veidenbaum: Compiler-directed data prefetching in multiprocessors with memory hierarchies. ICS 1990: 354-368
7 Hoichi Cheong, Alexander V. Veidenbaum: Compiler-Directed Cache Management in Multiprocessors. IEEE Computer 23(6): 39-47 (1990)
1989
6EEHoichi Cheong, Alexander V. Veidenbaum: A version control approach to Cache coherence. ICS 1989: 322-330
1988
5 Hoichi Cheong, Alexander V. Veidenbaum: Stale Data Detection and Coherence Enforcement Using Flow Analysis. ICPP (1) 1988: 138-145
4EEStephen W. Turner, Alexander V. Veidenbaum: Performance of a shared memory system for vector multiprocessors. ICS 1988: 315-325
3 Hoichi Cheong, Alexander V. Veidenbaum: A Cache Coherence Scheme With Fast Selective Invalidation. ISCA 1988: 299-307
1987
2 Hoichi Cheong, Alexander V. Veidenbaum: The Performance of Software-managed Multiprocessor Caches on Parallel Numerical Programs. ICS 1987: 316-337
1986
1 Alexander V. Veidenbaum: A Compiler-Assisted Cache Coherence Solution for Multiprcessors. ICPP 1986: 1029-1036

Coauthor Index

1Hideo Aiso [45]
2Hideharu Amano [45]
3John T. Andrews [15] [17]
4Juan L. Aragón [52] [57] [68]
5José Luis Ayala (José L. Ayala) [37] [44] [69]
6Ana Azevedo [36] [56]
7Carmen Badea [67] [74]
8Ana-Maria Badulescu [52]
9Utpal Banerjee [58] [64] [71] [82]
10Thomas Beck [15]
11Randall Bramley [17]
12John D. Bruner [11]
13Francisco J. Cazorla [75]
14Ashok Chandrashekar [65]
15Yung-Chin Chen [10] [12] [16] [18]
16Hoichi Cheong [2] [3] [5] [6] [7] [11]
17Julita Corbalán [84]
18Radu Cornea [36]
19Adrián Cristal [41] [46] [48] [50] [54] [55] [72] [75]
20Paolo D'Alberto [39] [53]
21Edward S. Davidson [15] [17] [25]
22Darshan Desai [63] [83]
23Ruppert A. Downing [15]
24Nikil D. Dutt (Nikil Dutt) [36] [65] [80]
25Rudolf Eigenmann [17]
26Perry A. Emrath [17]
27Maja Etinski [84]
28P. Michael Farmwald [15]
29Andrew Felch [65]
30Jeff Furlong [65]
31Kyle A. Gallivan (Kyle Gallivan) [14] [17] [25]
32Marco Galluzzi [72]
33Jean-Luc Gaudiot [77]
34Georgi Gaydadjiev (Georgi Nedeltchev Gaydadjiev) [86]
35Milind Girkar [58] [60] [61] [64] [81]
36Isidro Gonzalez [72]
37Rubén González [48] [50] [54]
38Ruden González [75]
39Edward H. Gornish [8] [20] [27]
40Richard Granger (Richard H. Granger) [65]
41Elana D. Granston [8] [9] [13]
42Rajesh K. Gupta (Rajesh Gupta) [29] [31] [32] [35] [36] [53]
43Michael J. Haney [15]
44Jay Hoeflinger [17]
45Gerolf Hoflehner [63] [83]
46Houman Homayoun [66] [73] [76] [77] [78] [79]
47Ilya Issenin [36]
48William Jalby [14] [17]
49Greg Jaxon [17]
50Xiaomei Ji [29] [31] [32]
51Daniel A. Jiménez [75]
52Kazuki Joe [45]
53Gearold Johnson [86]
54Arun Kejariwal [56] [58] [60] [61] [62] [63] [64] [70] [71] [81] [82] [83] [85]
55Sunil Kim [21] [23] [24] [26] [30]
56Jeff Konicek [15] [17]
57Sergey Kozhukhov [58] [64]
58Jeffrey L. Krichmar [80]
59David J. Kuck [15] [17] [25]
60Jesús Labarta [84]
61Daniel M. Lavery [15] [63] [83]
62Duncan H. Lawrie [17]
63Guangqiang Li [85]
64Wei Li [58] [64]
65Zhiyuan Li [17]
66Robert A. Lindsey [15]
67Carlos A. Lopez [44]
68Carlos A. López-Barrio [69]
69Marisa López-Vallejo (Marisa Luisa López-Vallejo) [37] [44] [69]
70Mohammad A. Makhzan [73] [76] [78] [79]
71Cameron McNairy [83]
72T. Murphy [15] [17]
73Jayram Moorkanikara Nageswaran [65] [80]
74Dan Nicolaescu [31] [32] [40] [43] [49] [51] [52] [59]
75Alexandru Nicolau (Alex Nicolau) [29] [31] [32] [35] [36] [39] [40] [43] [49] [53] [56] [58] [60] [61] [62] [63] [64] [65] [67] [71] [74] [80] [81] [82] [83] [85]
76Alex Orailoglu [38]
77Daniel Ortega [50]
78David A. Padua [17] [25]
79Sudeep Pasricha [42] [73] [78]
80Miquel Pericàs [48] [54] [75]
81D. Pointer [15]
82Constantine D. Polychronopoulos [25] [58] [60] [64] [71] [82]
83Marco A. Ramírez [41] [46] [55] [72]
84Hideki Saito [58] [60] [61] [81]
85Babak Salamat [59]
86Ahmed H. Sameh [17]
87Abduhl Shameer [28]
88Manish Sharma [15]
89Weiyu Tang [29] [35] [62]
90Xinmin Tian [58] [60] [61] [64] [81]
91Tracy Tilton [15]
92Jelena Trajkovic [70]
93Carsten Trinitis [86]
94Stephen W. Turner [4] [14] [15] [17] [19]
95Mateo Valero [41] [46] [48] [50] [54] [55] [72] [75] [84]
96Luis Villa [41] [46] [55]
97Nancy J. Warter [15]
98Harry A. G. Wijshoff [14] [17]
99U. M. Yang [17]
100Pen-Chung Yew [11] [15] [17] [25]
101Qingbo Zhao [28]
102Chuanqi Zhu (Chuan-Qi Zhu) [15] [17]

Colors in the list of coauthors

Copyright © Tue Nov 3 08:52:44 2009 by Michael Ley (ley@uni-trier.de)