| * | 2009 |
|---|
| 11 | EE | Shyue-Wen Yang,
Ming-Hwa Sheu,
Jun-Jie Lin,
Chuang-Chun Hu,
Tzu-Hsiung Chen,
Shau-Yin Tseng:
Parallel 3-Pixel Labeling Method and its Hardware Architecture Design.
IAS 2009: 185-188 |
| 2007 |
|---|
| 10 | EE | Chia-Hao Yu,
Chung-Kai Liu,
Chih-Heng Kang,
Tsun-Hsien Wang,
Chih-Chien Shen,
Shau-Yin Tseng:
An Efficient DMA Controller for Multimedia Application in MPU Based SOC.
ICME 2007: 80-83 |
| 9 | EE | Jian-Jia Chen,
Chuan-Yue Yang,
Tei-Wei Kuo,
Shau-Yin Tseng:
Real-Time Task Replication for Fault Tolerance in Identical Multiprocessor Systems.
IEEE Real-Time and Embedded Technology and Applications Symposium 2007: 249-258 |
| 8 | | Jia-Ming Chen,
Chiu-Ling Chen,
Jian-Liang Luo,
Po-Wen Cheng,
Chia-Hao Yu,
Shau-Yin Tseng,
Wei Kuan Shih:
Realization and Optimization of H.264 Decoder for Dual-Core SoC.
SIGMAP 2007: 309-316 |
| 2006 |
|---|
| 7 | EE | Ching-Lung Su,
Wei-Sen Yang,
Ya-Li Chen,
Yao-Chang Yang,
Ching-Wen Chen,
Jiun-In Guo,
Shau-Yin Tseng:
A Low Complexity High Quality Interger Motion Estimation Architecture Design for H.264/AVC.
APCCAS 2006: 398-401 |
| 6 | EE | Ching-Lung Su,
Wei-Sen Yang,
Ya-Li Chen,
Yao Li,
Ching-Wen Chen,
Jiun-In Guo,
Shau-Yin Tseng:
Low Complexity High Quality Fractional Motion Estimation Algorithm and Architecture Design for H.264/AVC.
APCCAS 2006: 578-581 |
| 5 | EE | Jia-Ming Chen,
Chih-Hao Chang,
Shau-Yin Tseng,
Jenq Kuen Lee,
Wei Kuan Shih:
Power Aware H.264/AVC Video Player on PAC Dual-Core SoC Platform.
EUC 2006: 57-68 |
| 4 | EE | Shau-Yin Tseng,
Tien-Wei Hsieh:
A Pattern-Search Method for H.264/AVC CAVLC Decoding.
ICME 2006: 1073-1076 |
| 3 | EE | David Chih-Wei Chang,
I-Tao Liao,
Jenq Kuen Lee,
Wen-Feng Chen,
Shau-Yin Tseng,
Chein-Wei Jen:
PAC DSP Core and Application Processors.
ICME 2006: 289-292 |
| 2005 |
|---|
| 2 | EE | Chih-Chung Lu,
Shau-Yin Tseng,
Szu-Kai Huang:
A Secure Modular Exponential Algorithm Resists to Power, Timing, C Safe Error and M Safe Error Attacks.
AINA 2005: 151-154 |
| 2002 |
|---|
| 1 | EE | Chih-Chung Lu,
Shau-Yin Tseng:
Integrated Design of AES (Advanced Encryption Standard) Encrypter and Decrypter.
ASAP 2002: 277-285 |
