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Jerry L. Trahan Vis

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*2009
43 Mostafa Elbidweihy, Jerry L. Trahan: Scheduling Real Time Tasks on Heterogeneous Reconfigurable Devices. ISCA PDCCS 2009: 71-76
42EESteven Daniel Webb, Sieteng Soh, Jerry L. Trahan: Secure Referee Selection for Fair and Responsive Peer-to-Peer Gaming. Simulation 85(9): 608-618 (2009)
2008
41EEKrishnendu Roy, Ramachandran Vaidyanathan, Jerry L. Trahan: Input-queued switches with logarithmic delay: necessary conditions and a reconfigurable scheduling algorithm. ANCS 2008: 121-122
40 Jerry L. Trahan: Reconfigurable Mesh Techniques and Applications. ERSA 2008: 15-28
39EEMostafa Elbidweihy, Jerry L. Trahan: Maximal strips data structure to represent free space on partially reconfigurable FPGAs. IPDPS 2008: 1-8
38 Mostafa Elbidweihy, Jerry L. Trahan: Regions Method for Online Placement of Real-Time Tasks on Partially Reconfigurable FPGAs. ISCA PDCCS 2008: 32-37
37EESteven Daniel Webb, Sieteng Soh, Jerry L. Trahan: Secure Referee Selection for Fair and Responsive Peer-to-Peer Gaming. PADS 2008: 63-71
2006
36EEKrishnendu Roy, Ramachandran Vaidyanathan, Jerry L. Trahan: Routing Multiple Width Communications on the Circuit Switched Tree. Int. J. Found. Comput. Sci. 17(2): 271-286 (2006)
2005
35EEKrishnendu Roy, Ramachandran Vaidyanathan, Jerry L. Trahan: Configuring the Circuit Switched Tree for Multiple Width Communications. IPDPS 2005
2003
34EENitin Srivastava, Jerry L. Trahan, Ramachandran Vaidyanathan, Suresh Rai: Adaptive Image Filtering Using Run-Time Reconfiguration. IPDPS 2003: 180
33 Hatem M. El-Boghdadi, Ramachandran Vaidyanathan, Jerry L. Trahan, Suresh Rai: On Designing Implementable Algorithms for the Linear Reconfigurable Mesh. PDPTA 2003: 241-246
32EEAnu G. Bourgeois, Jerry L. Trahan: Fault tolerant algorithms for a linear array with a reconfigurable pipelined bus system. Parallel Algorithms Appl. 18(3): 139-153 (2003)
31EERamachandran Vaidyanathan, Jerry L. Trahan, Chun-ming Lu: Degree of scalability: scalable reconfigurable mesh algorithms for multiple addition and matrix-vector multiplication. Parallel Computing 29(1): 95-109 (2003)
2002
30EEHatem M. El-Boghdadi, Ramachandran Vaidyanathan, Jerry L. Trahan, Suresh Rai: On the Communication Capability of the Self-Reconfigurable Gate Array Architecture. IPDPS 2002
29 Hatem M. El-Boghdadi, Ramachandran Vaidyanathan, Jerry L. Trahan, Suresh Rai: Reconfigurable Mesh on the Reconfigurable Tree Array. PDPTA 2002: 1068-1074
28EEJerry L. Trahan, Ramachandran Vaidyanathan: Scaling multiple addition and prefix sums on the reconfigurable mesh. Inf. Process. Lett. 82(6): 277-282 (2002)
27EEJosé Alberto Fernández-Zepeda, Ramachandran Vaidyanathan, Jerry L. Trahan: Using Bus Linearization to Scale the Reconfigurable Mesh. J. Parallel Distrib. Comput. 62(4): 495-516 (2002)
2000
26EEAnu G. Bourgeois, Jerry L. Trahan: Relating Two-Dimensional Reconfigurable Meshes with Optically Pipelined Buses. IPDPS 2000: 747-752
25EEAnu G. Bourgeois, Jerry L. Trahan: Fault Tolerant Algorithms for a Linear Array with a Reconfigurable Pipelined Bus System. IPDPS Workshops 2000: 1044-1052
24 Anu G. Bourgeois, Jerry L. Trahan: Relating Two-Dimensional Reconfigurable Meshes with Optically Pipelined Buses. Int. J. Found. Comput. Sci. 11(4): 553-571 (2000)
23EEJerry L. Trahan, Anu G. Bourgeois, Yi Pan, Ramachandran Vaidyanathan: Optimally Scaling Permutation Routing on Reconfigurable Linear Arrays with Optical Buses. J. Parallel Distrib. Comput. 60(9): 1125-1136 (2000)
1999
22EEJerry L. Trahan, Anu G. Bourgeois, Ramachandran Vaidyanathan, Yi Pan: Optimally Scaling Permutation Routing on Reconfigurable Linear Arrays with Optical Buses. IPPS/SPDP 1999: 233-
21 José Alberto Fernández-Zepeda, Ramachandran Vaidyanathan, Jerry L. Trahan: Improved Scaling Simulation of the General Reconfigurable Mesh. IPPS/SPDP Workshops 1999: 616-624
1998
20EEJosé Alberto Fernández-Zepeda, Ramachandran Vaidyanathan, Jerry L. Trahan: Scaling Simulation of the Fusing-Restricted Reconfigurable Mesh. IEEE Trans. Parallel Distrib. Syst. 9(9): 861-871 (1998)
19 Jerry L. Trahan, Anu G. Bourgeois, Ramachandran Vaidyanathan: Tighter and Broader Complexity Results for Reconfigurable Models. Parallel Processing Letters 8(3): 271-282 (1998)
1997
18 Yi Pan, Jerry L. Trahan, Ramachandran Vaidyanathan: A Scalable and Efficient Algorithm for Computing the City Block Distance Transform on Reconfigurable Meshes. Comput. J. 40(7): 435-440 (1997)
17 Jerry L. Trahan, Ramachandran Vaidyanathan, Chittur Subbaraman: Constant Time Graph Algorithms on the Reconfigurable Mutliple Buss Machine. J. Parallel Distrib. Comput. 46(1): 1-14 (1997)
1996
16EEJerry L. Trahan, Chun-ming Lu, Ramachandran Vaidyanathan: Integer and Floating Point Matrix-Vector Multiplication on the Reconfigurable Mesh. IPPS 1996: 702-706
15 Jerry L. Trahan, Ramachandran Vaidyanathan, Ratnapuri K. Thiruchelvan: On the Power of Segmenting and Fusing Buses. J. Parallel Distrib. Comput. 34(1): 82-94 (1996)
1995
14EESuresh Rai, Jerry L. Trahan, Thomas Smailus: Processor Allocation in Hypercube Multiprocessors. IEEE Trans. Parallel Distrib. Syst. 6(6): 606-616 (1995)
1994
13 Jerry L. Trahan, Ramachandran Vaidyanathan, Chittur Subbaraman: Constant Time Graph and Poset Algorithms on the Reconfigurable Multiple Bus Machine. ICPP (3) 1994: 214-217
12EESieteng Soh, Suresh Rai, Jerry L. Trahan: Improved Lower Bounds on the Reliability of Hypercube Architectures. IEEE Trans. Parallel Distrib. Syst. 5(4): 364-378 (1994)
11 Jerry L. Trahan, Vijaya Ramachandran, Michael C. Loui: Parallel Random Access Machines with both Multiplication and Shifts Inf. Comput. 110(1): 96-118 (1994)
10 Jerry L. Trahan, S. Vedantham: Analysis of PRAM Instruction Sets from a Log Cost Perspective. Int. J. Found. Comput. Sci. 5(3/4): 231-246 (1994)
9 Jerry L. Trahan, Hosangadi Bhanukumar: Parallel Random Access Machines without Boolean Operations. Parallel Processing Letters 4: 117-124 (1994)
1993
8 Chittur Subbaraman, Jerry L. Trahan, Ramachandran Vaidyanathan: List Ranking and Graph Algorithms on the Reconfigurable Multiple Bus Machine. ICPP 1993: 244-247
7 Ratnapuri K. Thiruchelvan, Jerry L. Trahan, Ramachandran Vaidyanathan: On the Power of Segmenting and Fusing Buses. IPPS 1993: 79-83
6 Suresh Rai, Jerry L. Trahan, Thomas Smailus: Processor Allocation in Faulty Hypercube Multiprocessors. ISCAS 1993: 1995-1998
5 Ramachandran Vaidyanathan, Jerry L. Trahan: Optimal Simulation of Multidimensional Reconfigurable Meshes by Two-Dimensional Reconfigurable Meshes. Inf. Process. Lett. 47(5): 267-273 (1993)
1992
4 Suresh Rai, Jerry L. Trahan: A Reconfiguration Technique for Fault Tolerance in a Hypercube. Parallel Processing Letters 2: 129-138 (1992)
3 Jerry L. Trahan, Michael C. Loui, Vijaya Ramachandran: Multiplication, Division and Shift Instructions in Parallel Random Access Machines. Theor. Comput. Sci. 100(1): 1-44 (1992)
1991
2EESuresh Rai, Jerry L. Trahan: ATARIC: an algebraic technique to analyse reconfiguration for fault tolerance in a hypercube. SPDP 1991: 548-554
1989
1 Jerry L. Trahan, Michael C. Loui, Vijaya Ramachandran: The Power of Parallel Random Access Machines with Augmented Instruction Sets. Structure in Complexity Theory Conference 1989: 97-103

Coauthor Index

1Hosangadi Bhanukumar [9]
2Anu G. Bourgeois [19] [22] [23] [24] [25] [26] [32]
3Hatem M. El-Boghdadi [29] [30] [33]
4Mostafa Elbidweihy [38] [39] [43]
5José Alberto Fernández-Zepeda [20] [21] [27]
6Michael C. Loui [1] [3] [11]
7Chun-ming Lu [16] [31]
8Yi Pan [18] [22] [23]
9Suresh Rai [2] [4] [6] [12] [14] [29] [30] [33] [34]
10Vijaya Ramachandran [1] [3] [11]
11Krishnendu Roy [35] [36] [41]
12Thomas Smailus [6] [14]
13Sieteng Soh [12] [37] [42]
14Nitin Srivastava [34]
15Chittur Subbaraman [8] [13] [17]
16Ratnapuri K. Thiruchelvan [7] [15]
17Ramachandran Vaidyanathan [5] [7] [8] [13] [15] [16] [17] [18] [19] [20] [21] [22] [23] [27] [28] [29] [30] [31] [33] [34] [35] [36] [41]
18S. Vedantham [10]
19Steven Daniel Webb [37] [42]

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Copyright © Tue Nov 3 08:52:44 2009 by Michael Ley (ley@uni-trier.de)