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Josep Torrellas Vis

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*2009
123EEPablo Montesinos, Matthew Hicks, Samuel T. King, Josep Torrellas: Capo: a software-hardware interface for practical deterministic multiprocessor replay. ASPLOS 2009: 73-84
122EEBrian Greskamp, Lu Wan, Ulya R. Karpuzcu, Jeffrey J. Cook, Josep Torrellas, Deming Chen, Craig B. Zilles: Blueshift: Designing processors for timing speculation from the ground up. HPCA 2009: 213-224
121EEJosep Torrellas: How to build a useful thousand-core manycore system? IPDPS 2009: 1
120EEAbdullah Muzahid, Darío Suárez Gracia, Shanxiang Qi, Josep Torrellas: SigRace: signature-based data race detection. ISCA 2009: 337-348
119EEDerek Hower, Pablo Montesinos, Luis Ceze, Mark D. Hill, Josep Torrellas: Two hardware-based approaches for deterministic multiprocessor replay. Commun. ACM 52(6): 93-100 (2009)
2008
118EEJames Tuck, Wonsun Ahn, Luis Ceze, Josep Torrellas: SoftSig: software-exposed hardware signatures for code analysis and optimization. ASPLOS 2008: 145-156
117EEPablo Montesinos, Luis Ceze, Josep Torrellas: DeLorean: Recording and Deterministically Replaying Shared-Memory Multiprocessor Execution Effciently. ISCA 2008: 289-300
116EERadu Teodorescu, Josep Torrellas: Variation-Aware Application Scheduling and Power Management for Chip Multiprocessors. ISCA 2008: 363-374
115EEAbhishek Tiwari, Josep Torrellas: Facelift: Hiding and slowing down aging in multicores. MICRO 2008: 129-140
114EESmruti R. Sarangi, Brian Greskamp, Abhishek Tiwari, Josep Torrellas: EVAL: Utilizing processors with variation-induced timing errors. MICRO 2008: 423-434
113EELuis Ceze, Christoph von Praun, Calin Cascaval, Pablo Montesinos, Josep Torrellas: Concurrency control with data coloring. MSPC 2008: 6-10
2007
112EEPablo Montesinos, Wei Liu, Josep Torrellas: Using Register Lifetime Predictions to Protect Register Files against Soft Errors. DSN 2007: 286-296
111EELuis Ceze, Pablo Montesinos, Christoph von Praun, Josep Torrellas: Colorama: Architectural Support for Data-Centric Synchronization. HPCA 2007: 133-144
110EEJames Tuck, Wei Liu, Josep Torrellas: CAP: Criticality analysis for power-efficient speculative multithreading. ICCD 2007: 409-416
109EELuis Ceze, James Tuck, Pablo Montesinos, Josep Torrellas: BulkSC: bulk enforcement of sequential consistency. ISCA 2007: 278-289
108EEAbhishek Tiwari, Smruti R. Sarangi, Josep Torrellas: ReCycle: : pipeline adaptation to tolerate process variation. ISCA 2007: 323-334
107EEBrian Greskamp, Smruti R. Sarangi, Josep Torrellas: Threshold Voltage Variation Effects on Aging-Related Hard Failure Rates. ISCAS 2007: 1261-1264
106EESmruti R. Sarangi, Brian Greskamp, Josep Torrellas: A Model for Timing Errors in Processors with Parameter Variation. ISQED 2007: 647-654
105EERadu Teodorescu, Jun Nakano, Abhishek Tiwari, Josep Torrellas: Mitigating Parameter Variation with Dynamic Fine-Grain Body Biasing. MICRO 2007: 27-42
104EEKarin Strauss, Xiaowei Shen, Josep Torrellas: Uncorq: Unconstrained Snoop Request Delivery in Embedded-Ring Multiprocessors. MICRO 2007: 327-342
103EEBrian Greskamp, Josep Torrellas: Paceline: Improving Single-Thread Performance in Nanoscale CMPs through Core Overclocking. PACT 2007: 213-224
102EECyrus Bazeghi, Francisco J. Mesa-Martinez, Brian Greskamp, Josep Torrellas, Jose Renau: Estimating design time for system circuits. VLSI-SoC 2007: 60-65
101EESmruti R. Sarangi, Satish Narayanasamy, Bruce Carneal, Abhishek Tiwari, Brad Calder, Josep Torrellas: Patching Processor Design Errors with Programmable Hardware. IEEE Micro 27(1): 12-25 (2007)
2006
100 Josep Torrellas: Proceedings of the 1st Workshop on Architectural and System Support for Improving Software Dependability, ASID 2006, San Jose, California, USA, October 21, 2006 ACM 2006
99 Josep Torrellas, Siddhartha Chatterjee: Proceedings of the ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming, PPOPP 2006, New York, New York, USA, March 29-31, 2006 ACM 2006
98EEPaul Sack, Brian E. Bliss, Zhiqiang Ma, Paul Petersen, Josep Torrellas: Accurate and efficient filtering for the Intel thread checker race detector. ASID 2006: 34-41
97EESmruti R. Sarangi, Brian Greskamp, Josep Torrellas: CADRE: Cycle-Accurate Deterministic Replay for Hardware Debugging. DSN 2006: 301-312
96EEJun Nakano, Pablo Montesinos, Kourosh Gharachorloo, Josep Torrellas: ReViveI/O: efficient handling of I/O in highly-available rollback-recovery servers. HPCA 2006: 200-211
95EELuis Ceze, James Tuck, Josep Torrellas, Calin Cascaval: Bulk Disambiguation of Speculative Threads in Multiprocessors. ISCA 2006: 227-238
94EEKarin Strauss, Xiaowei Shen, Josep Torrellas: Flexible Snooping: Adaptive Forwarding and Filtering of Snoops in Embedded-Ring Multiprocessors. ISCA 2006: 327-338
93EESmruti R. Sarangi, Abhishek Tiwari, Josep Torrellas: Phoenix: Detecting and Recovering from Permanent Processor Design Bugs with Programmable Hardware. MICRO 2006: 26-37
92EEShan Lu, Pin Zhou, Wei Liu, Yuanyuan Zhou, Josep Torrellas: PathExpander: Architectural Support for Increasing the Path Coverage of Dynamic Bug Detection. MICRO 2006: 38-52
91EEJames Tuck, Luis Ceze, Josep Torrellas: Scalable Cache Miss Handling for High Memory-Level Parallelism. MICRO 2006: 409-422
90EEWei Liu, James Tuck, Luis Ceze, Wonsun Ahn, Karin Strauss, Jose Renau, Josep Torrellas: POSH: a TLS compiler that exploits program structure. PPOPP 2006: 158-167
89EEJosep Torrellas: Guest Editor's Introduction: Micro's Top Picks from Microarchitecture Conferences. IEEE Micro 26(1): 8-9 (2006)
88EEJose Renau, Karin Strauss, Luis Ceze, Wei Liu, Smruti R. Sarangi, James Tuck, Josep Torrellas: Energy-Efficient Thread-Level Speculation. IEEE Micro 26(1): 80-91 (2006)
87EERadu Teodorescu, Jun Nakano, Josep Torrellas: SWICH: A Prototype for Efficient Cache-Level Checkpointing and Rollback. IEEE Micro 26(5): 28-40 (2006)
86EELuis Ceze, Karin Strauss, James Tuck, Josep Torrellas, Jose Renau: CAVA: Using checkpoint-assisted value prediction to hide L2 misses. TACO 3(2): 182-208 (2006)
2005
85EERadu Teodorescu, Josep Torrellas: Prototyping Architectural Support for Program Rollback Using FPGAs. FCCM 2005: 23-32
84EEJose Renau, James Tuck, Wei Liu, Luis Ceze, Karin Strauss, Josep Torrellas: Tasking with out-of-order spawn in TLS chip multiprocessors: microarchitecture and compilation. ICS 2005: 179-188
83EEJose Renau, Karin Strauss, Luis Ceze, Wei Liu, Smruti R. Sarangi, James Tuck, Josep Torrellas: Thread-Level Speculation on a CMP can be energy efficient. ICS 2005: 219-228
82EEYuanyuan Zhou, Pin Zhou, Feng Qin, Wei Liu, Josep Torrellas: Efficient and flexible architectural support for dynamic monitoring. TACO 2(1): 3-33 (2005)
81EEMaría Jesús Garzarán, Milos Prvulovic, José María Llabería, Víctor Viñals, Lawrence Rauchwerger, Josep Torrellas: Tradeoffs in buffering speculative memory state for thread-level speculation in multiprocessors. TACO 2(3): 247-279 (2005)
2004
80EEPin Zhou, Feng Qin, Wei Liu, Yuanyuan Zhou, Josep Torrellas: iWatcher: Efficient Architectural Support for Software Debugging. ISCA 2004: 224-237
79EEPin Zhou, Wei Liu, Long Fei, Shan Lu, Feng Qin, Yuanyuan Zhou, Samuel P. Midkiff, Josep Torrellas: AccMon: Automatically Detecting Memory-Related Bugs via Program Counter-Based Invariants. MICRO 2004: 269-280
78EEPin Zhou, Feng Qin, Wei Liu, Yuanyuan Zhou, Josep Torrellas: iWatcher: Simple, General Architectural Support for Software Debugging. IEEE Micro 24(6): 50-56 (2004)
2003
77EEMaría Jesús Garzarán, Milos Prvulovic, José María Llabería, Víctor Viñals, Lawrence Rauchwerger, Josep Torrellas: Tradeoffs in Buffering Memory State for Thread-Level Speculation in Multiprocessors. HPCA 2003: 191-202
76EEMaría Jesús Garzarán, Milos Prvulovic, Víctor Viñals, José María Llabería, Lawrence Rauchwerger, Josep Torrellas: Using Software Logging to Support Multi-Version Buffering in Thread-Level Speculation. IEEE PACT 2003: 170-
75EEAnthony-Trung Nguyen, Josep Torrellas: Design Trade-Offs in High-Throughput Coherence Controllers. IEEE PACT 2003: 194-205
74 Milos Prvulovic, Josep Torrellas: ReEnact: Using Thread-Level Speculation Mechanisms to Debug Data Races in Multithreaded Codes. ISCA 2003: 110-121
73EEMichael C. Huang, Jose Renau, Josep Torrellas: Positional Adaptation of Processors: Application to Energy Reduction. ISCA 2003: 157-168
72EEBasilio B. Fraguela, Jose Renau, Paul Feautrier, David A. Padua, Josep Torrellas: Programming the FlexRAM parallel intelligent memory system. PPOPP 2003: 49-60
71EEJosé F. Martínez, Josep Torrellas: Speculative Synchronization: Programmability and Performance for Parallel Codes. IEEE Micro 23(6): 126-134 (2003)
70EEYan Solihin, Jaejin Lee, Josep Torrellas: Correlation Prefetching with a User-Level Memory Thread. IEEE Trans. Parallel Distrib. Syst. 14(6): 563-580 (2003)
2002
69EEJosé F. Martínez, Josep Torrellas: Speculative synchronization: applying thread-level speculation to explicitly parallel applications. ASPLOS 2002: 18-29
68EEMarcelo H. Cintra, Josep Torrellas: Speculative Multithreading Eliminating Squashes through Learning Cross-Thread Violations in Speculative Parallelization for Multiprocessors. HPCA 2002: 43-54
67EEFrancis H. Dang, María Jesús Garzarán, Milos Prvulovic, Ye Zhang, Alin Jula, Hao Yu, Nancy M. Amato, Lawrence Rauchwerger, Josep Torrellas: SmartApps: An Application Centric Approach to High Performance Computing: Compiler-Assisted Software and Hardware Support for Reduction Operations. IPDPS 2002
66EEMilos Prvulovic, Josep Torrellas, Zheng Zhang: ReVive: Cost-Effective Architectural Support for Rollback Recovery in Shared-Memory Multiprocessors. ISCA 2002: 111-122
65EEYan Solihin, Josep Torrellas, Jaejin Lee: Using a User-Level Memory Thread for Correlation Prefetching. ISCA 2002: 171-182
64EEMichael C. Huang, Jose Renau, Josep Torrellas: Energy-efficient hybrid wakeup logic. ISLPED 2002: 196-201
63EEJosé F. Martínez, Jose Renau, Michael C. Huang, Milos Prvulovic, Josep Torrellas: Cherry: checkpointed early resource recycling in out-of-order microprocessors. MICRO 2002: 3-14
62 Alex Ramírez, Josep-Lluis Larriba-Pey, Carlos Navarro, Mateo Valero, Josep Torrellas: Software Trace Cache for Commercial Applications. International Journal of Parallel Programming 30(5): 373-395 (2002)
2001
61EEJaejin Lee, Yan Solihin, Josep Torrellas: Automatically Mapping Code on an Intelligent Memory Architecture. HPCA 2001: 121-
60EEMaría Jesús Garzarán, Milos Prvulovic, Ye Zhang, Josep Torrellas, Alin Jula, Hao Yu, Lawrence Rauchwerger: Architectural Support for Parallel Reductions in Scalable Shared-Memory Multiprocessors. IEEE PACT 2001: 243-
59EEMilos Prvulovic, María Jesús Garzarán, Lawrence Rauchwerger, Josep Torrellas: Removing architectural bottlenecks to the scalability of speculative parallelization. ISCA 2001: 204-215
58EEMichael C. Huang, Jose Renau, Seung-Moon Yoo, Josep Torrellas: L1 data cache decomposition for energy efficiency. ISLPED 2001: 10-15
57EEYan Solihin, Jaejin Lee, Josep Torrellas: Automatic Code Mapping on an Intelligent Memory Architecture. IEEE Trans. Computers 50(11): 1248-1266 (2001)
56 Venkata Krishnan, Josep Torrellas: The Need for Fast Communication in Hardware-Based Speculative Chip Multiprocessors. International Journal of Parallel Programming 29(1): 3-33 (2001)
55EEMichael C. Huang, Jose Renau, Seung-Moon Yoo, Josep Torrellas: The Design of DEETM: a Framework for Dynamic Energy Efficiency and Temperature Management. J. Instruction-Level Parallelism 3: (2001)
2000
54EEJosep Torrellas, Liuxi Yang, Anthony-Trung Nguyen: Toward a Cost-Effective DSM Organization That Exploits Processor-Memory Integration. HPCA 2000: 15-25
53EEQiang Cao, Josep Torrellas, H. V. Jagadish: Unified Fine-Granularity Buffering of Index and Data: Approach and Implementation. ICCD 2000: 175-186
52EEMarcelo H. Cintra, José F. Martínez, Josep Torrellas: Architectural support for scalable speculative parallelization in shared-memory multiprocessors. ISCA 2000: 13-24
51EEMichael C. Huang, Jose Renau, Seung-Moon Yoo, Josep Torrellas: Energy/Performance Design of Memory Hierarchies for Processor-in-Memory Chips. Intelligent Memory Systems 2000: 152-159
50EEYan Solihin, Jaejin Lee, Josep Torrellas: Adaptively Mapping Code in an Intelligent Memory Architecture. Intelligent Memory Systems 2000: 71-84
49EELawrence Rauchwerger, Nancy M. Amato, Josep Torrellas: SmartApps: An Application Centric Approach to High Performance Computing. LCPC 2000: 82-96
48EEMichael C. Huang, Jose Renau, Seung-Moon Yoo, Josep Torrellas: A framework for dynamic energy efficiency and temperature management. MICRO 2000: 202-213
1999
47EEYe Zhang, Lawrence Rauchwerger, Josep Torrellas: Hardware for Speculative Parallelization of Partially-Parallel Loops in DSM Multiprocessors. HPCA 1999: 135-
46EERussell M. Clapp, Ashwini K. Nanda, Josep Torrellas: Second Workshop on Computer Architecture Evaluation Using Commercial Workloads. HPCA 1999: 322
45EEQiang Cao, Josep Torrellas, Pedro Trancoso, Josep-Lluis Larriba-Pey, Bob Knighten, Youjip Won: Detailed Characterization of a Quad Pentium Pro Server Running TPC-D. ICCD 1999: 108-
44EEYi Kang, Wei Huang, Seung-Moon Yoo, Diana Keen, Zhenzhou Ge, Vinh Vi Lam, Josep Torrellas, Pratap Pattnaik: FlexRAM: Toward an Advanced Intelligent Memory System. ICCD 1999: 192-201
43EEPedro Trancoso, Josep Torrellas: Cache Optimization for Memory-Resident Decision Support Commercial Workloads. ICCD 1999: 546-
42EEDavid Koufaty, Josep Torrellas: Compiler Support for Data Forwarding in Scalable Shared-Memory Multiprocessors. ICPP 1999: 181-
41EEAlex Ramírez, Josep-Lluis Larriba-Pey, Carlos Navarro, Xavi Serrano, Mateo Valero, Josep Torrellas: Optimization of Instruction Fetch for Decision Support Workloads. ICPP 1999: 238-245
40EEVenkata Krishnan, Josep Torrellas: The Need for Fast Communication in Hardware-Based Speculative Chip Multiprocessors. IEEE PACT 1999: 24-33
39EEAlex Ramírez, Josep-Lluis Larriba-Pey, Carlos Navarro, Josep Torrellas, Mateo Valero: Software trace cache. International Conference on Supercomputing 1999: 119-126
38EEJosé F. Martínez, Josep Torrellas, José Duato: Improving the performance of bristled CC-NUMA systems using virtual channels and adaptivity. International Conference on Supercomputing 1999: 202-209
37 Josep Torrellas: Upcoming Architectural Advances in DSM Machines and Their Impact on Programmability. PPSC 1999
36 Fredrik Dahlgren, Josep Torrellas: Cache-Only Memory Architectures. IEEE Computer 32(6): 72-79 (1999)
35EEZheng Zhang, Marcelo H. Cintra, Josep Torrellas: Excel-NUMA: Toward Programmability, Simplicity, and High Performance. IEEE Trans. Computers 48(2): 256-264 (1999)
34 Chun Xia, Josep Torrellas: Comprehensive Hardware and Software Support for Operating Systems to Exploit. IEEE Trans. Computers 48(5): 494-505 (1999)
33 Venkata Krishnan, Josep Torrellas: A Chip-Multiprocessor Architecture with Speculative Multithreading. IEEE Trans. Computers 48(9): 866-880 (1999)
1998
32EESujoy Basu, Josep Torrellas: Enhancing Memory Use in Simple Coma: Multiplexed Simple Coma. HPCA 1998: 152-161
31EEYe Zhang, Lawrence Rauchwerger, Josep Torrellas: Hardware for Speculative Run-Time Parallelization in Distributed Shared-Memory Multiprocessors. HPCA 1998: 162-173
30 Yi Kang, Josep Torrellas, Thomas S. Huang: Use IRAM for Rasterization. ICIP (3) 1998: 1010-1013
29EEVenkata Krishnan, Josep Torrellas: An Direct-Execution Framework for Fast and Accurate Simulation of Superscalar Processors. IEEE PACT 1998: 286-293
28EEVenkata Krishnan, Josep Torrellas: A Clustered Approach to Multithreaded Processors. IPPS/SPDP 1998: 627-634
27EEDavid Koufaty, Josep Torrellas: Comparing Data Forwarding and Prefetching for Communication-induced Misses in Shared-memory MPs. International Conference on Supercomputing 1998: 53-60
26EEVenkata Krishnan, Josep Torrellas: Hardware and Software Support for Speculative Execution of Sequential Binaries on a Chip-multiprocessor. International Conference on Supercomputing 1998: 85-92
25 Josep Torrellas, Chun Xia, Russell L. Daigle: Optimizing the Instruction Cache Performance of the Operating System. IEEE Trans. Computers 47(12): 1363-1381 (1998)
1997
24EEPedro Trancoso, Josep-Lluis Larriba-Pey, Zheng Zhang, Josep Torrellas: The Memory Performance of DSS Commercial Workloads in Shared-Memory Multiprocessors. HPCA 1997: 250-260
23EEZheng Zhang, Josep Torrellas: Reducing Remote Conflict Misses: NUMA with Remote Cache versus COMA. HPCA 1997: 272-
22EELiuxi Yang, Josep Torrellas: Speeding up the Memory Hierarchy in Flat COMA Multiprocessors. HPCA 1997: 4-13
21EEJosep Torrellas, Zheng Zhang: The Performance of the Cedar Multistage Switching Network. IEEE Trans. Parallel Distrib. Syst. 8(4): 321-336 (1997)
1996
20EEAlain Raynaud, Zheng Zhang, Josep Torrellas: Distance-Adaptive Update Protocols for Scalable Shared-Memory Multiprocessors. HPCA 1996: 323-334
19EEChun Xia, Josep Torrellas: Improving the Data Cache Performance of Multiprocessor Operating Systems. HPCA 1996: 85-94
18EEAnthony-Trung Nguyen, Maged M. Michael, Arun Sharma, Josep Torrellas: The Augmint multiprocessor simulation toolkit for Intel x86 architectures. ICCD 1996: 486-490
17 Pedro Trancoso, Josep Torrellas: The Impact of Speeding up Critical Sections with Data Prefetching and Forwarding. ICPP, Vol. 3 1996: 79-86
16EEChun Xia, Josep Torrellas: Instruction Prefetching of Systems Codes with Layout Optimized for Reduced Cache Misses. ISCA 1996: 271-282
15EELiuxi Yang, Josep Torrellas: Optimizing Primary Data Caches for Parallel Scientific Applications: The Pool Buffer Approach. International Conference on Supercomputing 1996: 141-148
14EEDavid Koufaty, Xiangfeng Chen, David K. Poulsen, Josep Torrellas: Data Forwarding in Scalable Shared-Memory Multiprocessors. IEEE Trans. Parallel Distrib. Syst. 7(12): 1250-1264 (1996)
1995
13 Josep Torrellas, Chun Xia, Russell L. Daigle: Optimizing Instruction Cache Performance for Operating System Intensive Workloads. HPCA 1995: 360-369
12EEZheng Zhang, Josep Torrellas: Speeding Up Irregular Applications in Shared-Memory Multiprocessors: Memory Binding and Group Prefetching. ISCA 1995: 188-199
11EEDavid Koufaty, Xiangfeng Chen, David K. Poulsen, Josep Torrellas: Data Forwarding in Scalable Shared-Memory Multiprocessors. International Conference on Supercomputing 1995: 255-264
10 Josep Torrellas, Andrew Tucker, Anoop Gupta: Evaluating the Performance of Cache-Affinity Scheduling in Shared-Memory Multiprocessors. J. Parallel Distrib. Comput. 24(2): 139-151 (1995)
1994
9 Josep Torrellas, David Koufaty, David A. Padua: Comparing the Performance of the DASH and CEDAR Multiprocessors. ICPP 1994: 304-308
8EEJosep Torrellas, Zheng Zhang: The performance of the Cedar multistage switching network. SC 1994: 265-274
7EEDing-Kai Chen, Josep Torrellas, Pen-Chung Yew: An efficient algorithm for the run-time parallelization of DOACROSS loops. SC 1994: 518-527
6 Josep Torrellas, Monica S. Lam, John L. Hennessy: False Sharing ans Spatial Locality in Multiprocessor Caches. IEEE Trans. Computers 43(6): 651-663 (1994)
1993
5 Josep Torrellas, Andrew Tucker, Anoop Gupta: Benefits of Cache-Affinity Scheduling in Shared-Memory Multiprocessors: A Summary. SIGMETRICS 1993: 272-274
1992
4 Josep Torrellas, Anoop Gupta, John L. Hennessy: Characterizing the Caching and Synchronization Performance of a Multiprocessor Operating System. ASPLOS 1992: 162-174
1990
3 Josep Torrellas, John L. Hennessy: Estimating the Performance Advantages of Relaxing Consistency in a Shared Memory Multiprocessor. ICPP (1) 1990: 26-34
2 Josep Torrellas, Monica S. Lam, John L. Hennessy: Share Data Placement Optimizations to Reduce Multiprocessor Cache Miss Rates. ICPP (2) 1990: 266-270
1EEJosep Torrellas, John L. Hennessy, Thierry Weil: Analysis of Critical Architectural and Program Parameters in a Hierarchical Shared Memory Multiprocessor. SIGMETRICS 1990: 163-172

Coauthor Index

1Wonsun Ahn [90] [118]
2Nancy M. Amato [49] [67]
3Sujoy Basu [32]
4Cyrus Bazeghi [102]
5Brian E. Bliss [98]
6Brad Calder [101]
7Qiang Cao [45] [53]
8Bruce Carneal [101]
9Calin Cascaval [95] [113]
10Luis Ceze [83] [84] [86] [88] [90] [91] [95] [109] [111] [113] [117] [118] [119]
11Siddhartha Chatterjee [99]
12Deming Chen [122]
13Ding-Kai Chen [7]
14Xiangfeng Chen [11] [14]
15Marcelo H. Cintra [35] [52] [68]
16Russell M. Clapp [46]
17Jeffrey J. Cook [122]
18Fredrik Dahlgren [36]
19Russell L. Daigle [13] [25]
20Francis H. Dang [67]
21José Duato [38]
22Paul Feautrier [72]
23Long Fei [79]
24Basilio B. Fraguela [72]
25Diana Franklin (Diana Keen) [44]
26María Jesús Garzarán [59] [60] [67] [76] [77] [81]
27Zhenzhou Ge [44]
28Kourosh Gharachorloo [96]
29Darío Suárez Gracia [120]
30Brian Greskamp [97] [102] [103] [106] [107] [114] [122]
31Anoop Gupta [4] [5] [10]
32John L. Hennessy [1] [2] [3] [4] [6]
33Matthew Hicks [123]
34Mark D. Hill [119]
35Derek Hower [119]
36Michael C. Huang [48] [51] [55] [58] [63] [64] [73]
37Thomas S. Huang [30]
38Wei Huang [44]
39H. V. Jagadish [53]
40Alin Jula [60] [67]
41Yi Kang [30] [44]
42Ulya R. Karpuzcu [122]
43Samuel T. King [123]
44Bob Knighten [45]
45David Koufaty [9] [11] [14] [27] [42]
46Venkata Krishnan [26] [28] [29] [33] [40] [56]
47Monica S. Lam [2] [6]
48Vinh Vi Lam [44]
49Josep-Lluis Larriba-Pey [24] [39] [41] [45] [62]
50Jaejin Lee [50] [57] [61] [65] [70]
51Wei Liu [78] [79] [80] [82] [83] [84] [88] [90] [92] [110] [112]
52José María Llabería (José M. Llabería) [76] [77] [81]
53Shan Lu [79] [92]
54Zhiqiang Ma [98]
55José F. Martínez [38] [52] [63] [69] [71]
56Francisco J. Mesa-Martinez [102]
57Maged M. Michael [18]
58Samuel P. Midkiff [79]
59Pablo Montesinos [96] [109] [111] [112] [113] [117] [119] [123]
60Abdullah Muzahid [120]
61Jun Nakano [87] [96] [105]
62Ashwini K. Nanda [46]
63Satish Narayanasamy [101]
64Carlos Navarro [39] [41] [62]
65Anthony-Trung Nguyen [18] [54] [75]
66David A. Padua [9] [72]
67Pratap Pattnaik [44]
68Paul Petersen [98]
69David K. Poulsen [11] [14]
70Christoph von Praun [111] [113]
71Milos Prvulovic [59] [60] [63] [66] [67] [74] [76] [77] [81]
72Shanxiang Qi [120]
73Feng Qin [78] [79] [80] [82]
74Alex Ramírez [39] [41] [62]
75Lawrence Rauchwerger [31] [47] [49] [59] [60] [67] [76] [77] [81]
76Alain Raynaud [20]
77Jose Renau [48] [51] [55] [58] [63] [64] [72] [73] [83] [84] [86] [88] [90] [102]
78Paul Sack [98]
79Smruti R. Sarangi [83] [88] [93] [97] [101] [106] [107] [108] [114]
80Xavi Serrano [41]
81Arun Sharma [18]
82Xiaowei Shen [94] [104]
83Yan Solihin [50] [57] [61] [65] [70]
84Karin Strauss [83] [84] [86] [88] [90] [94] [104]
85Radu Teodorescu [85] [87] [105] [116]
86Abhishek Tiwari [93] [101] [105] [108] [114] [115]
87Pedro Trancoso [17] [24] [43] [45]
88James Tuck [83] [84] [86] [88] [90] [91] [95] [109] [110] [118]
89Andrew Tucker [5] [10]
90Mateo Valero [39] [41] [62]
91Víctor Viñals (Víctor Viñals Yúfera) [76] [77] [81]
92Lu Wan [122]
93Thierry Weil [1]
94Youjip Won [45]
95Chun Xia [13] [16] [19] [25] [34]
96Liuxi Yang [15] [22] [54]
97Pen-Chung Yew [7]
98Seung-Moon Yoo [44] [48] [51] [55] [58]
99Hao Yu [60] [67]
100Ye Zhang [31] [47] [60] [67]
101Zheng Zhang [8] [12] [20] [21] [23] [24] [35] [66]
102Pin Zhou [78] [79] [80] [82] [92]
103Yuanyuan Zhou [78] [79] [80] [82] [92]
104Craig B. Zilles [122]

Colors in the list of coauthors

Copyright © Tue Nov 3 08:52:44 2009 by Michael Ley (ley@uni-trier.de)