| * | 2009 |
|---|
| 151 | EE | Chuan-Yue Yang,
Jian-Jia Chen,
Tei-Wei Kuo,
Lothar Thiele:
An approximation scheme for energy-efficient scheduling of real-time tasks in heterogeneous multiprocessor systems.
DATE 2009: 694-699 |
| 150 | EE | Nikolay Stoimenov,
Simon Perathoner,
Lothar Thiele:
Reliable mode changes in real-time systems with fixed priority or EDF scheduling.
DATE 2009: 99-104 |
| 149 | EE | Kai Lampka,
Simon Perathoner,
Lothar Thiele:
Analytic real-time analysis and timed automata: a hybrid method for analyzing embedded real-time systems.
EMSOFT 2009: 107-116 |
| 148 | EE | Lothar Thiele,
Nikolay Stoimenov:
Modular performance analysis of cyclic dataflow graphs.
EMSOFT 2009: 127-136 |
| 147 | EE | Matthias Woehrle,
Kai Lampka,
Lothar Thiele:
Exploiting Timed Automata for Conformance Testing of Power Measurements.
FORMATS 2009: 275-290 |
| 146 | EE | Jian-Jia Chen,
Andreas Schranzhofer,
Lothar Thiele:
Energy minimization for periodic real-time tasks on heterogeneous processing units.
IPDPS 2009: 1-12 |
| 145 | EE | Clemens Moser,
Jian-Jia Chen,
Lothar Thiele:
Optimal service level allocation in environmentally powered embedded systems.
SAC 2009: 1650-1657 |
| 2008 |
|---|
| 144 | EE | Davide Brunelli,
Luca Benini,
Clemens Moser,
Lothar Thiele:
An Efficient Solar Energy Harvester for Wireless Sensor Nodes.
DATE 2008: 104-109 |
| 143 | EE | Clemens Moser,
Lothar Thiele,
Davide Brunelli,
Luca Benini:
Robust and Low Complexity Rate Control for Solar Powered Sensors.
DATE 2008: 230-235 |
| 142 | EE | Bengt Jonsson,
Simon Perathoner,
Lothar Thiele,
Wang Yi:
Cyclic dependencies in modular performance analysis.
EMSOFT 2008: 179-188 |
| 141 | EE | Clemens Moser,
Lothar Thiele,
Davide Brunelli,
Luca Benini:
Approximate Control Design for Solar Driven Sensor Nodes.
HSCC 2008: 634-637 |
| 140 | EE | Jian-Jia Chen,
Lothar Thiele:
Energy-Efficient Task Partition for Periodic Real-Time Tasks on Platforms with Dual Processing Elements.
ICPADS 2008: 161-168 |
| 139 | EE | Jian-Jia Chen,
Lothar Thiele:
Expected system energy consumption minimization in leakage-aware DVS systems.
ISLPED 2008: 315-320 |
| 138 | EE | Eckart Zitzler,
Joshua D. Knowles,
Lothar Thiele:
Quality Assessment of Pareto Set Approximations.
Multiobjective Optimization 2008: 373-404 |
| 137 | EE | Eckart Zitzler,
Lothar Thiele,
Johannes Bader:
SPAM: Set Preference Algorithm for Multiobjective Optimization.
PPSN 2008: 847-858 |
| 136 | EE | Clemens Moser,
Jian-Jia Chen,
Lothar Thiele:
Reward Maximization for Embedded Systems with Renewable Energies.
RTCSA 2008: 247-256 |
| 135 | EE | Kai Huang,
Iuliana Bacivarov,
Fabian Hugelshofer,
Lothar Thiele:
Scalably distributed SystemC simulation for embedded applications.
SIES 2008: 271-274 |
| 134 | EE | Matthias Woehrle,
Christian Plessl,
Roman Lim,
Jan Beutel,
Lothar Thiele:
EvAnT: Analysis and Checking of Event Traces for Wireless Sensor Networks.
SUTC 2008: 201-208 |
| 133 | EE | Andreas Meier,
Mischa Weise,
Jan Beutel,
Lothar Thiele:
NoSE: efficient initialization of wireless sensor networks.
SenSys 2008: 397-398 |
| 2007 |
|---|
| 132 | | Boudewijn R. Haverkort,
Joost-Pieter Katoen,
Lothar Thiele:
Quantitative Aspects of Embedded Systems, 04.03. - 09.03.2007
Internationales Begegnungs- und Forschungszentrum fuer Informatik (IBFI), Schloss Dagstuhl, Germany 2007 |
| 131 | | Paul Lukowicz,
Lothar Thiele,
Gerhard Tröster:
Architecture of Computing Systems - ARCS 2007, 20th International Conference, Zurich, Switzerland, March 12-15, 2007, Proceedings
Springer 2007 |
| 130 | EE | Lothar Thiele,
Iuliana Bacivarov,
Wolfgang Haid,
Kai Huang:
Mapping Applications to Tiled Multiprocessor Embedded Systems.
ACSD 2007: 29-40 |
| 129 | EE | Kai Huang,
D. Grunert,
Lothar Thiele:
Windowed FIFOs for FPGA-based Multiprocessor Systems.
ASAP 2007: 36-41 |
| 128 | EE | Wolfgang Haid,
Lothar Thiele:
Complex task activation schemes in system level performance analysis.
CODES+ISSS 2007: 173-178 |
| 127 | EE | Simon Künzli,
Arne Hamann,
Rolf Ernst,
Lothar Thiele:
Combined approach to system level performance analysis of embedded systems.
CODES+ISSS 2007: 63-68 |
| 126 | EE | Clemens Moser,
Lothar Thiele,
Davide Brunelli,
Luca Benini:
Adaptive power management in energy harvesting systems.
DATE 2007: 773-778 |
| 125 | EE | Kai Huang,
Lothar Thiele:
Performance analysis of multimedia applications using correlated streams.
DATE 2007: 912-917 |
| 124 | EE | Samarjit Chakraborty,
Tulika Mitra,
Abhik Roychoudhury,
Lothar Thiele,
Unmesh D. Bordoloi,
Cem Derdiyok:
Cache-Aware Timing Analysis of Streaming Applications.
ECRTS 2007: 159-168 |
| 123 | EE | Lothar Thiele:
Performance analysis of distributed embedded systems.
EMSOFT 2007: 10 |
| 122 | EE | Simon Perathoner,
Ernesto Wandeler,
Lothar Thiele,
Arne Hamann,
Simon Schliecker,
Rafik Henia,
Razvan Racu,
Rolf Ernst,
Michael González Harbour:
Influence of different system abstractions on the performance analysis of distributed real-time systems.
EMSOFT 2007: 193-202 |
| 121 | EE | Matthias Dyer,
Jan Beutel,
Thomas Kalt,
Patrice Oehen,
Lothar Thiele,
Kevin Martin,
Philipp Blum:
Deployment Support Network.
EWSN 2007: 195-211 |
| 120 | EE | Matthias Woehrle,
Christian Plessl,
Jan Beutel,
Lothar Thiele:
Increasing the reliability of wireless sensor networks with a distributed testing framework.
EmNets 2007: 93-97 |
| 119 | EE | Boudewijn R. Haverkort,
Joost-Pieter Katoen,
Lothar Thiele:
07101 Abstracts Collection -- Quantitative Aspects of Embedded Systems.
Quantitative Aspects of Embedded Systems 2007 |
| 118 | EE | Boudewijn R. Haverkort,
Joost-Pieter Katoen,
Lothar Thiele:
07101 Executive Summary -- Quantitative Aspects of Embedded Systems.
Quantitative Aspects of Embedded Systems 2007 |
| 117 | EE | Jens B. Schmitt,
Frank A. Zdarsky,
Lothar Thiele:
A Comprehensive Worst-Case Calculus for Wireless Sensor Networks with In-Network Processing.
RTSS 2007: 193-202 |
| 116 | EE | Linh T. X. Phan,
Samarjit Chakraborty,
P. S. Thiagarajan,
Lothar Thiele:
Composing Functional and State-Based Performance Models for Analyzing Heterogeneous Real-Time Systems.
RTSS 2007: 343-352 |
| 115 | EE | Ernesto Wandeler,
Lothar Thiele:
Workload correlations in multi-processor hard real-time systems.
J. Comput. Syst. Sci. 73(2): 207-224 (2007) |
| 114 | EE | Clemens Moser,
Davide Brunelli,
Lothar Thiele,
Luca Benini:
Real-time scheduling for energy harvesting sensor nodes.
Real-Time Systems 37(3): 233-260 (2007) |
| 113 | EE | Joseph R. Cavallaro,
Sanjay Rajopadhye,
Lothar Thiele,
Tobias Noll:
Special Issue on ASAP 2004 Conference.
VLSI Signal Processing 49(1): 1-2 (2007) |
| 2006 |
|---|
| 112 | EE | Ernesto Wandeler,
Lothar Thiele:
Optimal TDMA time slot and cycle length allocation for hard real-time systems.
ASP-DAC 2006: 479-484 |
| 111 | EE | Pier Stanislao Paolucci,
Ahmed Amine Jerraya,
Rainer Leupers,
Lothar Thiele,
Piero Vicini:
SHAPES: : a tiled scalable software hardware architecture platform for embedded systems.
CODES+ISSS 2006: 167-172 |
| 110 | EE | Simon Künzli,
Francesco Poletti,
Luca Benini,
Lothar Thiele:
Combining simulation and formal methods for system-level performance analysis.
DATE 2006: 236-241 |
| 109 | EE | Ernesto Wandeler,
Alexander Maxiaguine,
Lothar Thiele:
Performance analysis of greedy shapers in real-time systems.
DATE 2006: 444-449 |
| 108 | EE | Clemens Moser,
Davide Brunelli,
Lothar Thiele,
Luca Benini:
Lazy Scheduling for Energy Harvesting Sensor Nodes.
DIPES 2006: 125-134 |
| 107 | EE | Clemens Moser,
Lothar Thiele,
Luca Benini,
Davide Brunelli:
Real-Time Scheduling with Regenerative Energy.
ECRTS 2006: 261-270 |
| 106 | EE | Eckart Zitzler,
Dimo Brockhoff,
Lothar Thiele:
The Hypervolume Indicator Revisited: On the Design of Pareto-compliant Indicators Via Weighted Integration.
EMO 2006: 862-876 |
| 105 | EE | Lothar Thiele,
Ernesto Wandeler,
Nikolay Stoimenov:
Real-time interfaces for composing real-time systems.
EMSOFT 2006: 34-43 |
| 104 | EE | Luca Negri,
Lothar Thiele:
Power Management for Bluetooth Sensor Networks.
EWSN 2006: 196-211 |
| 103 | EE | Ernesto Wandeler,
Lothar Thiele:
Interface-Based Design of Real-Time Systems with Hierarchical Scheduling.
IEEE Real Time Technology and Applications Symposium 2006: 243-252 |
| 102 | | Simon Künzli,
Lothar Thiele:
Generating event traces based on arrival curves.
MMB 2006: 81-98 |
| 101 | EE | Samarjit Chakraborty,
Yanhong Liu,
Nikolay Stoimenov,
Lothar Thiele,
Ernesto Wandeler:
Interface-Based Rate Analysis of Embedded Systems.
RTSS 2006: 25-34 |
| 100 | EE | Amela Prelic,
Stefan Bleuler,
Philip Zimmermann,
Anja Wille,
Peter Bühlmann,
Wilhelm Gruissem,
Lars Hennig,
Lothar Thiele,
Eckart Zitzler:
A systematic comparison and evaluation of biclustering methods for gene expression data.
Bioinformatics 22(9): 1122-1129 (2006) |
| 99 | EE | Marco Laumanns,
Lothar Thiele,
Eckart Zitzler:
An efficient, adaptive parameter variation scheme for metaheuristics based on the epsilon-constraint method.
European Journal of Operational Research 169(3): 932-942 (2006) |
| 98 | EE | Ernesto Wandeler,
Lothar Thiele,
Marcel Verhoef,
Paul Lieverse:
System architecture evaluation using modular performance analysis: a case study.
STTT 8(6): 649-667 (2006) |
| 2005 |
|---|
| 97 | | Manfred Morari,
Lothar Thiele:
Hybrid Systems: Computation and Control, 8th International Workshop, HSCC 2005, Zurich, Switzerland, March 9-11, 2005, Proceedings
Springer 2005 |
| 96 | EE | Ernesto Wandeler,
Lothar Thiele:
Abstracting functionality for modular performance analysis of hard real-time systems.
ASP-DAC 2005: 697-702 |
| 95 | EE | Alexander Maxiaguine,
Samarjit Chakraborty,
Lothar Thiele:
DVS for buffer-constrained architectures with predictable QoS-energy tradeoffs.
CODES+ISSS 2005: 111-116 |
| 94 | EE | Samarjit Chakraborty,
Lothar Thiele:
A New Task Model for Streaming Applications and Its Schedulability Analysis.
DATE 2005: 486-491 |
| 93 | EE | Ernesto Wandeler,
Lothar Thiele:
Real-time interfaces for interface-based design of real-time systems with fixed priority scheduling.
EMSOFT 2005: 80-89 |
| 92 | | Lothar Thiele:
Analitic Performance Analysis of Distributed Embedded Systems.
FDL 2005: 31-33 |
| 91 | EE | Lothar Thiele:
Modular Performance Analysis of Distributed Embedded Systems.
FORMATS 2005: 1 |
| 90 | | Christian Haubelt,
Marek Jersak,
Kai Richter,
Karsten Strehl,
Dirk Ziegenbein,
Rolf Ernst,
Jürgen Teich,
Lothar Thiele:
SPI-Workbench - Modellierung, Analyse und Optimierung eingebetteter Systeme.
GI Jahrestagung (2) 2005: 693-697 |
| 89 | EE | Ernesto Wandeler,
Lothar Thiele:
Characterizing Workload Correlations in Multi Processor Hard Real-Time Systems.
IEEE Real-Time and Embedded Technology and Applications Symposium 2005: 46-55 |
| 88 | EE | Jan Beutel,
Matthias Dyer,
Lennart Meier,
Lothar Thiele:
Scalable topology control for deployment-support networks.
IPSN 2005: 359-363 |
| 87 | EE | Lennart Meier,
Lothar Thiele:
Brief announcement: gradient clock synchronization in sensor networks.
PODC 2005: 238 |
| 86 | EE | Marco Laumanns,
Lothar Thiele,
Eckart Zitzler:
An Adaptive Scheme to Generate the Pareto Front Based on the Epsilon-Constraint Method.
Practical Approaches to Multi-Objective Optimization 2005 |
| 85 | EE | Ernesto Wandeler,
Jörn W. Janneck,
Edward A. Lee,
Lothar Thiele:
Counting Interface Automata and their Application in Static Analysis of Actor Models.
SEFM 2005: 106-116 |
| 84 | EE | Ernesto Wandeler,
Alexander Maxiaguine,
Lothar Thiele:
Quantitative Characterization of Event Streams in Analysis of Hard Real-Time Applications.
Real-Time Systems 29(2-3): 205-225 (2005) |
| 2004 |
|---|
| 83 | | Lothar Thiele,
Reinhard Wilhelm:
Perspectives Workshop: Design of Systems with Predictable Behaviour, 16.-19. November 2003
IBFI, Schloss Dagstuhl, Germany 2004 |
| 82 | EE | Alexander Maxiaguine,
Simon Künzli,
Samarjit Chakraborty,
Lothar Thiele:
Rate analysis for streaming applications with on-chip buffer constraints.
ASP-DAC 2004: 131-136 |
| 81 | EE | Alexander Maxiaguine,
Simon Künzli,
Lothar Thiele:
Workload Characterization Model for Tasks with Variable Execution Demand.
DATE 2004: 1040-1045 |
| 80 | EE | Lothar Thiele,
Reinhard Wilhelm:
Abstracts Collection.
Design of Systems with Predictable Behaviour 2004 |
| 79 | EE | Lothar Thiele,
Reinhard Wilhelm:
Design for Time-Predictability.
Design of Systems with Predictable Behaviour 2004 |
| 78 | | Philipp Blum,
Lothar Thiele:
Trace-based evaluation of clock synchronization algorithms for wireless loudspeakers.
ESTImedia 2004: 7-12 |
| 77 | EE | Jan Beutel,
Oliver Kasten,
Friedemann Mattern,
Kay Römer,
Frank Siegemund,
Lothar Thiele:
Prototyping Wireless Sensor Network Applications with BTnodes.
EWSN 2004: 323-338 |
| 76 | EE | Matthias Dyer,
Marco Platzner,
Lothar Thiele:
Efficient Execution of Process Networks on a Reconfigurable Hardware Virtual Machine.
FCCM 2004: 342-344 |
| 75 | EE | Ernesto Wandeler,
Alexander Maxiaguine,
Lothar Thiele:
Quantitative Characterization of Event Streams in Analysis of Hard Real-Time Applications.
IEEE Real-Time and Embedded Technology and Applications Symposium 2004: 450-461 |
| 74 | EE | Philipp Blum,
Lennart Meier,
Lothar Thiele:
Improved interval-based clock synchronization in sensor networks.
IPSN 2004: 349-358 |
| 73 | | Marcel Verhoef,
Ernesto Wandeler,
Lothar Thiele,
Paul Lieverse:
System Architecture Evaluation Using Modular Performance Analysis - A Case Study.
ISoLA (Preliminary proceedings) 2004: 209-219 |
| 72 | EE | Lennart Meier,
Philipp Blum,
Lothar Thiele:
Internal synchronization of drift-constraint clocks in ad-hoc sensor networks.
MobiHoc 2004: 90-97 |
| 71 | EE | Alexander Maxiaguine,
Samarjit Chakraborty,
Simon Künzli,
Lothar Thiele:
Evaluating Schedulers for Multimedia Processing on Buffer-Constrained SoC Platforms.
IEEE Design & Test of Computers 21(5): 368-377 (2004) |
| 70 | EE | Urs Anliker,
Jan Beutel,
Matthias Dyer,
Rolf Enzler,
Paul Lukowicz,
Lothar Thiele,
Gerhard Tröster:
A Systematic Approach to the Design of Distributed Wearable Systems.
IEEE Trans. Computers 53(8): 1017-1033 (2004) |
| 69 | | Marco Laumanns,
Lothar Thiele,
Eckart Zitzler:
Running time analysis of multiobjective evolutionary algorithms on pseudo-Boolean functions.
IEEE Trans. Evolutionary Computation 8(2): 170-182 (2004) |
| 68 | EE | Marco Laumanns,
Lothar Thiele,
Eckart Zitzler:
Running time analysis of evolutionary algorithms on a simplified multiobjective knapsack problem.
Natural Computing 3(1): 37-51 (2004) |
| 67 | EE | Lothar Thiele,
Reinhard Wilhelm:
Design for Timing Predictability.
Real-Time Systems 28(2-3): 157-177 (2004) |
| 2003 |
|---|
| 66 | | Carlos M. Fonseca,
Peter J. Fleming,
Eckart Zitzler,
Kalyanmoy Deb,
Lothar Thiele:
Evolutionary Multi-Criterion Optimization, Second International Conference, EMO 2003, Faro, Portugal, April 8-11, 2003, Proceedings
Springer 2003 |
| 65 | EE | Samarjit Chakraborty,
Simon Künzli,
Lothar Thiele:
A General Framework for Analysing System Properties in Platform-Based Embedded System Designs.
DATE 2003: 10190-10195 |
| 64 | EE | Stefan Bleuler,
Marco Laumanns,
Lothar Thiele,
Eckart Zitzler:
PISA: A Platform and Programming Language Independent Interface for Search Algorithms.
EMO 2003: 494-508 |
| 63 | EE | Christoph Steiger,
Herbert Walder,
Marco Platzner,
Lothar Thiele:
Online Scheduling and Placement of Real-time Tasks to Partially Reconfigurable Devices.
RTSS 2003: 224-235 |
| 62 | | Samarjit Chakraborty,
Simon Künzli,
Lothar Thiele,
Andreas Herkersdorf,
Patricia Sagmeister:
Performance evaluation of network processor architectures: combining simulation with analytical estimation.
Computer Networks 41(5): 641-665 (2003) |
| 61 | | Eckart Zitzler,
Lothar Thiele,
Marco Laumanns,
Carlos M. Fonseca,
Viviane Grunert da Fonseca:
Performance assessment of multiobjective optimizers: an analysis and review.
IEEE Trans. Evolutionary Computation 7(2): 117-132 (2003) |
| 60 | EE | Christian Plessl,
Rolf Enzler,
Herbert Walder,
Jan Beutel,
Marco Platzner,
Lothar Thiele,
Gerhard Tröster:
The case for reconfigurable hardware in wearable computing.
Personal and Ubiquitous Computing 7(5): 299-308 (2003) |
| 2002 |
|---|
| 59 | EE | Samarjit Chakraborty,
Thomas Erlebach,
Simon Künzli,
Lothar Thiele:
Schedulability of event-driven code blocks in real-time embedded systems.
DAC 2002: 616-621 |
| 58 | EE | Lothar Thiele,
Samarjit Chakraborty,
Matthias Gries,
Simon Künzli:
A framework for evaluating design tradeoffs in packet processing architectures.
DAC 2002: 880-885 |
| 57 | EE | Jürgen Teich,
Lothar Thiele:
Exact Partitioning of Affine Dependence Algorithms.
Embedded Processor Design Challenges 2002: 135-153 |
| 56 | | Marco Laumanns,
Lothar Thiele,
Eckart Zitzler,
Kalyanmoy Deb:
Archiving With Guaranteed Convergence And Diversity In Multi-objective Optimization.
GECCO 2002: 439-447 |
| 55 | | Eckart Zitzler,
Marco Laumanns,
Lothar Thiele,
Carlos M. Fonseca,
Viviane Grunert da Fonseca:
Why Quality Assessment Of Multiobjective Optimizers Is Difficult.
GECCO 2002: 666-674 |
| 54 | EE | Samarjit Chakraborty,
Matthias Gries,
Lothar Thiele:
Supporting a Low Delay Best-Effort Class in the Presence of Real-Time Traffic.
IEEE Real Time Technology and Applications Symposium 2002: 45-54 |
| 53 | EE | Samarjit Chakraborty,
Simon Künzli,
Lothar Thiele:
Approximate Schedulability Analysis.
IEEE Real-Time Systems Symposium 2002: 159-168 |
| 52 | EE | Christian Plessl,
Rolf Enzler,
Herbert Walder,
Jan Beutel,
Marco Platzner,
Lothar Thiele:
Reconfigurable Hardware in Wearable Computing Nodes.
ISWC 2002: 215-222 |
| 51 | EE | Marco Laumanns,
Lothar Thiele,
Eckart Zitzler,
Emo Welzl,
Kalyanmoy Deb:
Running Time Analysis of Multi-objective Evolutionary Algorithms on a Simple Discrete Optimization Problem.
PPSN 2002: 44-53 |
| 50 | | Marco Laumanns,
Lothar Thiele,
Kalyanmoy Deb,
Eckart Zitzler:
Combining Convergence and Diversity in Evolutionary Multiobjective Optimization.
Evolutionary Computation 10(3): 263-282 (2002) |
| 49 | EE | Dirk Ziegenbein,
Kai Richter,
Rolf Ernst,
Lothar Thiele,
Jürgen Teich:
SPI - a system model for heterogeneously specified embedded systems.
IEEE Trans. VLSI Syst. 10(4): 379-389 (2002) |
| 2001 |
|---|
| 48 | | Eckart Zitzler,
Kalyanmoy Deb,
Lothar Thiele,
Carlos A. Coello Coello,
David Corne:
Evolutionary Multi-Criterion Optimization, First International Conference, EMO 2001, Zurich, Switzerland, March 7-9, 2001, Proceedings
Springer 2001 |
| 47 | EE | Marco Laumanns,
Eckart Zitzler,
Lothar Thiele:
On the Effects of Archiving, Elitism, and Density Based Selection in Evolutionary Multi-objective Optimization.
EMO 2001: 181-196 |
| 46 | EE | Lothar Thiele,
Samarjit Chakraborty,
Matthias Gries,
Alexander Maxiaguine,
Jonas Greutert:
Embedded Software in Network Processors - Models and Algorithms.
EMSOFT 2001: 416-434 |
| 45 | EE | Lothar Thiele:
Integral Design Representations for Embedded Systems.
ICCAD 2001: 264 |
| 44 | EE | Samarjit Chakraborty,
Thomas Erlebach,
Lothar Thiele:
On the Complexity of Scheduling Conditional Real-Time Code.
WADS 2001: 38-49 |
| 43 | EE | Karsten Strehl,
Lothar Thiele,
Matthias Gries,
Dirk Ziegenbein,
Rolf Ernst,
Jürgen Teich:
FunState-an internal design representation for codesign.
IEEE Trans. VLSI Syst. 9(4): 524-544 (2001) |
| 42 | EE | Matthias Anlauff,
Samarjit Chakraborty,
Philipp W. Kutter,
Alfonso Pierantonio,
Lothar Thiele:
Generating an action notation environment from Montages descriptions.
STTT 3(4): 431-455 (2001) |
| 2000 |
|---|
| 41 | | Yuri Gurevich,
Philipp W. Kutter,
Martin Odersky,
Lothar Thiele:
Abstract State Machines, Theory and Applications, International Workshop, ASM 2000, Monte Verità, Switzerland, March 19-24, 2000, Proceedings
Springer 2000 |
| 40 | | Eckart Zitzler,
Kalyanmoy Deb,
Lothar Thiele:
Comparison of Multiobjective Evolutionary Algorithms: Empirical Results.
Evolutionary Computation 8(2): 173-195 (2000) |
| 39 | EE | Michael Eisenring,
Lothar Thiele,
Eckart Zitzler:
Conflicting Criteria in Embedded System Design.
IEEE Design & Test of Computers 17(2): 51-59 (2000) |
| 38 | EE | Karsten Strehl,
Lothar Thiele:
Interval diagrams for efficient symbolic verification of processnetworks.
IEEE Trans. on CAD of Integrated Circuits and Systems 19(8): 939-956 (2000) |
| 37 | | Lothar Thiele,
Jürgen Teich,
Karsten Strehl:
Regular state machines.
Parallel Algorithms Appl. 15(3-4): 265-300 (2000) |
| 1999 |
|---|
| 36 | EE | Karsten Strehl,
Lothar Thiele,
Dirk Ziegenbein,
Rolf Ernst,
Jürgen Teich:
Scheduling hardware/software systems using symbolic techniques.
CODES 1999: 173-177 |
| 35 | EE | Kai Richter,
Dirk Ziegenbein,
Rolf Ernst,
Lothar Thiele,
Jürgen Teich:
Representation of Function Variants for Embedded System Optimization and Synthesis.
DAC 1999: 517-522 |
| 34 | EE | Karsten Strehl,
Lothar Thiele:
Interval Diagram Techniques for Symbolic Model Checking of Petri Nets.
DATE 1999: 756-757 |
| 33 | | Michael Eisenring,
Marco Platzner,
Lothar Thiele:
Communication Synthesis for Reconfigurable Embedded Systems.
FPL 1999: 205-214 |
| 32 | EE | Lothar Thiele,
Karsten Strehl,
Dirk Ziegenbein,
Rolf Ernst,
Jürgen Teich:
FunState - an internal design representation for codesign.
ICCAD 1999: 558-565 |
| 31 | | Eckart Zitzler,
Lothar Thiele:
Multiobjective evolutionary algorithms: a comparative case study and the strength Pareto approach.
IEEE Trans. Evolutionary Computation 3(4): 257-271 (1999) |
| 1998 |
|---|
| 30 | EE | Dirk Ziegenbein,
Rolf Ernst,
Kai Richter,
Jürgen Teich,
Lothar Thiele:
Combining multiple models of computation for scheduling and allocation.
CODES 1998: 9-13 |
| 29 | EE | Philipp W. Kutter,
Daniel Schweizer,
Lothar Thiele:
Integrating Domain Specific Language Design in the Software Life Cycle.
FM-Trends 1998: 196-212 |
| 28 | EE | Dirk Ziegenbein,
Kai Richter,
Rolf Ernst,
Jürgen Teich,
Lothar Thiele:
Representation of process mode correlation for scheduling.
ICCAD 1998: 54-61 |
| 27 | EE | Karsten Strehl,
Lothar Thiele:
Symbolic model checking of process networks using interval diagram techniques.
ICCAD 1998: 686-692 |
| 26 | EE | Eckart Zitzler,
Lothar Thiele:
Multiobjective Optimization Using Evolutionary Algorithms - A Comparative Case Study.
PPSN 1998: 292-304 |
| 25 | EE | Christian Heckler,
Lothar Thiele:
Complexity Analysis of a Parallel Lattice Basis Reduction Algorithm.
SIAM J. Comput. 27(5): 1295-1302 (1998) |
| 1997 |
|---|
| 24 | EE | Jürgen Teich,
Tobias Blickle,
Lothar Thiele:
An evolutionary approach to system-level synthesis.
CODES 1997: 167-172 |
| 23 | EE | Uwe Schwiegelshohn,
Lothar Thiele:
Periodic and Non-periodic Min-Max Equations.
ICALP 1997: 379-389 |
| 22 | EE | Jürgen Teich,
Lothar Thiele,
Sundararajan Sriram,
Michael Martin:
Performance analysis and optimization of mixed asynchronous synchronous systems.
IEEE Trans. on CAD of Integrated Circuits and Systems 16(5): 473-484 (1997) |
| 21 | EE | Jürgen Teich,
Lothar Thiele,
Lee Z. Zhang:
Partitioning Processor Arrays under Resource Constraints.
VLSI Signal Processing 17(1): 5-20 (1997) |
| 1996 |
|---|
| 20 | EE | Jürgen Teich,
Lothar Thiele,
Li Zhang:
Scheduling of Partitioned Regular Algorithms on Processor Arrays with Constrained Resources.
ASAP 1996: 131-144 |
| 19 | EE | Jean-Paul Theis,
Lothar Thiele:
VLIW-Processors under Periodic Real Time Constraints.
ICCD 1996: 191- |
| 18 | | Tobias Blickle,
Lothar Thiele:
A Comparison of Selection Schemes used in Evolutionary Algorithms.
Evolutionary Computation 4(4): 361-394 (1996) |
| 1995 |
|---|
| 17 | EE | Jean-Paul Theis,
Lothar Thiele:
POM: a processor model for image processing.
ICCD 1995: 326-331 |
| 16 | | Tobias Blickle,
Lothar Thiele:
A Mathematical Analysis of Tournament Selection.
ICGA 1995: 9-16 |
| 15 | EE | Jürgen Teich,
Lothar Thiele,
Edward A. Lee:
Modeling and simulation of heterogeneous real-time systems based on a deterministic discrete event model.
ISSS 1995: 156-161 |
| 14 | EE | Joachim König,
Lothar Thiele:
Algorithm-architecture co-design by example: a coprocessor for on-line arithmetic.
Microprocessing and Microprogramming 41(5-6): 339-357 (1995) |
| 13 | EE | Lothar Thiele:
Resource constrained scheduling of uniform algorithms.
VLSI Signal Processing 10(3): 295-310 (1995) |
| 1994 |
|---|
| 12 | | Francky Catthoor,
Ed F. Deprettere,
Yu Hen Hu,
Jan M. Rabaey,
Heinrich Meyr,
Lothar Thiele:
Is it Possible to achieve a Teraflop/s on a chip? From High Performance Algorithms to Architectures.
ISCAS 1994: 129-136 |
| 11 | | Christian Heckler,
Lothar Thiele:
Computing Linear Data Dependencies in Nested Loop Programs.
Parallel Processing Letters 4: 193-204 (1994) |
| 10 | EE | Lothar Thiele,
Edward Chow:
Guest editors' introduction.
VLSI Signal Processing 8(2): 95 (1994) |
| 1993 |
|---|
| 9 | EE | Christian Heckler,
Lothar Thiele:
Parallel Complexitiy of Lattice Basis Reduction and a Floating-Point Parallel Algorithm.
PARLE 1993: 744-747 |
| 8 | | Christian Heckler,
Lothar Thiele:
A Parallel Lattice Basis Reduction for Mesh-Connected Processor Arrays and Parallel Complexity.
SPDP 1993: 400-407 |
| 1992 |
|---|
| 7 | EE | Wolfgang Backes,
Uwe Schwiegelshohn,
Lothar Thiele:
Analysis of Free Schedule in Periodic Graphs.
SPAA 1992: 333-342 |
| 1991 |
|---|
| 6 | | Ulrich Arzt,
Daniela Merziger,
Lothar Thiele:
Rekursive Prozeduraufrufe in VLSI-Occam.
Transputer-Anwender-Treffen 1991: 108-115 |
| 5 | EE | Jürgen Teich,
Lothar Thiele:
Control generation in the design of processor arrays.
VLSI Signal Processing 3(1-2): 77-92 (1991) |
| 1989 |
|---|
| 4 | | Uwe Schwiegelshohn,
Lothar Thiele:
Linear Systolic Arrays for Matrix Comutations.
J. Parallel Distrib. Comput. 7(1): 28-39 (1989) |
| 1988 |
|---|
| 3 | | Uwe Schwiegelshohn,
Lothar Thiele:
A Systolic Array for the Assignment Problem.
IEEE Trans. Computers 37(11): 1422-1425 (1988) |
| 1987 |
|---|
| 2 | | Uwe Schwiegelshohn,
Lothar Thiele:
A Systolic Array for Cyclic-by-Rows Jacobi Algorithms.
J. Parallel Distrib. Comput. 4(3): 334-340 (1987) |
| 1986 |
|---|
| 1 | | Uwe Schwiegelshohn,
Lothar Thiele:
On the Systolic Detection of Shortest Routes.
ICPP 1986: 762-764 |
