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Michiel Steyaert Vis

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*2009
26EEPieter Palmers, Trent McConaghy, Michiel Steyaert, Georges G. E. Gielen: Massively multi-topology sizing of analog integrated circuits. DATE 2009: 706-711
2008
25EETrent McConaghy, Pieter Palmers, Georges G. E. Gielen, Michiel Steyaert: Automated extraction of expert knowledge in analog topology selection and sizing. ICCAD 2008: 392-395
24EEJorg Daniels, Wim Dehaene, Michiel Steyaert, Andreas Wiesbauer: A/D conversion using an Asynchronous Delta-Sigma Modulator and a time-to-digital converter. ISCAS 2008: 1648-1651
23EEHans Danneels, Marian Verhelst, Pieter Palmers, Wim Vereecken, Bruno Boury, Wim Dehaene, Michiel Steyaert, Georges G. E. Gielen: A low-power mixing DAC IR-UWB-receiver. ISCAS 2008: 2697-2700
2007
22EETrent McConaghy, Pieter Palmers, Georges G. E. Gielen, Michiel Steyaert: Simultaneous Multi-Topology Multi-Objective Sizing Across Thousands of Analog Circuit Topologies. DAC 2007: 944-947
21EETom Eeckelaert, Raf Schoofs, Georges G. E. Gielen, Michiel Steyaert, Willy M. C. Sansen: An efficient methodology for hierarchical synthesis of mixed-signal systems with fully integrated building block topology selection. DATE 2007: 81-86
2006
20EETom Eeckelaert, Raf Schoofs, Georges G. E. Gielen, Michiel Steyaert, Willy M. C. Sansen: Hierarchical bottom--up analog optimization methodology validated by a delta-sigma A/D converter design for the 802.11a/b/g standard. DAC 2006: 25-30
19EERaf Schoofs, Michiel Steyaert, Willy M. C. Sansen: A 7.5mW, 11-bit continuous-time sigma-delta A/D converter for WLAN applications. ISCAS 2006
2005
18EEVesselin K. Vassilev, S. Thijs, P. L. Segura, P. Wambacq, Paul Leroux, Guido Groeseneken, M. I. Natarajan, H. E. Maes, Michiel Steyaert: ESD-RF co-design methodology for the state of the art RF-CMOS blocks. Microelectronics Reliability 45(2): 255-268 (2005)
2004
17EEJoão Ramos, Kenneth Francken, Georges G. E. Gielen, Michiel Steyaert: Knowledge- and optimization-based design of RF power amplifiers. ISCAS (1) 2004: 629-632
16EEMarian Verhelst, Wim Vereecken, Michiel Steyaert, Wim Dehaene: Architectures for low power ultra-wideband radio receivers in the 3.1-5GHz band for data rates < 10Mbps. ISLPED 2004: 280-285
2003
15EEPatrick Reynaert, Koen L. R. Mertens, Michiel Steyaert: A state-space behavioral model for CMOS class E power amplifiers. IEEE Trans. on CAD of Integrated Circuits and Systems 22(2): 132-138 (2003)
14EEVesselin K. Vassilev, S. Jenei, Guido Groeseneken, R. Venegas, S. Thijs, V. De Heyn, M. Natarajan Iyer, Michiel Steyaert, H. E. Maes: High frequency characterization and modelling of the parasitic RC performance of two terminal ESD CMOS protection devices. Microelectronics Reliability 43(7): 1011-1020 (2003)
2002
13EEJan Vandenbussche, K. Uyttenhove, Erik Lauwers, Michiel Steyaert, Georges G. E. Gielen: Systematic design of a 200 MS/s 8-bit interpolating/averaging A/D converter. DAC 2002: 449-454
12EEMichiel Steyaert, Peter J. Vancorenland: CMOS: a paradigm for low power wireless? DAC 2002: 836-841
11EEJan Vandenbussche, Erik Lauwers, K. Uyttenhove, Michiel Steyaert, Georges G. E. Gielen: Systematic Design of a 200 Ms/S 8-bit Interpolating A/D Converter. DATE 2002: 357-361
10EEPeter J. Vancorenland, Philippe Coppejans, Wouter De Cock, Paul Leroux, Michiel Steyaert: Optimization of a fully integrated low power CMOS GPS receiver. ICCAD 2002: 305-308
9EECarl De Ranter, Michiel Steyaert: Design techniques for low power high bandwidth upconversion in CMOS. ISLPED 2002: 237-242
8EECarl De Ranter, Geert Van der Plas, Michiel Steyaert, Georges G. E. Gielen, Willy M. C. Sansen: CYCLONE: automated design and layout of RF LC-oscillators. IEEE Trans. on CAD of Integrated Circuits and Systems 21(10): 1161-1170 (2002)
2001
7EEPeter J. Vancorenland, Geert Van der Plas, Michiel Steyaert, Georges G. E. Gielen, Willy M. C. Sansen: A Layout-Aware Synthesis Methodology for RF Circuits. ICCAD 2001: 358-
2000
6EECarl De Ranter, B. De Muer, Geert Van der Plas, Peter J. Vancorenland, Michiel Steyaert, Georges G. E. Gielen, Willy M. C. Sansen: CYCLONE: automated design and layout of RF LC-oscillators. DAC 2000: 11-14
5EEPeter J. Vancorenland, Carl De Ranter, Michiel Steyaert, Georges G. E. Gielen: Optimal RF design using smart evolutionary algorithms. DAC 2000: 7-10
1998
4EEA. Marques, Michiel Steyaert, Willy M. C. Sansen: Theory of PLL fractional-N frequency synthesizers. Wireless Networks 4(1): 79-85 (1998)
1995
3EEJan Crols, Stéphane Donnay, Michiel Steyaert, Georges G. E. Gielen: A high-level design and optimization tool for analog RF receiver front-ends. ICCAD 1995: 550-553
1994
2 Peter R. Kinget, Michiel Steyaert: Analogue CMOS VLSI Implementation of Cellular Neural Networks with Continuously Programmable Templates. ISCAS 1994: 367-370
1993
1 Michiel Steyaert, Jan Crols, S. Gogaert, Willy M. C. Sansen: Low-voltage Analog CMOS Filter Design. ISCAS 1993: 1447-1450

Coauthor Index

1Bruno Boury [23]
2Wouter De Cock [10]
3Philippe Coppejans [10]
4Jan Crols [1] [3]
5Jorg Daniels [24]
6Hans Danneels [23]
7Wim Dehaene [16] [23] [24]
8Stéphane Donnay [3]
9Tom Eeckelaert [20] [21]
10Kenneth Francken [17]
11Georges G. E. Gielen [3] [5] [6] [7] [8] [11] [13] [17] [20] [21] [22] [23] [25] [26]
12S. Gogaert [1]
13Guido Groeseneken [14] [18]
14V. De Heyn [14]
15M. Natarajan Iyer [14]
16S. Jenei [14]
17Peter R. Kinget [2]
18Erik Lauwers [11] [13]
19Paul Leroux [10] [18]
20H. E. Maes [14] [18]
21A. Marques [4]
22Trent McConaghy [22] [25] [26]
23Koen L. R. Mertens [15]
24B. De Muer [6]
25M. I. Natarajan [18]
26Pieter Palmers [22] [23] [25] [26]
27Geert Van der Plas [6] [7] [8]
28João Ramos [17]
29Carl De Ranter [5] [6] [8] [9]
30Patrick Reynaert [15]
31Willy M. C. Sansen [1] [4] [6] [7] [8] [19] [20] [21]
32Raf Schoofs [19] [20] [21]
33P. L. Segura [18]
34S. Thijs [14] [18]
35K. Uyttenhove [11] [13]
36Peter J. Vancorenland [5] [6] [7] [10] [12]
37Jan Vandenbussche [11] [13]
38Vesselin K. Vassilev [14] [18]
39R. Venegas [14]
40Wim Vereecken [16] [23]
41Marian Verhelst [16] [23]
42P. Wambacq [18]
43Andreas Wiesbauer [24]

Colors in the list of coauthors

Copyright © Tue Nov 3 08:52:44 2009 by Michael Ley (ley@uni-trier.de)