dblp.uni-trier.dewww.uni-trier.de

Ramalingam Sridhar Vis

List of publications from the DBLP Bibliography Server - FAQ
Coauthor Index - Ask others: ACM DL/Guide - CiteSeerX - CSB - MetaPress - Google - Bing - Yahoo
Home Page

*2008
26EEAshok Narasimhan, Ramalingam Sridhar: A low power and low area active clock deskewing technique for sub-90nm technologies. SoCC 2008: 179-182
25EELushan Liu, Pradeep Nagaraj, Shambhu Upadhyaya, Ramalingam Sridhar: Defect Analysis and Defect Tolerant Design of Multi-port SRAMs. J. Electronic Testing 24(1-3): 165-179 (2008)
2007
24EEGeethapriya Thamilarasu, Ramalingam Sridhar: Toward Building a Multi-level Robust Intrusion Detection Architecture for Distributed Mobile Networks. ICDCS Workshops 2007: 5
23EEVidya Bharrgavi Balasubramanyn, Geethapriya Thamilarasu, Ramalingam Sridhar: Security Solution For Data Integrity InWireless BioSensor Networks. ICDCS Workshops 2007: 79
22EEAshok Narasimhan, Ramalingam Sridhar: Impact of Variability on Clock Skew in H-tree Clock Networks. ISQED 2007: 458-466
2006
21EELushan Liu, Ramalingam Sridhar, Shambhu J. Upadhyaya: A 3-port Register File Design for Improved Fault Tolerance on Resistive Defects in Core-Cells. DFT 2006: 545-553
20EEPraveen Elakkumanan, Jente B. Kuang, Kevin J. Nowka, Ramalingam Sridhar, Rouwaida Kanj, Sani R. Nassif: SRAM Local Bit Line Access Failure Analyses. ISQED 2006: 204-209
19EEPraveen Elakkumanan, Kishan Prasad, Ramalingam Sridhar: Time Redundancy Based Scan Flip-Flop Reuse To Reduce SER Of Combinational Logic. ISQED 2006: 617-624
18EEAshok Narasimhan, Bhooma Srinivasaraghavan, Ramalingam Sridhar: A Low-Power Asymmetric Source Driver Level Converter Based Current-Mode Signaling Scheme for Global Interconnects. VLSI Design 2006: 491-494
17EESrikanth Sundaram, Praveen Elakkumanan, Ramalingam Sridhar: High Speed Robust Current Sense Amplifier for Nanoscale Memories: - A Winner Take All Approach. VLSI Design 2006: 569-574
16EEPrachee Sharma, Asheq Khan, Ashok Narasimhan, Ramalingam Sridhar, Satish K. Tripathi: Energy Conservation in Sensor Networks through Selective Node Activation. WOWMOM 2006: 115-124
2005
15EECharan Thondapu, Praveen Elakkumanan, Ramalingam Sridhar: RG-SRAM: A Low Gate Leakage Memory Design. ISVLSI 2005: 295-296
14EEAshok Narasimhan, Shantanu Divekar, Praveen Elakkumanan, Ramalingam Sridhar: A Low-Power Current-Mode Clock Distribution Scheme for Multi-GHz NoC-Based SoCs. VLSI Design 2005: 130-133
13EEAshok Narasimhan, Manish Kasotiya, Ramalingam Sridhar: A Low-Swing Differential Signaling Scheme for On-Chip Global Interconnects. VLSI Design 2005: 634-639
12EEPraveen Elakkumanan, Kishan Prasad, Ramalingam Sridhar: Low Power SER Tolerant Design to Mitigate Single Event Transients in Nanoscale Circuits. J. Low Power Electronics 1(2): 182-193 (2005)
2004
11EERamalingam Sridhar: System-on-Chip (SoC): Clocking and Synchronization Issues. VLSI Design 2004: 520-
2003
10EERanjani Sridharan, Ramalingam Sridhar, Sumita Mishra: A robust header compression technique for wireless Ad hoc networks. Mobile Computing and Communications Review 7(3): 23-24 (2003)
1998
9EERajesh S. Parthasarathy, Ramalingam Sridhar: Double Pass Transistor Logic for High Performance Wave Pipeline Circuits. VLSI Design 1998: 495-500
1997
8 Wen-jann Yang, Ramalingam Sridhar, Paul W. Palumbo: Multi-attribute Lexicon Generation by Hyper-linked Embedded Access Structure. IDEAS 1997: 299-308
1996
7EESeokjin Kim, Ramalingam Sridhar: Self-Timed Mesochronous Interconnection for High-Speed VLSI Systems. Great Lakes Symposium on VLSI 1996: 122-125
6EEWen-jann Yang, Ramalingam Sridhar, Victor Demjanenko: Parallel Intersecting Compressed Bit Vectors in a High Speed Query Server for Processing Postal Addresses. HPCA 1996: 232-241
1995
5EESeokjin Kim, Ramalingam Sridhar: A local clocking approach for self-timed datapath designs. Great Lakes Symposium on VLSI 1995: 152-
4EERam K. Krishnamurthy, Ramalingam Sridhar: A CMOS wave-pipelined image processor for real-time morphology . ICCD 1995: 638-
3 Sreejit Chakravarty, Ramalingam Sridhar, Shambhu J. Upadhyaya, Yervant Zorian, Gil Philips, Bozena Kaminska, Bernard Courtois: Conference Reports. IEEE Design & Test of Computers 12(4): 95-97 (1995)
1994
2 Xuguang Zhang, Ramalingam Sridhar: Synchronization of Wave-Pipelined Circuits. ICCD 1994: 164-167
1992
1 Paul W. Palumbo, Sargur N. Srihari, Jung Soh, Ramalingam Sridhar, Victor Demjanenko: Postal Address Block Location in Real Time. IEEE Computer 25(7): 34-42 (1992)

Coauthor Index

1Vidya Bharrgavi Balasubramanyn [23]
2Sreejit Chakravarty [3]
3Bernard Courtois [3]
4Victor Demjanenko [1] [6]
5Shantanu Divekar [14]
6Praveen Elakkumanan [12] [14] [15] [17] [19] [20]
7Bozena Kaminska [3]
8Rouwaida Kanj [20]
9Manish Kasotiya [13]
10Asheq Khan [16]
11Seokjin Kim [5] [7]
12Ram K. Krishnamurthy [4]
13Jente B. Kuang [20]
14Lushan Liu [21] [25]
15Sumita Mishra [10]
16Pradeep Nagaraj [25]
17Ashok Narasimhan [13] [14] [16] [18] [22] [26]
18Sani R. Nassif [20]
19Kevin J. Nowka [20]
20Paul W. Palumbo [1] [8]
21Rajesh S. Parthasarathy [9]
22Gil Philips [3]
23Kishan Prasad [12] [19]
24Prachee Sharma [16]
25Jung Soh [1]
26Ranjani Sridharan [10]
27Sargur N. Srihari [1]
28Bhooma Srinivasaraghavan [18]
29Srikanth Sundaram [17]
30Geethapriya Thamilarasu [23] [24]
31Charan Thondapu [15]
32Satish K. Tripathi [16]
33Shambhu Upadhyaya [25]
34Shambhu J. Upadhyaya [3] [21]
35Wen-jann Yang [6] [8]
36Xuguang Zhang [2]
37Yervant Zorian [3]

Colors in the list of coauthors

Copyright © Tue Nov 3 08:52:44 2009 by Michael Ley (ley@uni-trier.de)