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Cristina Silvano Vis

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*2009
57EEKoen Bertels, Nikitas J. Dimopoulos, Cristina Silvano, Stephan Wong: Embedded Computer Systems: Architectures, Modeling, and Simulation, 9th International Workshop, SAMOS 2009, Samos, Greece, July 20-23, 2009. Proceedings Springer 2009
56EEGianluca Palermo, Cristina Silvano, Vittorio Zaccaria: Variability-aware robust design space exploration of chip multiprocessor architectures. ASP-DAC 2009: 323-328
55EELeandro Fiorin, Gianluca Palermo, Cristina Silvano: MPSoCs run-time monitoring through Networks-on-Chip. DATE 2009: 558-561
2008
54EEOreste Villa, Gianluca Palermo, Cristina Silvano: Efficiency and scalability of barrier synchronization on NoC based many-core architectures. CASES 2008: 81-90
53EELeandro Fiorin, Gianluca Palermo, Cristina Silvano: A security monitoring service for NoCs. CODES+ISSS 2008: 197-202
52EEMatteo Monchiero, Gianluca Palermo, Cristina Silvano, Oreste Villa: A Modular Approach to Model Heterogeneous MPSoC at Cycle Level. DSD 2008: 158-164
51EEGianluca Palermo, Cristina Silvano, Vittorio Zaccaria: Discrete Particle Swarm Optimization for Multi-objective Design Space Exploration. DSD 2008: 641-644
50EEGianluca Palermo, Cristina Silvano, Vittorio Zaccaria: Robust optimization of SoC architectures: A multi-scenario approach. ESTImedia 2008: 7-12
49EEMartino Sykora, Giovanni Agosta, Cristina Silvano: Dynamic configuration of application-specific implicit instructions for embedded pipelined processors. SAC 2008: 1509-1516
48EEGianluca Palermo, Cristina Silvano, Vittorio Zaccaria: An Efficient Design Space Exploration Methodology for On-Chip Multiprocessors Subject to Application-Specific Constraints. SASP 2008: 75-82
47EELeandro Fiorin, Gianluca Palermo, Slobodan Lukovic, V. Catalano, Cristina Silvano: Secure Memory Accesses on Networks-on-Chip. IEEE Trans. Computers 57(9): 1216-1229 (2008)
2007
46EEGianluca Palermo, Giovanni Mariani, Cristina Silvano, Riccardo Locatelli, Marcello Coppola: Mapping and Topology Customization Approaches for Application-Specific STNoC Designs. ASAP 2007: 61-68
45EELeandro Fiorin, Gianluca Palermo, Slobodan Lukovic, Cristina Silvano: A data protection unit for NoC-based architectures. CODES+ISSS 2007: 167-172
44EELeandro Fiorin, Cristina Silvano, Mariagiovanna Sami: Security Aspects in Networks-on-Chips: Overview and Proposals for Secure Implementations. DSD 2007: 539-542
43EEGianluca Palermo, Cristina Silvano, Giovanni Mariani, Riccardo Locatelli, Marcello Coppola: Application-Specific Topology Design Customization for STNoC. DSD 2007: 547-550
42EEGiovanni Beltrame, Donatella Sciuto, Cristina Silvano: Multi-Accuracy Power and Performance Transaction-Level Modeling. IEEE Trans. on CAD of Integrated Circuits and Systems 26(10): 1830-1842 (2007)
41EEMatteo Monchiero, Gianluca Palermo, Cristina Silvano, Oreste Villa: Exploration of distributed shared memory architectures for NoC-based multiprocessors. Journal of Systems Architecture 53(10): 719-732 (2007)
2006
40EEGiovanni Beltrame, Dario Bruschi, Donatella Sciuto, Cristina Silvano: Decision-theoretic exploration of multiProcessor platforms. CODES+ISSS 2006: 205-210
39EEGiovanni Beltrame, Donatella Sciuto, Cristina Silvano, Damien Lyonnard, Chuck Pilkington: Exploiting TLM and object introspection for system-level simulation. DATE 2006: 100-105
38EEMatteo Monchiero, Gianluca Palermo, Cristina Silvano, Oreste Villa: Power/performance hardware optimization for synchronization intensive applications in MPSoCs. DATE 2006: 606-611
37EEMatteo Monchiero, Gianluca Palermo, Cristina Silvano, Oreste Villa: Exploration of Distributed Shared Memory Architectures for NoC-based Multiprocessors. ICSAMOS 2006: 144-151
36EEGiovanni Beltrame, Donatella Sciuto, Cristina Silvano, Pierre G. Paulin, Essaid Bensoudane: An Application Mapping Methodology and Case Study for Multi-Processor On-Chip Architectures. VLSI-SoC 2006: 146-151
35EEMatteo Monchiero, Gianluca Palermo, Cristina Silvano, Oreste Villa: Efficient Synchronization for Embedded On-Chip Multiprocessors. IEEE Trans. VLSI Syst. 14(10): 1049-1062 (2006)
2005
34EEMatteo Monchiero, Gianluca Palermo, Mariagiovanna Sami, Cristina Silvano, Vittorio Zaccaria, Roberto Zafalon: Low-power branch prediction techniques for VLIW architectures: a compiler-hints based approach. Integration 38(3): 515-524 (2005)
33EEGianluca Palermo, Cristina Silvano, Vittorio Zaccaria: Multi-objective design space exploration of embedded systems. J. Embedded Computing 1(3): 305-316 (2005)
2004
32EEMatteo Monchiero, Gianluca Palermo, Mariagiovanna Sami, Cristina Silvano, Vittorio Zaccaria, Roberto Zafalon: Power-aware branch prediction techniques: a compiler-hints based approach for VLIW processors. ACM Great Lakes Symposium on VLSI 2004: 440-443
31EEGiovanni Beltrame, Gianluca Palermo, Donatella Sciuto, Cristina Silvano: Plug-in of power models in the StepNP exploration platform: analysis of power/performance trade-offs. CASES 2004: 85-92
30EEGianluca Palermo, Cristina Silvano: PIRATE: A Framework for Power/Performance Exploration of Network-on-Chip Architectures. PATMOS 2004: 521-531
29EEGiovanni Agosta, Gianluca Palermo, Cristina Silvano: Multi-objective co-exploration of source code transformations and design space architectures for low-power embedded systems. SAC 2004: 891-896
2003
28EEGianluca Palermo, Mariagiovanna Sami, Cristina Silvano, Vittorio Zaccaria, Roberto Zafalon: Branch prediction techniques for low-power VLIW processors. ACM Great Lakes Symposium on VLSI 2003: 225-228
27EEGianluca Palermo, Cristina Silvano, S. Valsecchi, Vittorio Zaccaria: A system-level methodology for fast multi-objective design space exploration. ACM Great Lakes Symposium on VLSI 2003: 92-95
26EEGianluca Palermo, Cristina Silvano, Vittorio Zaccaria: Power-Performance System-Level Exploration of a MicroSPARC2-Based Embedded Architecture. DATE 2003: 20182-20187
25EEGianluca Palermo, Cristina Silvano, Vittorio Zaccaria: A Flexible Framework for Fast Multi-objective Design Space Exploration of Embedded Systems. PATMOS 2003: 249-258
24 Lorenzo Salvemini, Mariagiovanna Sami, Donatella Sciuto, Cristina Silvano, Vittorio Zaccaria, Roberto Zafalon: A Methodology for the Efficient Architectural Exploration of Energy-Delay Trade-offs for Embedded Systems. SAC 2003: 672-678
2002
23EEAndrea Bona, Mariagiovanna Sami, Donatella Sciuto, Vittorio Zaccaria, Cristina Silvano, Roberto Zafalon: Energy estimation and optimization of embedded VLIW processors based on instruction clustering. DAC 2002: 886-891
22EEAndrea Bona, Mariagiovanna Sami, Donatella Sciuto, Vittorio Zaccaria, Cristina Silvano, Roberto Zafalon: An Instruction-Level Methodology for Power Estimation and Optimization of Embedded VLIW Cores. DATE 2002: 1128
21EEMariagiovanna Sami, Donatella Sciuto, Cristina Silvano, Vittorio Zaccaria, Roberto Zafalon: Low-power data forwarding for VLIW embedded architectures. IEEE Trans. VLSI Syst. 10(5): 614-622 (2002)
20EEMariagiovanna Sami, Donatella Sciuto, Cristina Silvano, Vittorio Zaccaria: An instruction-level energy model for embedded VLIW architectures. IEEE Trans. on CAD of Integrated Circuits and Systems 21(9): 998-1010 (2002)
2001
19EEWilliam Fornaciari, Donatella Sciuto, Cristina Silvano, Vittorio Zaccaria: A design framework to efficiently explore energy-delay tradeoffs. CODES 2001: 260-265
18EEMariagiovanna Sami, Donatella Sciuto, Cristina Silvano, Vittorio Zaccaria, Roberto Zafalon: Exploiting data forwarding to reduce the power budget of VLIW embedded processors. DATE 2001: 252-257
17EEWilliam Fornaciari, Donatella Sciuto, Cristina Silvano, Vittorio Zaccaria: Fast system-level exploration of memory architectures driven by energy-delay metrics. ISCAS (4) 2001: 502-505
2000
16EEWilliam Fornaciari, M. Polentarutti, Donatella Sciuto, Cristina Silvano: Power optimization of system-level address buses based on software profiling. CODES 2000: 29-33
15EEMariagiovanna Sami, Donatella Sciuto, Cristina Silvano, Vittorio Zaccaria: Instruction-level power estimation for embedded VLIW cores. CODES 2000: 34-38
14 Mariagiovanna Sami, Donatella Sciuto, Cristina Silvano, Vittorio Zaccaria: Power Exploration for Embedded VLIW Architectures. ICCAD 2000: 498-503
1999
13EEWilliam Fornaciari, Donatella Sciuto, Cristina Silvano: Power estimation for architectural exploration of HW/SW communication on system-level buses. CODES 1999: 152-156
12EEWilliam Fornaciari, Donatella Sciuto, Cristina Silvano: Influence of Caching and Encoding on Power Dissipation of System-Level Buses for Embedded Systems. DATE 1999: 762-763
11EEWilliam Fornaciari, Donatella Sciuto, Cristina Silvano: Power Estimation of System-Level Buses for Microprocessor-Based Architectures: A Case Study. ICCD 1999: 131-
1998
10EELuca Benini, Giovanni De Micheli, Donatella Sciuto, Enrico Macii, Cristina Silvano: Address Bus Encoding Techniques for System-Level Power Optimization. DATE 1998: 861-
9EEDonatella Sciuto, Cristina Silvano, Renato Stefanelli: Systematic AUED Codes for Self-Checking Architectures. DFT 1998: 183-191
8EENicola Dragone, Roberto Zafalon, Carlo Guardiani, Cristina Silvano: Power invariant vector compaction based on bit clustering and temporal partitioning. ISLPED 1998: 118-120
7EEWilliam Fornaciari, Paolo Gubian, Donatella Sciuto, Cristina Silvano: Power estimation of embedded systems: a hardware/software codesign approach. IEEE Trans. VLSI Syst. 6(2): 266-275 (1998)
6EEFranco Fummi, Donatella Sciuto, Cristina Silvano: Automatic generation of error control codes for computer applications. IEEE Trans. VLSI Syst. 6(3): 502-506 (1998)
1997
5EELuca Benini, Giovanni De Micheli, Enrico Macii, Donatella Sciuto, Cristina Silvano: Asymptotic Zero-Transition Activity Encoding for Address Busses in Low-Power Microprocessor-Based Systems. Great Lakes Symposium on VLSI 1997: 77-82
4EEWilliam Fornaciari, Paolo Gubian, Donatella Sciuto, Cristina Silvano: A VHDL-based approach for power estimation of embedded systems. Journal of Systems Architecture 44(1): 37-61 (1997)
1995
3 Luca Penzo, Donatella Sciuto, Cristina Silvano: GECO: A Tool for Automatic Generation of Error Control Codes for Computer Applications. ISCAS 1995: 912-915
2EELuca Penzo, Donatella Sciuto, Cristina Silvano: VLSI design of systematic odd-weight-column byte error detecting SEC-DED codes. VLSI Design 1995: 156-160
1 Luca Penzo, Donatella Sciuto, Cristina Silvano: Construction techniques for systematic SEC-DED codes with single byte error detection and partial correction capability for computer memory systems. IEEE Transactions on Information Theory 41(2): 584-591 (1995)

Coauthor Index

1Giovanni Agosta [29] [49]
2Giovanni Beltrame [31] [36] [39] [40] [42]
3Luca Benini [5] [10]
4Essaid Bensoudane [36]
5Koen Bertels [57]
6Andrea Bona [22] [23]
7Dario Bruschi [40]
8V. Catalano [47]
9Marcello Coppola [43] [46]
10Nikitas J. Dimopoulos [57]
11Nicola Dragone [8]
12Leandro Fiorin [44] [45] [47] [53] [55]
13William Fornaciari [4] [7] [11] [12] [13] [16] [17] [19]
14Franco Fummi [6]
15Carlo Guardiani [8]
16Paolo Gubian [4] [7]
17Riccardo Locatelli [43] [46]
18Slobodan Lukovic [45] [47]
19Damien Lyonnard [39]
20Enrico Macii [5] [10]
21Giovanni Mariani [43] [46]
22Giovanni De Micheli [5] [10]
23Matteo Monchiero [32] [34] [35] [37] [38] [41] [52]
24Gianluca Palermo [25] [26] [27] [28] [29] [30] [31] [32] [33] [34] [35] [37] [38] [41] [43] [45] [46] [47] [48] [50] [51] [52] [53] [54] [55] [56]
25Pierre G. Paulin [36]
26Luca Penzo [1] [2] [3]
27Chuck Pilkington [39]
28M. Polentarutti [16]
29Lorenzo Salvemini [24]
30Mariagiovanna Sami [14] [15] [18] [20] [21] [22] [23] [24] [28] [32] [34] [44]
31Donatella Sciuto [1] [2] [3] [4] [5] [6] [7] [9] [10] [11] [12] [13] [14] [15] [16] [17] [18] [19] [20] [21] [22] [23] [24] [31] [36] [39] [40] [42]
32Renato Stefanelli [9]
33Martino Sykora [49]
34S. Valsecchi [27]
35Oreste Villa [35] [37] [38] [41] [52] [54]
36Stephan Wong [57]
37Vittorio Zaccaria [14] [15] [17] [18] [19] [20] [21] [22] [23] [24] [25] [26] [27] [28] [32] [33] [34] [48] [50] [51] [56]
38Roberto Zafalon [8] [18] [21] [22] [23] [24] [28] [32] [34]

Colors in the list of coauthors

Copyright © Tue Nov 3 08:52:44 2009 by Michael Ley (ley@uni-trier.de)