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Jaume Segura Vis

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*2009
44EEJaume Segura, Vicente R. Tomás López, Arturo Sáez Esteve, Juan J. Martínez: Automated agent-based system for weather information. EATIS 2009: 15
2008
43EEJosé Luis Rosselló, Vincent Canals, Ivan de Paúl, Jaume Segura: Using stochastic logic for efficient pattern recognition analysis. IJCNN 2008: 1057-1061
2007
42EEJosé Luis Rosselló, Carol de Benito, Sebastià A. Bota, Jaume Segura: Dynamic critical resistance: a timing-based critical resistance model for statistical delay testing of nanometer ICs. DATE 2007: 1271-1276
41EEX. Cano, Sebastià A. Bota, R. Graciani, D. Gascón, A. Herms, A. Comerma, Jaume Segura, L. Garrido: Heavy Ion Test Results in a CMOS triple Voting Register for a High-Energy Physics Experiment. IOLTS 2007: 183-184
40EESebstatià A. Bota, M. Rosales, José Luis Rosselló, Jaume Segura: Smart Temperature Sensor for Thermal Testing of Cell-Based ICs CoRR abs/0710.4733: (2007)
39EEJosé Luis Rosselló, Vicens Canals, Sebastià A. Bota, Ali Keshavarzi, Jaume Segura: A Fast Concurrent Power-Thermal Model for Sub-100nm Digital ICs CoRR abs/0710.4759: (2007)
2006
38EEJosé Luis Rosselló, Jaume Segura: A compact model to identify delay faults due to crosstalk. DATE 2006: 902-906
37 Jaume Segura: CMOS Testing at the End of the Roadmap: Challenges and Opportunities. DDECS 2006: 2
36EEJosé Luis Rosselló, Sebastià A. Bota, Vicens Canals, Ivan de Paúl, Jaume Segura: A Fully CMOS Low-Cost Chaotic Neural Network. IJCNN 2006: 659-663
35EEJosé Luis Rosselló, Carol de Benito, Sebastià A. Bota, Jaume Segura: Leakage Power Characterization Considering Process Variations. PATMOS 2006: 66-74
34EESebastià A. Bota, M. Rosales, José Luis Rosselló, Jaume Segura: Low V_D_D vs. Delay: Is it Really a Good Correlation Metric for Nanometer ICs?. VTS 2006: 358-363
33EESebastià A. Bota, José Luis Rosselló, Carol de Benito, Ali Keshavarzi, Jaume Segura: Impact of Thermal Gradients on Clock Skew and Testing. IEEE Design & Test of Computers 23(5): 414-424 (2006)
2005
32EEJosé Luis Rosselló, Vicens Canals, Sebastià A. Bota, Ali Keshavarzi, Jaume Segura: A Fast Concurrent Power-Thermal Model for Sub-100nm Digital ICs. DATE 2005: 206-211
31EESebastià A. Bota, M. Rosales, José Luis Rosselló, Jaume Segura: Smart Temperature Sensor for Thermal Testing of Cell-Based ICs. DATE 2005: 464-465
30EEB. Alorda, Sebastià A. Bota, Jaume Segura: A Non-Intrusive Built-In Sensor for Transient Current Testing of Digital VLSI Circuits. IOLTS 2005: 177-182
29EEJosé Luis Rosselló, Sebastià A. Bota, Jaume Segura: Compact Static Power Model of Complex CMOS Gates. PATMOS 2005: 348-354
2004
28EEJosé Luis Rosselló, Jaume Segura: A Compact Propagation Delay Model for Deep-Submicron CMOS Gates including Crosstalk. DATE 2004: 954-961
27EEB. Alorda, Vicens Canals, Ivan de Paúl, Jaume Segura: A BIST-based Charge Analysis for Embedded Memories. IOLTS 2004: 199-206
26EESebastià A. Bota, M. Rosales, José Luis Rosselló, Jaume Segura, Ali Keshavarzi: Within Die Thermal Gradient Impact on Clock-Skew: A New Type of Delay-Fault Mechanism. ITC 2004: 1276-1284
25EEB. Alorda, Vincent Canals, Jaume Segura: A Two-Level Power-Grid Model for Transient Current Testing Evaluation. J. Electronic Testing 20(5): 543-552 (2004)
2003
24EECharles F. Hawkins, Ali Keshavarzi, Jaume Segura: A View from the Bottom: Nanometer Technology AC Parametric Failures -- Why, Where, and How to Detect. DFT 2003: 267-
23EEB. Alorda, Jaume Segura: An Evaluation of Built-in vs. Off-chip Strategies for On-line Transient Current Testing. IOLTS 2003: 178-182
22EEB. Alorda, B. Bloechel, Ali Keshavarzi, Jaume Segura: CHARDIN: An Off-Chip Transient Current Monitor with Digital Interface for Production Testing. ITC 2003: 719-726
21EEJosé Luis Rosselló, Jaume Segura: A Compact Charge-Based Crosstalk Induced Delay Model for Submicronic CMOS Gates. PATMOS 2003: 51-59
20EEJoan Font, J. Ginard, Rodrigo Picos, Eugeni Isern, Jaume Segura, Miquel Roca, Eugenio García: A BICS for CMOS OpAmps by Monitoring the Supply Current Peak. J. Electronic Testing 19(5): 597-603 (2003)
2002
19EESwarup Bhunia, Kaushik Roy, Jaume Segura: A novel wavelet transform based transient current analysis for fault detection and localization. DAC 2002: 361-366
18EEB. Alorda, André Ivanov, Jaume Segura: An Off-Chip Sensor Circuit for On-Line Transient Current Testing. IOLTW 2002: 192
17EEJoan Font, J. Ginard, Eugeni Isern, Miquel Roca, Jaume Segura, Eugenio García: A BICS for CMOS Opamps by Monitoring the Supply Current Peak. IOLTW 2002: 94-98
16EEJaume Segura, Ali Keshavarzi, Jerry M. Soden, Charles F. Hawkins: Parametric Failures in CMOS ICs - A Defect-Based Analysis. ITC 2002: 90-99
15EEB. Alorda, M. Rosales, Jerry M. Soden, Charles F. Hawkins, Jaume Segura: Charge Based Transient Current Testing (CBT) for Submicron CMOS SRAMs. ITC 2002: 947-953
14EEJosé Luis Rosselló, Jaume Segura: A Compact Charge-Based Propagation Delay Model for Submicronic CMOS Buffers. PATMOS 2002: 219-228
13EEJaume Segura, Vivek De, Ali Keshavarzi: Challenges in Nanometric Technology Scaling: Trends and Projections. VTS 2002: 447-448
12EEJaume Segura, Peter C. Maxwell: Guest Editors' Introduction: Defect-Oriented Testing in the Deep-Submicron Era. IEEE Design & Test of Computers 19(5): 5-7 (2002)
11EEJosé Luis Rosselló, Jaume Segura: Charge-based analytical model for the evaluation of powerconsumption in submicron CMOS buffers. IEEE Trans. on CAD of Integrated Circuits and Systems 21(4): 433-448 (2002)
2001
10EEJosé Luis Rosselló, Jaume Segura: Power-Delay Modeling of Dynamic CMOS Gates for Circuit Optimization. ICCAD 2001: 494-
9EEIvan de Paúl, M. Rosales, B. Alorda, Jaume Segura, Charles F. Hawkins, Jerry M. Soden: Defect Oriented Fault Diagnosis for Semiconductor Memories using Charge Analysis: Theory and Experiments. VTS 2001: 286-291
2000
8EEB. Alorda, Ivan de Paúl, Jaume Segura, T. Miller: On-Line Current Testing for a Microprocessor Based Application with an Off-Chip Sensor. IOLTW 2000: 87-91
7EERodrigo Picos, Miquel Roca, Eugeni Isern, Jaume Segura, Eugeni García-Moreno: Experimental Results on BIC Sensors for Transient Current Testing. J. Electronic Testing 16(3): 235-241 (2000)
1999
6EEEugeni Isern, Miquel Roca, Jaume Segura: Analyzing the Need for ATPG Targeting GOS Defects. VTS 1999: 420-425
5EECharles F. Hawkins, Jaume Segura: Test and Reliability: Partners in IC Manufacturing, Part 1. IEEE Design & Test of Computers 16(3): 64-71 (1999)
4EECharles F. Hawkins, Jaume Segura, Jerry M. Soden, Ted Dellin: Test and Reliability: Partners in IC Manufacturing, Part 2. IEEE Design & Test of Computers 16(4): 66-73 (1999)
1998
3EEEugenio García Moreno, Benjamín Iñíguez, Miquel Roca, Jaume Segura, Eugeni Isern: Clocked Dosimeter Compatible with Digital CMOS Technology. J. Electronic Testing 12(1-2): 101-110 (1998)
1996
2EEJaume Segura, C. Benito, A. Rubio, Charles F. Hawkins: A detailed analysis and electrical modeling of gate oxide shorts in MOS transistors. J. Electronic Testing 8(3): 229-239 (1996)
1995
1 Jaume Segura, Carol de Benito, A. Rubio, Charles F. Hawkins: A Detailed Analysis of GOS Defects in MOS Transistors: Testing Implications at Circuit Level. ITC 1995: 544-551

Coauthor Index

1B. Alorda [8] [9] [15] [18] [22] [23] [25] [27] [30]
2C. Benito [2]
3Carol de Benito [1] [33] [35] [42]
4Swarup Bhunia [19]
5B. Bloechel [22]
6Sebastià A. Bota [26] [29] [30] [31] [32] [33] [34] [35] [36] [39] [41] [42]
7Sebstatià A. Bota [40]
8Vicens Canals [27] [32] [36] [39]
9Vincent Canals [25] [43]
10X. Cano [41]
11A. Comerma [41]
12Vivek De [13]
13Ted Dellin [4]
14Arturo Sáez Esteve [44]
15Joan Font [17] [20]
16Eugenio García [17] [20]
17Eugeni García-Moreno [7]
18L. Garrido [41]
19D. Gascón [41]
20J. Ginard [17] [20]
21R. Graciani [41]
22Charles F. Hawkins [1] [2] [4] [5] [9] [15] [16] [24]
23A. Herms [41]
24Benjamín Iñíguez [3]
25Eugeni Isern [3] [6] [7] [17] [20]
26André Ivanov [18]
27Ali Keshavarzi [13] [16] [22] [24] [26] [32] [33] [39]
28Vicente R. Tomás López [44]
29Juan J. Martínez [44]
30Peter C. Maxwell [12]
31T. Miller [8]
32Eugenio García Moreno [3]
33Ivan de Paúl [8] [9] [27] [36] [43]
34Rodrigo Picos [7] [20]
35Miquel Roca [3] [6] [7] [17] [20]
36M. Rosales [9] [15] [26] [31] [34] [40]
37José Luis Rosselló [10] [11] [14] [21] [26] [28] [29] [31] [32] [33] [34] [35] [36] [38] [39] [40] [42] [43]
38Kaushik Roy [19]
39A. Rubio [1] [2]
40Jerry M. Soden [4] [9] [15] [16]

Colors in the list of coauthors

Copyright © Tue Nov 3 08:52:44 2009 by Michael Ley (ley@uni-trier.de)