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Carl-Johan H. Seger Vis

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*2007
43EESara Adams, Magnus Björk, Thomas F. Melham, Carl-Johan H. Seger: Automatic Abstraction in Symbolic Trajectory Evaluation. FMCAD 2007: 127-135
2005
42EECarl-Johan H. Seger, Robert B. Jones, John W. O'Leary, Thomas F. Melham, Mark Aagaard, Clark Barrett, Don Syme: An industrially effective environment for formal hardware verification. IEEE Trans. on CAD of Integrated Circuits and Systems 24(9): 1381-1405 (2005)
2004
41EEJin Yang, Carl-Johan H. Seger: Compositional Specification and Model Checking in GSTE. CAV 2004: 216-228
2003
40EEJin Yang, Carl-Johan H. Seger: Introduction to generalized symbolic trajectory evaluation. IEEE Trans. VLSI Syst. 11(3): 345-353 (2003)
2002
39EEJin Yang, Carl-Johan H. Seger: Generalized Symbolic Trajectory Evaluation - Abstraction in Action. FMCAD 2002: 70-87
2001
38EEJohn Moondanos, Carl-Johan H. Seger, Ziyad Hanna, Daher Kaiss: CLEVER: Divide and Conquer Combinational Logic Equivalence VERification with False Negative Elimination. CAV 2001: 131-143
37 Jin Yang, Carl-Johan H. Seger: Introduction to Generalized Symbolic Trajectory Evaluation. ICCD 2001: 360-367
36EERobert B. Jones, John W. O'Leary, Carl-Johan H. Seger, Mark Aagaard, Thomas F. Melham: Practical Formal Verification in Microprocessor Design. IEEE Design & Test of Computers 18(4): 16-25 (2001)
2000
35EECarl-Johan H. Seger: Connecting Bits with Floating-Point Numbers: Model Checking and Theorem Proving in Practice. CADE 2000: 235
34EEMark Aagaard, Robert B. Jones, Roope Kaivola, Katherine R. Kohatsu, Carl-Johan H. Seger: Formal verification of iterative algorithms in microprocessors. DAC 2000: 201-206
33EEMark Aagaard, Robert B. Jones, Thomas F. Melham, John W. O'Leary, Carl-Johan H. Seger: A Methodology for Large-Scale Hardware Verification. FMCAD 2000: 263-282
32EECarl-Johan H. Seger: Combining functional programming and hardware verification (abstract of invited talk). ICFP 2000: 244
1999
31EEMark Aagaard, Robert B. Jones, Carl-Johan H. Seger: Parametric Representations of Boolean Constraints. DAC 1999: 402-407
30EEMark Aagaard, Robert B. Jones, Carl-Johan H. Seger: Lifted-FL: A Pragmatic Implementation of Combined Model Checking and Theorem Proving. TPHOLs 1999: 323-340
29EEScott Hazelhurst, Carl-Johan H. Seger: Model Checking Lattices: Using and reasoning about information orders for abstraction. Logic Journal of the IGPL 7(3): 375-411 (1999)
1998
28EEMark Aagaard, Robert B. Jones, Carl-Johan H. Seger: Combining Theorem Proving and Trajectory Evaluation in an Industrial Environment. DAC 1998: 538-541
27EECarl-Johan H. Seger: Formal Methods in CAD from an Industrial Perspective (abstract). FMCAD 1998: 203
26 Carl-Johan H. Seger: From lattices to practical formal hardware verification. PROCOMET 1998: 3-4
1997
25 Scott Hazelhurst, Carl-Johan H. Seger: Symbolic Trajectory Evaluation. Formal Hardware Verification 1997: 3-78
1996
24 Robert B. Jones, Carl-Johan H. Seger, David L. Dill: Self-Consistency Checking. FMCAD 1996: 159-171
1995
23EEMark Aagaard, Carl-Johan H. Seger: The formal verification of a pipelined double-precision IEEE floating-point multiplier. ICCAD 1995: 7-10
22 Carl-Johan H. Seger, Randal E. Bryant: Formal Verification by Symbolic Evaluation of Partially-Ordered Trajectories. Formal Methods in System Design 6(2): 147-189 (1995)
21EETrevor Wing Sang Lee, Mark R. Greenstreet, Carl-Johan H. Seger: Automatic Verification of Asynchronous Circuits. IEEE Design & Test of Computers 12(1): 24-31 (1995)
20EEScott Hazelhurst, Carl-Johan H. Seger: A simple theorem prover based on symbolic trajectory evaluation and BDD's. IEEE Trans. on CAD of Integrated Circuits and Systems 14(4): 413-422 (1995)
1994
19 Jeffrey J. Joyce, Carl-Johan H. Seger: Higher Order Logic Theorem Proving and its Applications, 6th International Workshop, HUG '93, Vancouver, BC, Canada, August 11-13, 1993, Proceedings Springer 1994
18EEScott Hazelhurst, Carl-Johan H. Seger: Composing Symbolic Trajectory Evaluation Results. CAV 1994: 273-285
17EEZheng Zhu, Carl-Johan H. Seger: The Completeness of a Hardware Inference System. CAV 1994: 286-298
16 Trevor Wing Sang Lee, Mark R. Greenstreet, Carl-Johan H. Seger: Automatic Verification of Refinement. ICCD 1994: 225-229
15 Carl-Johan H. Seger, Randal E. Bryant: Digital Circuit Verification Using Partially-Ordered State Models. ISMVL 1994: 2-7
14 Carl-Johan H. Seger, Janusz A. Brzozowski: Generalized Ternary Simulation of Sequential Circuits. ITA 28(3-4): 159-186 (1994)
1993
13EEJeffrey J. Joyce, Carl-Johan H. Seger: Linking BDD-Based Symbolic Evaluation to Interactive Theorem-Proving. DAC 1993: 469-474
12EEJeffrey J. Joyce, Carl-Johan H. Seger: The HOL-Voss System: Model-Checking inside a General-Purpose Theorem-Prover. HUG 1993: 185-198
11EEZheng Zhu, Jeffrey J. Joyce, Carl-Johan H. Seger: Verification of the Tamarack-3 Microprocessor in a Hybrid Verification Environment. HUG 1993: 253-266
10EESreeranga P. Rajan, Jeffrey J. Joyce, Carl-Johan H. Seger: From Abstract Data Types to Shift Registers: A Case Study in Formal Specification and Verification at Differing Levels of Abstraction using Theorem Proving and Symbolic Simulation. HUG 1993: 489-500
1991
9EECarl-Johan H. Seger, Jeffrey J. Joyce: A Two-Level Formal Verification Methodology using HOL and COSMOS. CAV 1991: 299-309
8EERandal E. Bryant, Derek L. Beatty, Carl-Johan H. Seger: Formal Hardware Verification by Symbolic Ternary Trajectory Evaluation. DAC 1991: 397-402
7 Carl-Johan H. Seger: On the Existence of Speed-Independent Circuits. Theor. Comput. Sci. 86(2): 343-364 (1991)
1990
6EERandal E. Bryant, Carl-Johan H. Seger: Formal Verification of Digital Circuits Using Symbolic Ternary System Models. CAV 1990: 33-43
1989
5EEJanusz A. Brzozowski, Carl-Johan H. Seger: A unified framework for race analysis of asynchronous networks. J. ACM 36(1): 20-45 (1989)
1988
4 Carl-Johan H. Seger, Janusz A. Brzozowski: An Optimistic Ternary Simulation of Gate Races. Theor. Comput. Sci. 61: 49-66 (1988)
1987
3 Janusz A. Brzozowski, Carl-Johan H. Seger: A Characterization of Ternary Simulation of Gate Networks. IEEE Trans. Computers 36(11): 1318-1327 (1987)
1986
2EEJanusz A. Brzozowski, Carl-Johan H. Seger: Correspondence between Ternary Simulation and Binary Race Analysis in Gate Networks (Extended Summary). ICALP 1986: 69-78
1 David J. Taylor, Carl-Johan H. Seger: Robust Storage Structures for Crash Recovery. IEEE Trans. Computers 35(4): 288-295 (1986)

Coauthor Index

1Mark Aagaard [23] [28] [30] [31] [33] [34] [36] [42]
2Sara Adams [43]
3Clark W. Barrett (Clark Barrett) [42]
4Derek L. Beatty [8]
5Magnus Björk [43]
6Randal E. Bryant [6] [8] [15] [22]
7Janusz A. Brzozowski [2] [3] [4] [5] [14]
8David L. Dill [24]
9Mark R. Greenstreet [16] [21]
10Ziyad Hanna [38]
11Scott Hazelhurst [18] [20] [25] [29]
12Robert B. Jones [24] [28] [30] [31] [33] [34] [36] [42]
13Jeffrey J. Joyce [9] [10] [11] [12] [13] [19]
14Daher Kaiss [38]
15Roope Kaivola [34]
16Katherine R. Kohatsu [34]
17Trevor Wing Sang Lee [16] [21]
18Thomas F. Melham [33] [36] [42] [43]
19John Moondanos [38]
20John W. O'Leary [33] [36] [42]
21Sreeranga P. Rajan [10]
22Don Syme [42]
23David J. Taylor [1]
24Jin Yang [37] [39] [40] [41]
25Zheng Zhu [11] [17]

Colors in the list of coauthors

Copyright © Tue Nov 3 08:52:44 2009 by Michael Ley (ley@uni-trier.de)