Christoph Scholl

2007
19	EE	Stefan Disch, Christoph Scholl: Combinational Equivalence Checking Using Incremental SAT Solving, Output Ordering, and Resets. ASP-DAC 2007: 938-943
18	EE	Werner Damm, Stefan Disch, Hardi Hungar, Swen Jacobs, Jun Pang, Florian Pigorsch, Christoph Scholl, Uwe Waldmann, Boris Wirtz: Exact State Set Representations in the Verification of Linear Hybrid Systems with Large Discrete State Space. ATVA 2007: 425-440
17	EE	Tobias Nopper, Christoph Scholl, Bernd Becker: Computation of minimal counterexamples by using black box techniques and symbolic methods. ICCAD 2007: 273-280
2006
16	EE	Werner Damm, Stefan Disch, Hardi Hungar, Jun Pang, Florian Pigorsch, Christoph Scholl, Uwe Waldmann, Boris Wirtz: Automatic Verification of Hybrid Systems with Large Discrete State Space. ATVA 2006: 276-291
15	EE	Florian Pigorsch, Christoph Scholl, Stefan Disch: Advanced Unbounded Model Checking Based on AIGs, BDD Sweeping, And Quantifier Scheduling. FMCAD 2006: 89-96
14	EE	Marc Herbstritt, Bernd Becker, Christoph Scholl: Advanced SAT-Techniques for Bounded Model Checking of Blackbox Designs. MTV 2006: 37-44
2004
13	EE	Tobias Nopper, Christoph Scholl: Approximate Symbolic Model Checking for Incomplete Designs. FMCAD 2004: 290-305
2002
12	EE	Christoph Scholl, Bernd Becker: Checking Equivalence for Circuits Containing Incompletely Specified Boxes. ICCD 2002: 56-63
11		Christoph Scholl, Bernd Becker, Thomas M. Weis: On WLCDs and the Complexity of Word-Level Decision Diagrams-A Lower Bound for Division. Formal Methods in System Design 20(3): 311-326 (2002)
2001
10	EE	Christoph Scholl, Bernd Becker, Andreas Brogle: The multiple variable order problem for binary decision diagrams: theory and practical application. ASP-DAC 2001: 85-90
9	EE	Christoph Scholl, Bernd Becker: Checking Equivalence for Partial Implementations. DAC 2001: 238-243
8	EE	Christoph Scholl, Marc Herbstritt, Bernd Becker: Exploiting don't cares to minimize *BMDs. ISCAS (5) 2001: 191-194
2000
7	EE	Andreas Hett, Christoph Scholl, Bernd Becker: Distance driven finite state machine traversal. DAC 2000: 39-42
6	EE	Christoph Scholl, Bernd Becker: On the Generation of Multiplexer Circuits for Pass Transistor Logic. DATE 2000: 372-
1999
5	EE	Christoph Scholl, Dirk Möller, Paul Molitor, Rolf Drechsler: BDD minimization using symmetries. IEEE Trans. on CAD of Integrated Circuits and Systems 18(2): 81-100 (1999)
1998
4	EE	Christoph Scholl: Multi-output Functional Decomposition with Exploitation of Don't Cares. DATE 1998: 743-748
3	EE	Christoph Scholl, Bernd Becker, Thomas M. Weis: Word-level decision diagrams, WLCDs and division. ICCAD 1998: 672-677
1997
2	EE	Christoph Scholl, Rolf Drechsler, Bernd Becker: Functional simulation using binary decision diagrams. ICCAD 1997: 8-12
1995
1	EE	Christoph Scholl, Paul Molitor: Communication based FPGA synthesis for multi-output Boolean functions. ASP-DAC 1995

Coauthor Index

1	Bernd Becker	[2] [3] [6] [7] [8] [9] [10] [11] [12] [14] [17]
2	Andreas Brogle	[10]
3	Werner Damm	[16] [18]
4	Stefan Disch	[15] [16] [18] [19]
5	Rolf Drechsler	[2] [5]
6	Marc Herbstritt	[8] [14]
7	Andreas Hett	[7]
8	Hardi Hungar	[16] [18]
9	Swen Jacobs	[18]
10	Paul Molitor	[1] [5]
11	Dirk Möller	[5]
12	Tobias Nopper	[13] [17]
13	Jun Pang	[16] [18]
14	Florian Pigorsch	[15] [16] [18]
15	Uwe Waldmann	[16] [18]
16	Thomas M. Weis	[3] [11]
17	Boris Wirtz	[16] [18]