Peter Pirsch Vis

*	2009
63	EE	Guillermo Payá Vayá, Javier Martín-Langerwerf, Sören Moch, Peter Pirsch: An Enhanced DMA Controller in SIMD Processors for Video Applications. ARCS 2009: 159-170
	2008
62	EE	Holger Flatt, Steffen Blume, Sebastian Hesselbarth, Torsten Schünemann, Peter Pirsch: A parallel hardware architecture for connected component labeling based on fast label merging. ASAP 2008: 144-149
61	EE	Konstantin Septinus, Christian Grimm, Vladislav Rumyantsev, Peter Pirsch: On the Benefit of Caching Traffic Flow Data in the Link Buffer. SAMOS 2008: 2-11
	2007
60	EE	Guillermo Payá Vayá, Javier Martín-Langerwerf, Piriya Taptimthong, Peter Pirsch: Design Space Exploration of Media Processors: A Generic VLIW Architecture and a Parameterized Scheduler. ARCS 2007: 254-267
59	EE	Guillermo Payá Vayá, Javier Martín-Langerwerf, Peter Pirsch: RAPANUI: A case study in Rapid Prototyping for Multiprocessor System-on-Chip. DSD 2007: 215-221
58	EE	Norman Nolte, Winfried Gehrke, Frank Wiczinowski, Peter Pirsch: Scalable Multi-Standard LSI Texture Encoder for MPEG and VC-1 Video Compression. ICME 2007: 1187-1190
57	EE	Guillermo Payá Vayá, Javier Martín-Langerwerf, Piriya Taptimthong, Peter Pirsch: Design Space Exploration of Media Processors: A Parameterized Scheduler. ICSAMOS 2007: 41-49
56	EE	Holger Flatt, Sebastian Hesselbarth, Sebastian Flügel, Peter Pirsch: A Modular Coprocessor Architecture for Embedded Real-Time Image and Video Signal Processing. SAMOS 2007: 241-250
55	EE	Guillermo Payá Vayá, Thomas Jambor, Konstantin Septinus, Sebastian Hesselbarth, Holger Flatt, Marc Freisfeld, Peter Pirsch: ChipDesign: from theory to real world. WCAE 2007: 58-64
	2005
54		Matthias Winter, Peter Pirsch: Von abstrakten Architekturtemplates zur hardwarenahen Architekturexploration. GI Jahrestagung (1) 2005: 458
53	EE	Guillermo Payá Vayá, Javier Martín-Langerwerf, Peter Pirsch: RAPANUI: Rapid Prototyping for Media Processor Architecture Exploration. SAMOS 2005: 32-40
52	EE	Hans-Joachim Stolberg, Mladen Berekovic, Sören Moch, Lars Friebe, Mark Bernd Kulaczewski, Sebastian Flügel, Heiko Klußmann, Andreas Dehnhardt, Peter Pirsch: HiBRID-SoC: A Multi-Core SoC Architecture for Multimedia Signal Processing. VLSI Signal Processing 41(1): 9-20 (2005)
51	EE	Hans-Joachim Stolberg, Mladen Berekovic, Peter Pirsch: A Platform-Independent Methodology for Performance Estimation of Multimedia Signal Processing Applications. VLSI Signal Processing 41(2): 139-151 (2005)
	2004
50	EE	Carsten Reuter, Javier Martín-Langerwerf, Hans-Joachim Stolberg, Peter Pirsch: Performance Estimation of Streaming Media Applications for Reconfigurable Platforms. SAMOS 2004: 69-77
49	EE	Sören Moch, Mladen Berekovic, Hans-Joachim Stolberg, Lars Friebe, Mark Bernd Kulaczewski, Andreas Dehnhardt, Peter Pirsch: HIBRID-SOC: a multi-core architecture for image and video applications. SIGARCH Computer Architecture News 32(3): 55-61 (2004)
48	EE	Mladen Berekovic, Sören Moch, Peter Pirsch: A scalable, clustered SMT processor for digital signal processing. SIGARCH Computer Architecture News 32(3): 62-69 (2004)
	2003
47	EE	Hans-Joachim Stolberg, Mladen Berekovic, Lars Friebe, Sören Moch, Sebastian Flügel, Xun Mao, Mark Bernd Kulaczewski, Heiko Klußmann, Peter Pirsch: HiBRID-SoC: A Multi-Core System-on-Chip Architecture for Multimedia Signal Processing Applications. DATE 2003: 20008-20013
46		Hans-Joachim Stolberg, Mladen Berekovic, Lars Friebe, Sören Moch, Sebastian Flügel, Mark Bernd Kulaczewski, Peter Pirsch: HiBRID-SoC: a multi-core architecture for image and video applications. ICIP (3) 2003: 101-104
45		Hans-Joachim Stolberg, Mladen Berekovic, Lars Friebe, Sören Moch, Mark Bernd Kulaczewski, Peter Pirsch: HiBRID-SoC: A Multi-Core System-on-Chip Architecture for Multimedia Signal Processing. VLSI-SOC 2003: 155-160
	2002
44	EE	Peter Pirsch, Achim Freimann, C. Klar, Jens Peter Wittenburg: Processor Architectures for Multimedia Applications. Embedded Processor Design Challenges 2002: 188-206
43	EE	Javier Martín-Langerwerf, Carsten Reuter, Holger Kropp, Peter Pirsch: Benefits of Macro-Based Multi-FPGA Partitioning for Video Processing Applications. IEEE International Workshop on Rapid System Prototyping 2002: 60-65
42		Xun Mao, Wei Wang, Huimin Gong, Yan L. He, Jian Lou, Lu Yu, Qingdong Yao, Peter Pirsch: Highly efficient simulation environment for HDTV video decoder in VLSI design. VCIP 2002: 1006-1014
41		Mladen Berekovic, Hans-Joachim Stolberg, Peter Pirsch: Multicore system-on-chip architecture for MPEG-4 streaming video. IEEE Trans. Circuits Syst. Video Techn. 12(8): 688- (2002)
40	EE	Mladen Berekovic, Peter Pirsch, Thorsten Selinger, Kai-Immo Wels, Carolina Miro, Anne Lafage, Christoph Heer, Giovanni Ghigo: Architecture of an Image Rendering Co-Processor for MPEG-4 Visual Compositing. VLSI Signal Processing 31(2): 157-171 (2002)
	2001
39	EE	Hans-Joachim Stolberg, Mladen Berekovic, Peter Pirsch, Holger Runge: Implementing The MPEG-4 Advanced Simple Profile For Streaming Video Applications. ICME 2001
38	EE	Mark Bernd Kulaczewski, Stefan Zimmerman, Erich Barke, Peter Pirsch: CHIPDESIGN - A Novel Project-oriented Microelectronics Course. MSE 2001: 71-72
37	EE	Peter Pirsch, Carsten Reuter, Jens Peter Wittenburg, Mark Bernd Kulaczewski, Hans-Joachim Stolberg: Architecture Concepts for Multimedia Signal Processing. VLSI Signal Processing 29(3): 157-165 (2001)
	2000
36		Dimitrios Soudris, Peter Pirsch, Erich Barke: Integrated Circuit Design, Power and Timing Modeling, Optimization and Simulation, 10th International Workshop, PATMOS 2000, Göttingen, Germany, September 13-15, 2000, Proceedings Springer 2000
35	EE	Mladen Berekovic, Peter Pirsch, Thorsten Selinger, Kai-Immo Wels, Carolina Miro, Anne Lafage, Christoph Heer, Giovanni Ghigo: Architecture of an Image Rendering Co-Processor for MPEG-4 Systems. ASAP 2000: 15-24
34	EE	Klaus Herrmann, Sören Moch, Jörg Hilgenstock, Peter Pirsch: Implementation of a Multiprocessor System with Distributed Embedded DRAM on a Large Area Integrated Circuit. DFT 2000: 105-113
	1999
33	EE	Hans-Joachim Stolberg, Martin Ohmacht, Peter Pirsch: Cellular Multiprocessor Arrays with Adaptive Resource Utilization. ACPC 1999: 480-489
32		Jens Peter Wittenburg, Willm Hinrichs, Martin Ohmacht, Hanno Lieske, Helge Kloos, Peter Pirsch: HiPAR-DSP: Ein 1.3 GOPS Multimedia Signalprozessor. ARCS 1999: 15-21
31		Helge Kloos, Mladen Berekovic, Peter Pirsch: Hardware Realisierung einer JAVA Virtual Machine für High Performance Multimedia-Anwendungen. ARCS 1999: 5-14
30		Holger Kropp, Carsten Reuter, Matthias Wiege, Tien-Toan Do, Peter Pirsch: An FPGA-based Prototyping System for Real-Time Verification of Video Processing Schemes. FPL 1999: 333-338
29	EE	Jörg Hilgenstock, Klaus Herrmann, Peter Pirsch: Memory Organization of a Single-Chip Video Signal Processing System with Embedded DRAM. Great Lakes Symposium on VLSI 1999: 42-45
28	EE	Mladen Berekovic, K. Jacob, Peter Pirsch: Architecture of a hardware module for MPEG-4 shape decoding. ISCAS (1) 1999: 157-160
27	EE	Mladen Berekovic, Helge Kloos, Peter Pirsch: Hardware Realization of a Java Virtual Machine for High Performance Multimedia Applications. VLSI Signal Processing 22(1): 31-43 (1999)
26	EE	Mohammad Ibrahim, Peter Pirsch, Johan McCanny: Guest Editors' Introduction. VLSI Signal Processing 22(1): 5-6 (1999)
25	EE	Mladen Berekovic, Hans-Joachim Stolberg, Mark Bernd Kulaczewski, Peter Pirsch, Henning Möller, Holger Runge, Johannes Kneip, Benno Stabernack: Instruction Set Extensions for MPEG-4 Video. VLSI Signal Processing 23(1): 27-49 (1999)
	1998
24	EE	Mladen Berekovic, Peter Pirsch: An Array Processor Architecture with Parallel Data Cache for Image Rendering and Compositing. Computer Graphics International 1998: 411-
23	EE	Jörg Hilgenstock, Klaus Herrmann, Jan Otterstedt, Dirk Niggemeyer, Peter Pirsch: A Video Signal Processor for MIMD Multiprocessing. DAC 1998: 50-55
22	EE	Jens Peter Wittenburg, Willm Hinrichs, Johannes Kneip, Martin Ohmacht, Mladen Berekovic, Hanno Lieske, Helge Kloos, Peter Pirsch: Realization of a Programmable Parallel DSP for High Performance Image Processing Applications. DAC 1998: 56-61
21	EE	Tien-Toan Do, Holger Kropp, Carsten Reuter, Peter Pirsch: A Flexible Implementation of High-Performance FIR Filters on Xilinx FPGAs. FPL 1998: 441-445
20	EE	Holger Kropp, Carsten Reuter, Peter Pirsch: The Video and Image Processing Emulation System VIPES. International Workshop on Rapid System Prototyping 1998: 170-175
19	EE	Mladen Berekovic, Peter Pirsch, Johannes Kneip: An Algorithm-Hardware-System Approach to VLIW Multimedia Processors. VLSI Signal Processing 20(1-2): 163-180 (1998)
	1997
18	EE	Carsten Reuter, Markus Schwiegershausen, Peter Pirsch: Heterogeneous Multiprocessor Scheduling and Allocation using Evolutionary Algorithms. ASAP 1997: 294-303
17		Tien-Toan Do, Holger Kropp, Markus Schwiegershausen, Peter Pirsch: Implementation of pipelined multipliers on Xilinx FPGAs. FPL 1997: 51-60
16	EE	Johannes Kneip, Mladen Berekovic, Jens Peter Wittenburg, Willm Hinrichs, Peter Pirsch: An Algorithm Adapted Autonomous Controlling Concept for a Parallel Single-Chip Digital Signal Processor. VLSI Signal Processing 16(1): 31-40 (1997)
	1995
15	EE	Markus Schwiegershausen, Peter Pirsch: A formal approach for the optimization of heterogeneous multiprocessors for complex image processing schemes. EURO-DAC 1995: 8-13
14		Peter Pirsch, Johannes Kneip, Karsten Rönner: Parallelization Resources of Image Processing Algorithms and Their Mapping on a Programmable Parallel Videosignal Processor. ISCAS 1995: 562-565
13		Marco Winzker, Peter Pirsch, Jochen Reimers: Architecture and Memory Requirements for Stand-Alone and Hierarchical MPEG2 HDTV-Decoders with Synchronous DRAMs. ISCAS 1995: 609-612
12	EE	Markus Schwiegershausen, Peter Pirsch: A system level design methodology for the optimization of heterogeneous multiprocessors. ISSS 1995: 162-169
11	EE	Johannes Kneip, Martin Ohmacht, Karsten Rönner, Peter Pirsch: Architecture and C++-programming environment of a highly parallel image signal processor. Microprocessing and Microprogramming 41(5-6): 391-408 (1995)
10	EE	Mirjam Schönfeld, Jens Franzen, Markus Schwiegershausen, Peter Pirsch, Uwe Vehlies, Andreas Münzner: The LISA design environment for the synthesis of array processors including memories for the data transfer and fault tolerance by reconfiguration and coding techniques. VLSI Signal Processing 11(1-2): 51-74 (1995)
	1993
9		Klaus Gaedke, Jens Franzen, Peter Pirsch: A Fault-tolerant DCT-Architecture Based on Distributed Arithmetic. ISCAS 1993: 1583-1586
8		Peter Pirsch, Winfried Gehrke, R. Hoffer: A Hierarchical Multiprocessor Achitecture for Video Coding Applications. ISCAS 1993: 1750-1753
7		J. Schönfeld, Peter Pirsch: Single board image processing unit for vehicle guidance. VLSI 1993: 151-160
6	EE	V. Hecht, Karsten Rönner, Peter Pirsch: A defect-tolerant systolic array implementation for real time image processing. VLSI Signal Processing 5(1): 37-47 (1993)
5	EE	Klaus Gaedke, Hartwig Jeschke, Peter Pirsch: A VLSI based MIMD architecture of a multiprocessor system for real-time video processing applications. VLSI Signal Processing 5(2-3): 159-169 (1993)
	1991
4		Mirjam Schönfeld, Markus Schwiegershausen, Peter Pirsch: Synthesis of intermediate memories for the data supply to processor arrays. Algorithms and Parallel VLSI Architectures 1991: 365-370
3		Mirjam Schönfeld, Markus Schwiegershausen, Peter Pirsch: Synthesis of Intermediate Memories needed for the Data Supply to Processor Arrays. VLSI 1991: 297-306
	1984
2		P. Drews, Peter Pirsch, K. Schaper: Circuit Technique for VLSI Design of a Video Codec. ICC (1) 1984: 250-255
	1983
1	EE	Peter Pirsch, Arun N. Netravali: Transmission of gray level images by multilevel dither techniques. Computers & Graphics 7(1): 31-44 (1983)

Coauthor Index

1	Erich Barke	[36] [38]
2	Mladen Berekovic	[16] [19] [22] [24] [25] [27] [28] [31] [35] [39] [40] [41] [45] [46] [47] [48] [49] [51] [52]
3	Steffen Blume	[62]
4	Andreas Dehnhardt	[49] [52]
5	Tien-Toan Do	[17] [21] [30]
6	P. Drews	[2]
7	Holger Flatt	[55] [56] [62]
8	Sebastian Flügel	[46] [47] [52] [56]
9	Jens Franzen	[9] [10]
10	Achim Freimann	[44]
11	Marc Freisfeld	[55]
12	Lars Friebe	[45] [46] [47] [49] [52]
13	Klaus Gaedke	[5] [9]
14	Winfried Gehrke	[8] [58]
15	Giovanni Ghigo	[35] [40]
16	Huimin Gong	[42]
17	Christian Grimm	[61]
18	Yan L. He	[42]
19	V. Hecht	[6]
20	Christoph Heer	[35] [40]
21	Klaus Herrmann	[23] [29] [34]
22	Sebastian Hesselbarth	[55] [56] [62]
23	Jörg Hilgenstock	[23] [29] [34]
24	Willm Hinrichs	[16] [22] [32]
25	R. Hoffer	[8]
26	Mohammad Ibrahim	[26]
27	K. Jacob	[28]
28	Thomas Jambor	[55]
29	Hartwig Jeschke	[5]
30	C. Klar	[44]
31	Helge Kloos	[22] [27] [31] [32]
32	Heiko Klußmann	[47] [52]
33	Johannes Kneip	[11] [14] [16] [19] [22] [25]
34	Holger Kropp	[17] [20] [21] [30] [43]
35	Mark Bernd Kulaczewski	[25] [37] [38] [45] [46] [47] [49] [52]
36	Anne Lafage	[35] [40]
37	Hanno Lieske	[22] [32]
38	Jian Lou	[42]
39	Xun Mao	[42] [47]
40	Javier Martín-Langerwerf	[43] [50] [53] [57] [59] [60] [63]
41	Johan McCanny	[26]
42	Carolina Miro	[35] [40]
43	Sören Moch	[34] [45] [46] [47] [48] [49] [52] [63]
44	Henning Möller	[25]
45	Andreas Münzner	[10]
46	Arun N. Netravali	[1]
47	Dirk Niggemeyer	[23]
48	Norman Nolte	[58]
49	Martin Ohmacht	[11] [22] [32] [33]
50	Jan Otterstedt	[23]
51	Jochen Reimers	[13]
52	Carsten Reuter	[18] [20] [21] [30] [37] [43] [50]
53	Karsten Rönner	[6] [11] [14]
54	Vladislav Rumyantsev	[61]
55	Holger Runge	[25] [39]
56	K. Schaper	[2]
57	J. Schönfeld	[7]
58	Mirjam Schönfeld	[3] [4] [10]
59	Torsten Schünemann	[62]
60	Markus Schwiegershausen	[3] [4] [10] [12] [15] [17] [18]
61	Thorsten Selinger	[35] [40]
62	Konstantin Septinus	[55] [61]
63	Dimitrios Soudris (D. J. Soudris)	[36]
64	Benno Stabernack	[25]
65	Hans-Joachim Stolberg	[25] [33] [37] [39] [41] [45] [46] [47] [49] [50] [51] [52]
66	Piriya Taptimthong	[57] [60]
67	Guillermo Payá Vayá	[53] [55] [57] [59] [60] [63]
68	Uwe Vehlies	[10]
69	Wei Wang	[42]
70	Kai-Immo Wels	[35] [40]
71	Frank Wiczinowski	[58]
72	Matthias Wiege	[30]
73	Matthias Winter	[54]
74	Marco Winzker	[13]
75	Jens Peter Wittenburg	[16] [22] [32] [37] [44]
76	Qingdong Yao	[42]
77	Lu Yu	[42]
78	Stefan Zimmerman	[38]

Colors in the list of coauthors