dblp.uni-trier.dewww.uni-trier.de

Bernard L. Peuto Vis

List of publications from the DBLP Bibliography Server - FAQ
Coauthor Index - Ask others: ACM DL/Guide - CiteSeerX - CSB - MetaPress - Google - Bing - Yahoo

*1998
4EELeonard J. Shustek, Bernard L. Peuto: Retrospective: An Instruction Timing Model of CPU Performance. 25 Years ISCA: Retrospectives and Reprints 1998: 11-12
3EEBernard L. Peuto, Leonard J. Shustek: An Instruction Timing Model of CPU Performance. 25 Years ISCA: Retrospectives and Reprints 1998: 152-165
1979
2 Bernard L. Peuto: Architecture of a New Microprocessor. IEEE Computer 12(2): 10-21 (1979)
1977
1 Bernard L. Peuto, Leonard J. Shustek: An Instruction Timing Model of CPU Performance. ISCA 1977: 165-178

Coauthor Index

1Leonard J. Shustek [1] [3] [4]

Copyright © Tue Nov 3 08:52:44 2009 by Michael Ley (ley@uni-trier.de)