| * | 2008 |
|---|
| 82 | EE | Martin Lukac,
Marek A. Perkowski:
Evolutionary approach to quantum symbolic logic synthesis.
IEEE Congress on Evolutionary Computation 2008: 3374-3380 |
| 81 | EE | Mozammel H. A. Khan,
Nafisa K. Siddika,
Marek A. Perkowski:
Minimization of Quaternary Galois Field Sum of Products Expression for Multi-Output Quaternary Logic Function Using Quaternary Galois Field Decision Diagram.
ISMVL 2008: 125-130 |
| 80 | EE | David J. Rosenbaum,
Marek A. Perkowski:
Superposed Quantum State Initialization Using Disjoint Prime Implicants (SQUID).
ISMVL 2008: 144-149 |
| 79 | EE | Martin Lukac,
Marek A. Perkowski:
Projective Measurement-Based Logic Synthesis of Quantum Circuits.
ISMVL 2008: 191-196 |
| 78 | EE | Guowu Yang,
Xiaoyu Song,
William N. N. Hung,
Marek A. Perkowski:
Bi-Directional Synthesis of 4-Bit Reversible Circuits.
Comput. J. 51(2): 207-215 (2008) |
| 77 | EE | Faisal Shah Khan,
Marek A. Perkowski:
Erratum to: "Synthesis of multi-qudit hybrid and d-valued quantum logic circuits by decomposition" [TCS 367 (3) (2006) 336-346].
Theor. Comput. Sci. 403(1): 130-131 (2008) |
| 2007 |
|---|
| 76 | EE | Mozammel H. A. Khan,
Marek A. Perkowski:
GF(4) Based Synthesis of Quaternary Reversible/Quantum Logic Circuits.
ISMVL 2007: 11 |
| 75 | EE | Arushi Raghuvanshi,
Yale Fan,
Michal Woyke,
Marek A. Perkowski:
Quantum Robots for Teenagers.
ISMVL 2007: 18 |
| 74 | EE | Martin Lukac,
Marek A. Perkowski:
Quantum Mechanical Model of Emotional Robot Behaviors.
ISMVL 2007: 19 |
| 73 | EE | Guowu Yang,
William N. N. Hung,
Xiaoyu Song,
Marek A. Perkowski:
Exact Synthesis of 3-Qubit Quantum Circuits from Non-Binary Quantum Gates Using Multiple-Valued Logic and Group Theory
CoRR abs/0710.4694: (2007) |
| 72 | EE | Mozammel H. A. Khan,
Marek A. Perkowski:
Quantum ternary parallel adder/subtractor with partially-look-ahead carry.
Journal of Systems Architecture 53(7): 453-464 (2007) |
| 2006 |
|---|
| 71 | EE | Guowu Yang,
Fei Xie,
Xiaoyu Song,
Marek A. Perkowski:
Universality of Hybrid Quantum Gates and Synthesis Without Ancilla Qudits.
CIAA 2006: 279-280 |
| 70 | EE | Lun Li,
Mitchell A. Thornton,
Marek A. Perkowski:
A Quantum CAD Accelerator Based on Grover's Algorithm for Finding the Minimum Fixed Polarity Reed-Muller Form.
ISMVL 2006: 33 |
| 69 | EE | Guowu Yang,
Xiaoyu Song,
William N. N. Hung,
Fei Xie,
Marek A. Perkowski:
Group Theory Based Synthesis of Binary Reversible Circuits.
TAMC 2006: 365-374 |
| 68 | EE | William N. N. Hung,
Xiaoyu Song,
Guowu Yang,
Jin Yang,
Marek A. Perkowski:
Optimal synthesis of multiple output Boolean functions using a set of quantum gates by symbolic reachability analysis.
IEEE Trans. on CAD of Integrated Circuits and Systems 25(9): 1652-1663 (2006) |
| 67 | EE | Faisal Shah Khan,
Marek A. Perkowski:
Synthesis of multi-qudit hybrid and d-valued quantum logic circuits by decomposition.
Theor. Comput. Sci. 367(3): 336-346 (2006) |
| 66 | EE | Xiaoyu Song,
Guowu Yang,
Marek A. Perkowski,
Yuke Wang:
Algebraic Characterization of Reversible Logic Gates.
Theory Comput. Syst. 39(2): 311-319 (2006) |
| 2005 |
|---|
| 65 | EE | Guowu Yang,
Xiaoyu Song,
William N. N. Hung,
Marek A. Perkowski:
Fast synthesis of exact minimal reversible circuits using group theory.
ASP-DAC 2005: 1002-1005 |
| 64 | EE | Guowu Yang,
William N. N. Hung,
Xiaoyu Song,
Marek A. Perkowski:
Exact Synthesis of 3-Qubit Quantum Circuits from Non-Binary Quantum Gates Using Multiple-Valued Logic and Group Theory.
DATE 2005: 434-435 |
| 63 | EE | Marek A. Perkowski,
Tsutomu Sasao,
Jong-Hwan Kim,
Martin Lukac,
Jeff Allen,
Stefan Gebauer:
Hahoe KAIST Robot Theatre: Learning Rules of Interactive Robot Behavior as a Multiple-Valued Logic Synthesis Problem.
ISMVL 2005: 236-248 |
| 62 | EE | Marek A. Perkowski,
Jacob Biamonte,
Martin Lukac:
Test Generation and Fault Localization for Quantum Circuits.
ISMVL 2005: 62-68 |
| 61 | EE | Guowu Yang,
Xiaoyu Song,
William N. N. Hung,
Marek A. Perkowski:
Bi-Direction Synthesis for Reversible Circuits.
ISVLSI 2005: 14-19 |
| 60 | EE | Guowu Yang,
William N. N. Hung,
Xiaoyu Song,
Marek A. Perkowski:
Majority-based reversible logic gates.
Theor. Comput. Sci. 334(1-3): 259-274 (2005) |
| 2004 |
|---|
| 59 | EE | William N. N. Hung,
Xiaoyu Song,
Guowu Yang,
Jin Yang,
Marek A. Perkowski:
Quantum logic synthesis by symbolic reachability analysis.
DAC 2004: 838-841 |
| 58 | EE | Mozammel H. A. Khan,
Marek A. Perkowski,
Mujibur R. Khan:
Ternary Galois Field Expansions for Reversible Logic and Kronecker Decision Diagrams for Ternary GFSOP Minimization.
ISMVL 2004: 58-67 |
| 57 | EE | Pawel Kerntopf,
Marek A. Perkowski,
Mozammel H. A. Khan:
On Universality of General Reversible Multiple-Valued Logic Gates.
ISMVL 2004: 68-73 |
| 2003 |
|---|
| 56 | EE | Andrzej Buller,
Marek A. Perkowski:
Evolved Reversible Cascades Realized on the CAM-Brain Machine.
Evolvable Hardware 2003: 256-264 |
| 55 | EE | Mozammel H. A. Khan,
Marek A. Perkowski,
Pawel Kerntopf:
Multi-Output Galois Field Sum of Products Synthesis with New Quantum Cascades.
ISMVL 2003: 146-153 |
| 54 | EE | Martin Lukac,
Marek A. Perkowski,
Hilton Goi,
Mikhail Pivtoraiko,
Chung Hyo Yu,
Kyusik Chung,
Hyunkoo Jeech,
Byung-Guk Kim,
Yong Duk Kim:
Evolutionary Approach to Quantum and Reversible Circuits Synthesis.
Artif. Intell. Rev. 20(3-4): 361-417 (2003) |
| 2002 |
|---|
| 53 | EE | Martin Lukac,
Marek A. Perkowski:
Evolving Quantum Circuits Using Genetic Algorithm.
Evolvable Hardware 2002: 177-185 |
| 52 | | Alan Mishchenko,
Marek A. Perkowski:
Logic Synthesis of Reversible Wave Cascades.
IWLS 2002: 197-202 |
| 51 | | Andrei B. Khlopotine,
Marek A. Perkowski,
Pawel Kerntopf:
Reversible Logic Synthesis by Iterative Compositions.
IWLS 2002: 261-266 |
| 50 | EE | Marek A. Perkowski,
David Foote,
Qihong Chen,
Anas Al-Rabadi,
Lech Józwiak:
Learning Hardware Using Multiple-Valued Logic, Part 1: Introduction and Approach.
IEEE Micro 22(3): 41-51 (2002) |
| 49 | EE | Marek A. Perkowski,
David Foote,
Qihong Chen,
Anas Al-Rabadi,
Lech Józwiak:
Learning Hardware Using Multiple-Valued Logic, Part 2: Cube Calculus and Architecture.
IEEE Micro 22(3): 52-61 (2002) |
| 2001 |
|---|
| 48 | EE | Alan Mishchenko,
Bernd Steinbach,
Marek A. Perkowski:
An Algorithm for Bi-Decomposition of Logic Functions.
DAC 2001: 103-108 |
| 47 | EE | Marek A. Perkowski,
Pawel Kerntopf:
Fundamentals of Reversible Logic and Computing.
DSD 2001: 244- |
| 46 | EE | Marek A. Perkowski,
Malgorzata Chrzanowska-Jeske,
Alan Mishchenko,
Xiaoyu Song,
Anas Al-Rabadi,
Bart Massey,
Pawel Kerntopf,
Andrzej Buller,
Lech Józwiak,
Alan J. Coppola:
Regular Realization of Symmetric Functions Using Reversible Logic.
DSD 2001: 245-253 |
| 45 | | Anas Al-Rabadi,
Marek A. Perkowski:
Multiple-Valued Galois Field S/D Trees for GFSOP Minimization and Their Complexity.
ISMVL 2001: 159-166 |
| 44 | EE | Marek A. Perkowski,
Lech Józwiak,
W. Zhao:
Symbolic two-dimensional minimization of strongly unspecified finite state machines.
Journal of Systems Architecture 47(1): 15-28 (2001) |
| 43 | EE | Stan Grygiel,
Marek A. Perkowski:
Labeled rough partitions - a new general purpose representation for multiple-valued functions and relations.
Journal of Systems Architecture 47(1): 29-59 (2001) |
| 42 | EE | Chong H. Lee,
Douglas V. Hall,
Marek A. Perkowski,
David S. Jun:
Self-repairable GALs.
Journal of Systems Architecture 47(2): 119-135 (2001) |
| 41 | EE | Karen M. Dill,
Marek A. Perkowski:
Baldwinian learning utilizing genetic and heuristic algorithms for logic synthesis and minimization of incompletely specified data with Generalized Reed-Muller (AND-EXOR) forms.
Journal of Systems Architecture 47(6): 477-489 (2001) |
| 2000 |
|---|
| 40 | EE | Chong H. Lee,
Marek A. Perkowski,
Douglas V. Hall,
David S. Jun:
Self-Repairable EPLDs: Design, Self-Repair, and Evaluation Methodology.
Evolvable Hardware 2000: 183-194 |
| 39 | EE | Ugur Kalay,
Douglas V. Hall,
Marek A. Perkowski:
A Minimal Universal Test Set for Self-Test of EXOR-Sum-of-Products Circuits.
IEEE Trans. Computers 49(3): 267-276 (2000) |
| 38 | EE | Craig M. Files,
Marek A. Perkowski:
New multivalued functional decomposition algorithms based on MDDs.
IEEE Trans. on CAD of Integrated Circuits and Systems 19(9): 1081-1086 (2000) |
| 1999 |
|---|
| 37 | EE | Marek A. Perkowski,
Rahul Malvi,
Stan Grygiel,
Michael Burns,
Alan Mishchenko:
Graph Coloring Algorithms for Fast Evaluation of Curtis Decompositions.
DAC 1999: 225-230 |
| 36 | EE | Torrey Lewis,
Marek A. Perkowski,
Lech Józwiak:
Learning in Hardware: Architecture and Implementation of an FPGA-Based Rough Set Machine.
EUROMICRO 1999: 1326-1334 |
| 35 | EE | Marek A. Perkowski,
Alan Mishchenko,
Anatoli N. Chebotarev:
Evolvable Hardware or Learning Hardware? Induction of State Machines from Temporal Logic Constraints.
Evolvable Hardware 1999: 129-138 |
| 34 | EE | Ugur Kalay,
Marek A. Perkowski,
Douglas V. Hall:
Highly Testable Boolean Ring Logic Circuits.
ISMVL 1999: 268-274 |
| 33 | EE | Bernd Steinbach,
Marek A. Perkowski,
Christian Lang:
Bi-Decompositions of Multi-Valued Functions for Circuit Design and Data Mining Applications.
ISMVL 1999: 50-58 |
| 1998 |
|---|
| 32 | EE | Michael Burns,
Marek A. Perkowski,
Lech Józwiak:
An Efficient Approach to Decomposition of Multi-Output Boolean Functions with Large Sets of Bound Variables.
EUROMICRO 1998: 10016-10023 |
| 31 | EE | Loc Bao Nguen,
Marek A. Perkowski,
Lech Józwiak:
Design of Self-Synchronized Component FSMs for Self-Timed Systems.
EUROMICRO 1998: 10253-10260 |
| 30 | EE | Ning Song,
Marek A. Perkowski:
A New Approach to And/Or/Exor Factorization for Regular Array.
EUROMICRO 1998: 10269- |
| 29 | EE | Craig M. Files,
Marek A. Perkowski:
An Error Reducing Approach to Machine Learning using Multi-Valued Functional Decomposition.
ISMVL 1998: 167-172 |
| 28 | EE | Craig M. Files,
Marek A. Perkowski:
Multi-Valued Functional Decomposition as a Machine Learning Method.
ISMVL 1998: 173- |
| 27 | EE | Ning Song,
Marek A. Perkowski:
Minimization of Exclusive Sums of Multi-Valued Complex Terms for Logic Cell Arrays.
ISMVL 1998: 32-37 |
| 1997 |
|---|
| 26 | EE | Sanof Mohamed,
Marek A. Perkowski,
Lech Józwiak:
Fast Minimization Of Multi-Output Boolean Functions In Sum-Of-Condition-Decoders Structures.
EUROMICRO 1997: 31- |
| 25 | EE | Marek A. Perkowski,
Malgorzata Marek-Sadowska,
Lech Józwiak,
Tadeusz Luba,
Stan Grygiel,
Miroslawa Nowicka,
Rahul Malvi,
Zhi Wang,
Jin S. Zhang:
Decomposition of Multiple-Valued Relations .
ISMVL 1997: 13-18 |
| 24 | EE | Craig M. Files,
Rolf Drechsler,
Marek A. Perkowski:
Functional Decomposition of MVL Functions Using Multi-Valued Decision Diagrams.
ISMVL 1997: 27- |
| 23 | EE | Stan Grygiel,
Marek A. Perkowski,
Malgorzata Marek-Sadowska,
Tadeusz Luba,
Lech Józwiak:
Cube Diagram Bundles: A New Representation of Strongly Unspecified Multiple-Valued Functions and Relations.
ISMVL 1997: 287-292 |
| 1996 |
|---|
| 22 | | Haomin Wu,
Marek A. Perkowski,
Xiaoqiang Zheng,
Nan Zhuang:
Generalized Partially-Mixed-Polarity Reed-Muller Expansionand Its Fast Computation.
IEEE Trans. Computers 45(9): 1084-1088 (1996) |
| 21 | EE | Ning Song,
Marek A. Perkowski:
Minimization of exclusive sum-of-products expressions for multiple-valued input, incompletely specified functions.
IEEE Trans. on CAD of Integrated Circuits and Systems 15(4): 385-395 (1996) |
| 1995 |
|---|
| 20 | | Edmund Pierzchala,
Rolf Schaumann,
Paul Van Halen,
Stanislaw Szczepanski,
Marek A. Perkowski:
Highly Linear VHF Current-Mode Miller Integrator with 900 dB DC Gain.
ISCAS 1995: 1852-1855 |
| 1994 |
|---|
| 19 | EE | Andisheh Sarabi,
Ning Song,
Malgorzata Chrzanowska-Jeske,
Marek A. Perkowski:
A Comprehensive Approach to Logic Synthesis and Physical Design for Two-Dimensional Logic Arrays.
DAC 1994: 321-326 |
| 18 | EE | Rolf Drechsler,
Andisheh Sarabi,
Michael Theobald,
Bernd Becker,
Marek A. Perkowski:
Efficient Representation and Manipulation of Switching Functions Based on Ordered Kronecker Functional Decision Diagrams.
DAC 1994: 415-419 |
| 17 | EE | Marek A. Perkowski,
Philip Ho:
Free Kronecker decision diagrams and their application to Atmel 6000 series FPGA mapping.
EURO-DAC 1994: 8-13 |
| 16 | | Edmund Pierzchala,
Marek A. Perkowski,
Stan Grygiel:
A Filed Programmable Analog Array for Continuous, Fuzzy, and Multi-Valued Logic Applications.
ISMVL 1994: 148-155 |
| 15 | | Marek A. Perkowski,
Malgorzata Chrzanowska-Jeske:
Multiple-Valued-Input TANT Networks.
ISMVL 1994: 334-341 |
| 1993 |
|---|
| 14 | | Ning Song,
Marek A. Perkowski:
EXORCISM-MV-2: Minimization of Exclusive Sum of Products Expressions for Multiple-Valued Input Incompletely Specified Functions.
ISMVL 1993: 132-137 |
| 13 | | Qinhua Hong,
Benchu Fei,
Haomin Wu,
Marek A. Perkowski,
Nan Zhuang:
Fast Synthesis for Ternary Reed-Muller Expansion.
ISMVL 1993: 14-16 |
| 12 | | Haomin Wu,
Nan Zhuang,
Marek A. Perkowski:
Novel CMOS Scan Design for VLSI Testability.
ISMVL 1993: 82-86 |
| 11 | EE | Ingo Schäfer,
Marek A. Perkowski:
Synthesis of multilevel multiplexer circuits for incompletely specified multioutput Boolean functions with mapping to multiplexer based FPGA's.
IEEE Trans. on CAD of Integrated Circuits and Systems 12(11): 1655-1664 (1993) |
| 1992 |
|---|
| 10 | EE | Andisheh Sarabi,
Marek A. Perkowski:
Fast Exact and Quasi-Minimal Minimization of Highly Testable Fixed-Polarity AND/XOR Canonical Networks.
DAC 1992: 30-35 |
| 9 | | Li-Fei Wu,
Marek A. Perkowski:
Minimization of Permuted Reed-Muller Trees for Cellular Logic.
FPL 1992: 78-87 |
| 8 | | Marek A. Perkowski,
Laszlo Csanky,
Andisheh Sarabi,
Ingo Schäfer:
Fast Minimization of Mixed-Polarity AND/XOR Canonical Networks.
ICCD 1992: 33-36 |
| 7 | | Marek A. Perkowski:
A Universal Logic Machine.
ISMVL 1992: 262-271 |
| 6 | | Marek A. Perkowski:
The Generalized Orthonormal Expansion of Functions with Multiple-Valued Inputs and Some of Its Applications.
ISMVL 1992: 442-450 |
| 5 | | Alan J. Coppola,
Marek A. Perkowski,
Robert Anderson,
Jeffrey S. Freedman,
Edmund Pierzchala:
Tokenized State Machine Model for Synthesis of Sequential Circuits into EPLDs and FPGAs.
Synthesis for Control Dominated Circuits 1992: 33-46 |
| 4 | EE | Bogdan J. Falkowski,
Ingo Schäfer,
Marek A. Perkowski:
Effective computer methods for the calculation of Rademacher-Walsh spectrum for completely and incompletely specified Boolean functions.
IEEE Trans. on CAD of Integrated Circuits and Systems 11(10): 1207-1226 (1992) |
| 1991 |
|---|
| 3 | | Ingo Schäfer,
Marek A. Perkowski:
Multiple-Valued Generalized Reed-Muller Forms.
ISMVL 1991: 40-48 |
| 1990 |
|---|
| 2 | | Bogdan J. Falkowski,
Marek A. Perkowski:
Walsh Type Transforms for Completely and Incompletely Specified Multiple-Valued Input Binary Functions.
ISMVL 1990: 75-82 |
| 1988 |
|---|
| 1 | EE | Martin Helliwell,
Marek A. Perkowski:
A Fast Algorithm to Minimize Multi-Output Mixed-Polarity Generalized Reed-Muller Forms.
DAC 1988: 427-432 |
