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Antonis M. Paschalis Vis

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*2009
66EEGeorge Xenoulis, Dimitris Gizopoulos, Mihalis Psarakis, Antonis M. Paschalis: Instruction-Based Online Periodic Self-Testing of Microprocessors with Floating-Point Units. IEEE Trans. Dependable Sec. Comput. 6(2): 124-134 (2009)
2008
65EEAndreas Apostolakis, Dimitris Gizopoulos, Mihalis Psarakis, Antonis M. Paschalis: Functional Self-Testing for Bus-Based Symmetric Multiprocessors. DATE 2008: 1304-1309
64EENektarios Kranitis, Andreas Merentitis, George Theodorou, Antonis M. Paschalis, Dimitris Gizopoulos: Hybrid-SBST Methodology for Efficient Testing of Processor Cores. IEEE Design & Test of Computers 25(1): 64-75 (2008)
63EEIoannis Voyiatzis, Antonis M. Paschalis, Dimitris Gizopoulos, Constantin Halatsis, Frosso S. Makri, Miltiadis Hatzimihail: An Input Vector Monitoring Concurrent BIST Architecture Based on a Precomputed Test Set. IEEE Trans. Computers 57(8): 1012-1022 (2008)
62EEDimitris Gizopoulos, Mihalis Psarakis, Miltiadis Hatzimihail, M. Maniatakos, Antonis M. Paschalis, Anand Raghunathan, Srivaths Ravi: Systematic Software-Based Self-Test for Pipelined Processors. IEEE Trans. VLSI Syst. 16(11): 1441-1453 (2008)
2007
61EEGeorge Xenoulis, Mihalis Psarakis, Dimitris Gizopoulos, Antonis M. Paschalis: On-Line Periodic Self-Testing of High-Speed Floating-Point Units in Microprocessors. DFT 2007: 379-387
60EEAndreas Merentitis, Nektarios Kranitis, Antonis M. Paschalis, Dimitris Gizopoulos: Selecting Power-Optimal SBST Routines for On-Line Processor Testing. European Test Symposium 2007: 111-116
59EEAndreas Apostolakis, Mihalis Psarakis, Dimitris Gizopoulos, Antonis M. Paschalis: A Functional Self-Test Approach for Peripheral Cores in Processor-Based SoCs. IOLTS 2007: 271-276
58EEAndreas Apostolakis, Mihalis Psarakis, Dimitris Gizopoulos, Antonis M. Paschalis: Functional Processor-Based Testing of Communication Peripherals in Systems-on-Chip. IEEE Trans. VLSI Syst. 15(8): 971-975 (2007)
2006
57EEMihalis Psarakis, Dimitris Gizopoulos, Miltiadis Hatzimihail, Antonis M. Paschalis, Anand Raghunathan, Srivaths Ravi: Systematic software-based self-test for pipelined processors. DAC 2006: 393-398
56EENektarios Kranitis, Andreas Merentitis, N. Laoutaris, George Theodorou, Antonis M. Paschalis, Dimitris Gizopoulos, Constantin Halatsis: Optimal periodic testing of intermittent faults in embedded pipelined processor applications. DATE 2006: 65-70
55EEP. Kenterlis, Nektarios Kranitis, Antonis M. Paschalis, Dimitris Gizopoulos, Mihalis Psarakis: A Low-Cost SEU Fault Emulation Platform for SRAM-Based FPGAs. IOLTS 2006: 235-241
54EEGeorge Xenoulis, Mihalis Psarakis, Dimitris Gizopoulos, Antonis M. Paschalis: Testability Analysis and Scalable Test Generation for High-Speed Floating-Point Units. IEEE Trans. Computers 55(11): 1449-1457 (2006)
2005
53EEMiltiadis Hatzimihail, Mihalis Psarakis, George Xenoulis, Dimitris Gizopoulos, Antonis M. Paschalis: Software-Based Self-Test for Pipelined Processors: A Case Study. DFT 2005: 535-543
52EEIoannis Voyiatzis, Dimitris Gizopoulos, Antonis M. Paschalis: Accumulator-Based Weighted Pattern Generation. IOLTS 2005: 215-220
51EEGeorge Xenoulis, Mihalis Psarakis, Dimitris Gizopoulos, Antonis M. Paschalis: Test Generation Methodology for High-Speed Floating Point Adders. IOLTS 2005: 227-232
50EENektarios Kranitis, Antonis M. Paschalis, Dimitris Gizopoulos, George Xenoulis: Software-Based Self-Testing of Embedded Processors. IEEE Trans. Computers 54(4): 461-475 (2005)
49EEIoannis Voyiatzis, Dimitris Gizopoulos, Antonis M. Paschalis: Accumulator-based test generation for robust sequential fault testing in DSP cores in near-optimal time. IEEE Trans. VLSI Syst. 13(9): 1079-1086 (2005)
48EEAntonis M. Paschalis, Dimitris Gizopoulos: Effective software-based self-test strategies for on-line periodic testing of embedded processors. IEEE Trans. on CAD of Integrated Circuits and Systems 24(1): 88-99 (2005)
47EEMihalis Psarakis, Dimitris Gizopoulos, Antonis M. Paschalis: Built-in sequential fault self-testing of array multipliers. IEEE Trans. on CAD of Integrated Circuits and Systems 24(3): 449-460 (2005)
46EEIoannis Voyiatzis, Antonis M. Paschalis, Dimitris Gizopoulos, Nektarios Kranitis, Constantin Halatsis: A concurrent built-in self-test architecture based on a self-testing RAM. IEEE Transactions on Reliability 54(1): 69-78 (2005)
2004
45EEAntonis M. Paschalis, Dimitris Gizopoulos: Effective Software-Based Self-Test Strategies for On-Line Periodic Testing of Embedded Processors. DATE 2004: 578-583
2003
44EENektarios Kranitis, George Xenoulis, Dimitris Gizopoulos, Antonis M. Paschalis, Yervant Zorian: Low-Cost Software-Based Self-Testing of RISC Processor Cores. DATE 2003: 10714-10719
43EEGeorge Xenoulis, Dimitris Gizopoulos, Nektarios Kranitis, Antonis M. Paschalis: Low-Cost, On-Line Software-Based Self-Testing of Embedded Processor Cores. IOLTS 2003: 149-
42EENektarios Kranitis, George Xenoulis, Antonis M. Paschalis, Dimitris Gizopoulos, Yervant Zorian: Application and Analysis of RT-Level Software-Based Self-Testing for Embedded Processor Cores. ITC 2003: 431-440
41EENektarios Kranitis, Antonis M. Paschalis, Dimitris Gizopoulos, Yervant Zorian: Instruction-Based Self-Testing of Processor Cores. J. Electronic Testing 19(2): 103-112 (2003)
40EEDimitris Gizopoulos, Mihalis Psarakis, Antonis M. Paschalis, Yervant Zorian: Easily Testable Cellular Carry Lookahead Adders. J. Electronic Testing 19(3): 285-298 (2003)
2002
39EENektarios Kranitis, Antonis M. Paschalis, Dimitris Gizopoulos, Yervant Zorian: Effective Software Self-Test Methodology for Processor Cores. DATE 2002: 592-597
38EENektarios Kranitis, Antonis M. Paschalis, Dimitris Gizopoulos, Yervant Zorian: Instruction-Based Self-Testing of Processor Cores. VTS 2002: 223-228
2001
37EEAntonis M. Paschalis, Dimitris Gizopoulos, Nektarios Kranitis, Mihalis Psarakis, Yervant Zorian: Deterministic software-based self-testing of embedded processor cores. DATE 2001: 92-96
36EENektarios Kranitis, Mihalis Psarakis, Dimitris Gizopoulos, Antonis M. Paschalis, Yervant Zorian: An Effective Deterministic BIST Scheme for Shifter/Accumulator Pairs in Datapaths. ISQED 2001: 343-349
35EEMihalis Psarakis, Antonis M. Paschalis, Nektarios Kranitis, Dimitris Gizopoulos, Yervant Zorian: Robust and Low-Cost BIST Architectures for Sequential Fault Testing in Datapath Multipliers. VTS 2001: 15-21
34EENektarios Kranitis, Antonis M. Paschalis, Dimitris Gizopoulos, Mihalis Psarakis, Yervant Zorian: An Effective Deterministic BIST Scheme for Shifter/Accumulator Pairs in Datapaths. J. Electronic Testing 17(2): 97-107 (2001)
2000
33EEDimitris Gizopoulos, Nektarios Kranitis, Mihalis Psarakis, Antonis M. Paschalis, Yervant Zorian: Effective Low Power BIST for Datapaths. DATE 2000: 757
32EEDimitris Gizopoulos, Nektarios Kranitis, Mihalis Psarakis, Antonis M. Paschalis, Yervant Zorian: Low Power/Energy BIST Scheme for Datapaths. VTS 2000: 23-28
31EENektarios Kranitis, Dimitris Gizopoulos, Antonis M. Paschalis, Mihalis Psarakis, Yervant Zorian: Power-/Energy Efficient BIST Schemes for Processor Data Paths. IEEE Design & Test of Computers 17(4): 15-28 (2000)
30EEMihalis Psarakis, Dimitris Gizopoulos, Antonis M. Paschalis, Yervant Zorian: Sequential Fault Modeling and Test Pattern Generation for CMOS Iterative Logic Arrays. IEEE Trans. Computers 49(10): 1083-1099 (2000)
1999
29EEAntonis M. Paschalis, Nektarios Kranitis, Mihalis Psarakis, Dimitris Gizopoulos, Yervant Zorian: An Effective BIST Architecture for Fast Multiplier Cores. DATE 1999: 117-121
28EEMihalis Psarakis, Antonis M. Paschalis, Dimitris Gizopoulos, Yervant Zorian: An Effective BIST Architecture for Sequential Fault Testing in Array Multipliers. VTS 1999: 252-259
27 Dimitris Gizopoulos, Antonis M. Paschalis, Yervant Zorian: An Effective Built-In Self-Test Scheme for Parallel Multipliers. IEEE Trans. Computers 48(9): 936-950 (1999)
26EEIoannis Voyiatzis, Antonis M. Paschalis, Dimitris Nikolos, Constantin Halatsis: An Accumulator-Based BIST Approach for Two-Pattern Testing. J. Electronic Testing 15(3): 267-278 (1999)
1998
25EEIoannis Voyiatzis, Antonis M. Paschalis, Dimitris Nikolos, Constantinos Halatsis: R-CBIST: an effective RAM-based input vector monitoring concurrent BIST technique. ITC 1998: 918-925
24EEMihalis Psarakis, Dimitris Gizopoulos, Antonis M. Paschalis, Yervant Zorian: Robustly Testable Array Multipliers under Realistic Sequential Cell Fault Model. VTS 1998: 152-157
23EEDimitris Gizopoulos, Antonis M. Paschalis, Yervant Zorian: Effective Built-In Self-Test for Booth Multipliers. IEEE Design & Test of Computers 15(3): 105-111 (1998)
22EEAntonis M. Paschalis, Dimitris Gizopoulos, Nikolaos Gaitanis: Concurrent Delay Testing in Totally Self-Checking Systems. J. Electronic Testing 12(1-2): 55-61 (1998)
21EEAntonis M. Paschalis, Nikolaos Gaitanis, Dimitris Gizopoulos, Panagiotis Kostarakis: A Totally Self-Checking 1-out-of-3 Code Error Indicator. J. Electronic Testing 13(1): 61-66 (1998)
20EEMihalis Psarakis, Dimitris Gizopoulos, Antonis M. Paschalis: Test Generation and Fault Simulation for Cell Fault Model using Stuck-at Fault Model based Test Tools. J. Electronic Testing 13(3): 315-319 (1998)
1997
19EEAntonis M. Paschalis, Nikolaos Gaitanis, Dimitris Gizopoulos, Panagiotis Kostarakis: A totally self-checking 1-out-of-3 code error indicator. ED&TC 1997: 450-454
18 Dimitris Gizopoulos, Antonis M. Paschalis, Yervant Zorian, Mihalis Psarakis: An Effective BIST Scheme for Arithmetic Logic Units. ITC 1997: 868-877
17EEDimitris Gizopoulos, Mihalis Psarakis, Antonis M. Paschalis: Robust Sequential Fault Testing of Iterative Logic Arrays. VTS 1997: 238-244
1996
16 Dimitris Gizopoulos, Antonis M. Paschalis, Yervant Zorian: An Effective BIST Scheme for Datapaths. ITC 1996: 76-85
15EENikolaos Gaitanis, Dimitris Gizopoulos, Antonis M. Paschalis, Panagiotis Kostarakis: An asynchronous totally self-checking two-rail code error indicator. VTS 1996: 151-156
14EEDimitris Gizopoulos, Dimitris Nikolos, Antonis M. Paschalis: Testing CMOS combinational iterative logic arrays for realistic faults. Integration 21(3): 209-228 (1996)
13EEIoannis Voyiatzis, Antonis M. Paschalis, Dimitris Nikolos, Constantin Halatsis: An efficient built-in self test method for robust path delay fault testing. J. Electronic Testing 8(2): 219-222 (1996)
12EEDimitris Gizopoulos, Dimitris Nikolos, Antonis M. Paschalis, Constantin Halatsis: C-Testable modified-Booth multipliers. J. Electronic Testing 8(3): 241-260 (1996)
1995
11EEDimitris Gizopoulos, Antonis M. Paschalis, Yervant Zorian: An effective BIST scheme for carry-save and carry-propagate array multipliers. Asian Test Symposium 1995: 298-302
10EEIoannis Voyiatzis, Dimitris Nikolos, Antonis M. Paschalis, Constantinos Halatsis, Th. Haniotakis: An efficient comparative concurrent Built-In Self-Test technique. Asian Test Symposium 1995: 309-315
9EENikolaos Gaitanis, Panagiotis Kostarakis, Antonis M. Paschalis: Totally Self Checking reconfigurable duplication system with separate internal fault indication. Asian Test Symposium 1995: 316-321
8 Dimitris Gizopoulos, Antonis M. Paschalis, Yervant Zorian: An Effective BIST Scheme for Booth Multipliers. ITC 1995: 824-833
7EEDimitris Gizopoulos, Dimitris Nikolos, Antonis M. Paschalis: Testing combinational iterative logic arrays for realistic faults. VTS 1995: 35-41
6 Th. Haniotakis, Antonis M. Paschalis, Dimitris Nikolos: Efficient Totally Self-Checking Checkers for a Class of Borden Codes. IEEE Trans. Computers 44(11): 1318-1322 (1995)
5 Vassilios V. Dimakopoulos, G. Sourtziotis, Antonis M. Paschalis, Dimitris Nikolos: On TSC Checkers for m-out-n Codes. IEEE Trans. Computers 44(8): 1055-1059 (1995)
1990
4 Antonis M. Paschalis, Costas Efstathiou, Constantine Halatsis: An Efficient TSC 1-out-of-3 Code Checker. IEEE Trans. Computers 39(3): 407-411 (1990)
1988
3 Antonis M. Paschalis, Dimitris Nikolos, Constantine Halatsis: Efficient Modular Design of TSC Checkers for M-out-of-2M Codes. IEEE Trans. Computers 37(3): 301-309 (1988)
2 Dimitris Nikolos, Antonis M. Paschalis, George Philokyprou: Efficient Design of Totally Self-Checking Checkers for all Low-Cost Arithmetic Codes. IEEE Trans. Computers 37(7): 807-814 (1988)
1986
1 Antonis M. Paschalis, Dimitris Nikolos, Constantine Halatsis: Efficient Modular Design of TSC Checkers for M-out-of-2M Codes. Aegean Workshop on Computing 1986: 144-155

Coauthor Index

1Andreas Apostolakis [58] [59] [65]
2Vassilios V. Dimakopoulos [5]
3Costas Efstathiou [4]
4Nikolaos Gaitanis [9] [15] [19] [21] [22]
5Dimitris Gizopoulos [7] [8] [11] [12] [14] [15] [16] [17] [18] [19] [20] [21] [22] [23] [24] [27] [28] [29] [30] [31] [32] [33] [34] [35] [36] [37] [38] [39] [40] [41] [42] [43] [44] [45] [46] [47] [48] [49] [50] [51] [52] [53] [54] [55] [56] [57] [58] [59] [60] [61] [62] [63] [64] [65] [66]
6Constantin Halatsis (Constantine Halatsis, Constantinos Halatsis) [1] [3] [4] [10] [12] [13] [25] [26] [46] [56] [63]
7Themistoklis Haniotakis (Th. Haniotakis) [6] [10]
8Miltiadis Hatzimihail [53] [57] [62] [63]
9P. Kenterlis [55]
10Panagiotis Kostarakis [9] [15] [19] [21]
11Nektarios Kranitis [29] [31] [32] [33] [34] [35] [36] [37] [38] [39] [41] [42] [43] [44] [46] [50] [55] [56] [60] [64]
12N. Laoutaris [56]
13Frosso S. Makri [63]
14M. Maniatakos [62]
15Andreas Merentitis [56] [60] [64]
16Dimitris Nikolos [1] [2] [3] [5] [6] [7] [10] [12] [13] [14] [25] [26]
17George Philokyprou [2]
18Mihalis Psarakis [17] [18] [20] [24] [28] [29] [30] [31] [32] [33] [34] [35] [36] [37] [40] [47] [51] [53] [54] [55] [57] [58] [59] [61] [62] [65] [66]
19Anand Raghunathan [57] [62]
20Srivaths Ravi [57] [62]
21G. Sourtziotis [5]
22George Theodorou [56] [64]
23Ioannis Voyiatzis [10] [13] [25] [26] [46] [49] [52] [63]
24George Xenoulis [42] [43] [44] [50] [51] [53] [54] [61] [66]
25Yervant Zorian [8] [11] [16] [18] [23] [24] [27] [28] [29] [30] [31] [32] [33] [34] [35] [36] [37] [38] [39] [40] [41] [42] [44]

Copyright © Tue Nov 3 08:52:44 2009 by Michael Ley (ley@uni-trier.de)