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Christos A. Papachristou Vis

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*2009
96EERajat Subhra Chakraborty, Francis G. Wolff, Somnath Paul, Christos A. Papachristou, Swarup Bhunia: MERO: A Statistical Approach for Hardware Trojan Detection. CHES 2009: 396-410
95EEY. Shiyanovskii, Francis G. Wolff, Christos A. Papachristou, Daniel J. Weyer, W. Clay: Hardware Trojan by Hot Carrier Injection CoRR abs/0906.3832: (2009)
94EEY. Shiyanovskii, Francis G. Wolff, Christos A. Papachristou, Daniel J. Weyer, W. Clay: Exploiting Semiconductor Properties for Hardware Trojans CoRR abs/0906.3834: (2009)
2008
93EEDimitris Bekiaris, Kiamal Z. Pekmestzi, Christos A. Papachristou: A high-speed radix-4 multiplexer-based array multiplier. ACM Great Lakes Symposium on VLSI 2008: 115-118
92EEFrancis G. Wolff, Christos A. Papachristou, Swarup Bhunia, Rajat Subhra Chakraborty: Towards Trojan-Free Trusted ICs: Problem Analysis and Detection Scheme. DATE 2008: 1362-1365
91EEFrancis G. Wolff, Christos A. Papachristou: An Embedded Flash Memory Vault for Software Trojan Protection. HOST 2008: 97-99
90EEGorn Tepvorachai, Christos A. Papachristou: Multi-label imbalanced data enrichment process in neural net classifier training. IJCNN 2008: 1301-1307
2007
89EEGorn Tepvorachai, Christos A. Papachristou: A Configurable FIR Filter Scheme based on an Adaptive Multilayer Network Structure. AHS 2007: 176-183
88EEGorn Tepvorachai, Christos A. Papachristou: Facial Image Associative Memory Model. AHS 2007: 233-242
87EEBalkaran S. Gill, Christos A. Papachristou, Francis G. Wolff: Interactive presentation: A new asymmetric SRAM cell to reduce soft errors and leakage power in FPGA. DATE 2007: 1460-1465
86EEOsama Al-Khaleel, Christos A. Papachristou, Francis G. Wolff, Kiamal Z. Pekmestzi: An Elliptic Curve Cryptosystem Design Based on FPGA Pipeline Folding. IOLTS 2007: 71-78
2006
85EEGorn Tepvorachai, Christos A. Papachristou: Self-Configurable Neural Network Processor for FIR Filter Applications. AHS 2006: 114-121
84EEOsama Al-Khaleel, Christos A. Papachristou, Frank Wolff, Kiamal Z. Pekmestzi: A Large Scale Adaptable Multiplier for Cryptographic Applications. AHS 2006: 477-484
83EEBalkaran S. Gill, Christos A. Papachristou, Francis G. Wolff: Soft delay error analysis in logic circuits. DATE 2006: 47-52
82EEChristos A. Papachristou, J. Weaver, R. Vijayakumar, Francis G. Wolff: A Dynamic Reconfigurable Fabric for Platform SoCs. FPL 2006: 1-4
81EEOsama Al-Khaleel, Christos A. Papachristou, Frank Wolff, Kiamal Z. Pekmestzi: FPGA-based Design of a Large Moduli Multiplier for Public Key Cryptographic Systems. ICCD 2006
80EEShih-yu Yang, Christos A. Papachristou: A method for detecting interconnect DSM defects in systems on chip. IEEE Trans. on CAD of Integrated Circuits and Systems 25(1): 197-204 (2006)
79EEHani Rizk, Christos A. Papachristou, Francis G. Wolff: A Self Test Program Design Technique for Embedded DSP Cores. J. Electronic Testing 22(1): 71-87 (2006)
2005
78EEBalkaran S. Gill, Michael Nicolaidis, Francis G. Wolff, Christos A. Papachristou, Steven L. Garverick: An Efficient BICS Design for SEUs Detection and Correction in Semiconductor Memories. DATE 2005: 592-597
77EEJianchun Li, Christos A. Papachristou, Raj Shekhar: Accelerating mutual information-based 3D medical image registration with An FPGA computing platform (abstract only). FPGA 2005: 279
76EEBalkaran S. Gill, Michael Nicolaidis, Christos A. Papachristou: Radiation Induced Single-Word Multiple-Bit Upsets Correction in SRAM. IOLTS 2005: 266-271
2004
75EEFrancis G. Wolff, Christos A. Papachristou, David R. McIntyre: Test Compression and Hardware Decompression for Scan-Based SoCs. DATE 2004: 716-717
74EEHani Rizk, Christos A. Papachristou, Francis G. Wolff: Designing Self Test Programs for Embedded DSP Cores. DATE 2004: 816-823
73EEJianchun Li, Christos A. Papachristou, Raj Shekhar: A Reconfigurable SoC Architecture and Caching Scheme for 3D Medical Image Processing. FCCM 2004: 320-321
72 Jianchun Li, Christos A. Papachristou, Raj Shekhar: A "Brick" Caching Scheme for 3D Medical Imaging. ISBI 2004: 563-566
71EEBalkaran S. Gill, Christos A. Papachristou, Francis G. Wolff: Soft Delay Error Effects in CMOS Combinational Circuits. VTS 2004: 325-334
2003
70EEMichael J. Knieser, Francis G. Wolff, Christos A. Papachristou, Daniel J. Weyer, David R. McIntyre: A Technique for High Ratio LZW Compression. DATE 2003: 10116-10121
2002
69EEFrancis G. Wolff, Christos A. Papachristou: Multiscan-Based Test Compression and Hardware Decompression Using LZ77. ITC 2002: 331-339
68EEMehrdad Nourani, Christos A. Papachristou: False path exclusion in delay analysis of RTL structures. IEEE Trans. VLSI Syst. 10(1): 30-43 (2002)
2001
67EEShih-yu Yang, Christos A. Papachristou, Massood Tabib-Azar: Improving Bus Test Via IDDT and Boundary Scan. DAC 2001: 307-312
66EEKelly A. Ockunzzi, Christos A. Papachristou: Test Strategies for BIST at the Algorithmic and Register-Transfer Levels. DAC 2001: 65-70
65EEKelly A. Ockunzzi, Christos A. Papachristou: Breaking Correlation to Improve Testability. VTS 2001: 75-81
64EEMehrdad Nourani, Joan Carletta, Christos A. Papachristou: Integrated test of interacting controllers and datapaths. ACM Trans. Design Autom. Electr. Syst. 6(3): 401-422 (2001)
2000
63EEMehrdad Nourani, Joan Carletta, Christos A. Papachristou: Synthesis-for-testability of controller-datapath pairs that use gated clocks. DAC 2000: 613-618
62EEJoan Carletta, Christos A. Papachristou, Mehrdad Nourani: Detecting Undetectable Controller Faults Using Power Analysis. DATE 2000: 723-728
61 Mehrdad Nourani, Christos A. Papachristou: An ILP formulation to optimize test access mechanism in system-on-chip testing. ITC 2000: 902-910
60EEMehrdad Nourani, Christos A. Papachristou: Stability-based algorithms for high-level synthesis of digital ASICs. IEEE Trans. VLSI Syst. 8(4): 431-435 (2000)
1999
59EEFrancis G. Wolff, Michael J. Knieser, Daniel J. Weyer, Christos A. Papachristou: Using codesign techniques to support analog functionality. CODES 1999: 79-84
58EEChristos A. Papachristou, F. Martin, Mehrdad Nourani: Microprocessor Based Testing for Core-Based System on Chip. DAC 1999: 586-591
57EEJoan Carletta, Mehrdad Nourani, Christos A. Papachristou: Synthesis of Controllers for Full Testability of Integrated Datapath-Controller Pairs. DATE 1999: 278-282
56EEChristos A. Papachristou, Yusuf Alzazeri: A Method of Distributed Controller Design for RTL Circuits. DATE 1999: 774-775
55 Christos A. Papachristou: High Time for Higher Level BIST. ITC 1999: 1117
54EEKen Batcher, Christos A. Papachristou: Instruction Randomization Self Test For Processor Cores. VTS 1999: 34-40
53EEChristos A. Papachristou, Mehrdad Nourani, Mark Spining: A multiple clocking scheme for low-power RTL design. IEEE Trans. VLSI Syst. 7(2): 266-276 (1999)
52EEMehrdad Nourani, Christos A. Papachristou: Structural Fault Testing of Embedded Cores Using Pipelining. J. Electronic Testing 15(1-2): 129-144 (1999)
1998
51EEWei Zhao, Christos A. Papachristou: Testing DSP Cores Based on Self-Test Programs. DATE 1998: 166-172
50EEMehrdad Nourani, Christos A. Papachristou: A Bypass Scheme for Core-Based System Fault Testing. DATE 1998: 979-980
49EEMehrdad Nourani, Christos A. Papachristou: Parallelism in Structural Fault Testing of Embedded Cores. VTS 1998: 15-21
48EEChristos A. Papachristou, Mikhail Baklashov, Kowen Lai: High-Level Test Synthesis for Behavioral and Structural Designs. J. Electronic Testing 13(2): 167-188 (1998)
47EEKelly A. Ockunzzi, Christos A. Papachristou: Testability Enhancement for Control-Flow Intensive Behaviors. J. Electronic Testing 13(3): 239-257 (1998)
1997
46EEKowen Lai, Christos A. Papachristou, Mikhail Baklashov: BIST testability enhancement using high level test synthesis for behavioral and structural designs. Asian Test Symposium 1997: 338-342
45EEMehrdad Nourani, Joan Carletta, Christos A. Papachristou: A Scheme for Integrated Controller-Datapath Fault Testing. DAC 1997: 546-551
44EEMehrdad Nourani, Christos A. Papachristou: Structural BIST insertion using behavioral test analysis. ED&TC 1997: 64-68
43EEChristos A. Papachristou, Mikhail Baklashov: A test synthesis technique using redundant register transfers. ICCAD 1997: 414-420
42 Kowen Lai, Christos A. Papachristou, Mikhail Baklashov: High Level Test Synthesis Across the Boundary of Behavioral and Structural Domains. ICCD 1997: 636-641
41 Kelly A. Ockunzzi, Christos A. Papachristou: Testability Enhancement for Behavioral Descriptions Containing Conditional Statements. ITC 1997: 236-245
40EEJoan Carletta, Christos A. Papachristou: Behavioral Testability Insertion for Datapath/Controller Circuits. J. Electronic Testing 11(1): 9-28 (1997)
1996
39EEKowen Lai, Christos A. Papachristou: BIST Testability Enhancement of System Level Circuits : Experience with An Industrial Design. Asian Test Symposium 1996: 219-
38EEChristos A. Papachristou, Mark Spining, Mehrdad Nourani: An Effective Power Management Scheme for RTL Design Based on Multiple Clocks. DAC 1996: 337-342
37EEEhat Ercanli, Christos A. Papachristou: A Register File and Scheduling Model for Application Specific Processor Synthesis. DAC 1996: 35-40
36EEWei Zhao, Christos A. Papachristou: Synthesis of reusable DSP cores based on multiple behaviors. ICCAD 1996: 103-108
35EEJ. El-Ziq, Najmi T. Jarwala, Niraj K. Jha, Peter Marwedel, Christos A. Papachristou, Janusz Rajski, John W. Sheppard: Hardware-Software Co-Design for Test: It's the Last Straw! VTS 1996: 506-507
1995
34EEWei Zhao, Christos A. Papachristou: Architectural partitioning of control memory for application specific programmable processors. ICCAD 1995: 521-526
33EEJoan Carletta, Christos A. Papachristou: Testability analysis and insertion for RTL circuits based on pseudorandom BIST. ICCD 1995: 162-167
32EEChristos A. Papachristou, Mark Spining, Mehrdad Nourani: A multiple clocking scheme for low power RTL design. ISLPD 1995: 27-32
31 Christos A. Papachristou, Joan Carletta: Test Synthesis in the Behavioral Domain. ITC 1995: 693-702
30EEJoan Carletta, Christos A. Papachristou: Structural constraints for circular self-test paths. VTS 1995: 486-491
29EEWen-Ben Jone, Christos A. Papachristou: A coordinated circuit partitioning and test generation method for pseudo-exhaustive testing of VLSI circuits. IEEE Trans. on CAD of Integrated Circuits and Systems 14(3): 374-384 (1995)
1993
28EEMehrdad Nourani, Christos A. Papachristou: A Layout Estimation Algorithm for RTL Datapaths. DAC 1993: 285-291
27EEChristos A. Papachristou, Haidar Harmanani, Mehrdad Nourani: An Approach for Redesigning in Data Path Synthesis. DAC 1993: 419-423
26EEHaidar Harmanani, Christos A. Papachristou: An improved method for RTL synthesis with testability tradeoffs. ICCAD 1993: 30-35
25 Scott Chiu, Christos A. Papachristou: A Partial Scan Cost Estimation Method at the System Level. ICCD 1993: 146-150
24EEH. Fatih Ugurdag, Christos A. Papachristou: A VLIW architecture based on shifting register files. MICRO 1993: 263-268
23 Christos A. Papachristou, Venkata R. Immaneni: Vertical Migration of Software Functions and Algorithms Using Enhanced Microsequencing. IEEE Trans. Computers 42(1): 45-61 (1993)
1992
22EEMehrdad Nourani, Christos A. Papachristou: Move Frame Scheduling and Mixed Scheduling-Allocation for the Automated Synthesis of Digital Systems. DAC 1992: 99-105
21 H. Fatih Ugurdag, Christos A. Papachristou: ALMP: A Shifting Memory Architecture for Loop Pipelining. ICCD 1992: 564-568
20EEMichael J. Knieser, Christos A. Papachristou: Y-Pipe: a conditional branching scheme without pipeline delays. MICRO 1992: 125-128
1991
19EEScott Chiu, Christos A. Papachristou: A Design for Testability Scheme with Applications to Data Path Synthesis. DAC 1991: 271-277
18EEChristos A. Papachristou, Scott Chiu, Haidar Harmanani: A Data Path Synthesis Method for Self-Testable Designs. DAC 1991: 378-384
17 Scott Chiu, Christos A. Papachristou: A Built-In Self-Testing Approach for Minimizing Hardware Overhead. ICCD 1991: 282-285
16 Christos A. Papachristou, Scott Chiu, Haidar Harmanani: SYNTEST: A Method for High-Level SYNthesis with Self-TESTability. ICCD 1991: 458-462
1990
15EEChristos A. Papachristou, Haluk Konuk: A Linear Program Driven Scheduling and Allocation Method Followed by an Interconnect Optimization Algorithm. DAC 1990: 77-83
14EEJong-Jiann Shieh, Christos A. Papachristou: An instruction reoderer for pipelined computers. MICRO 1990: 135-142
13EEDjahida Smati, Jerry Hwang, Christos A. Papachristou: SMDSS - a structured microcode development and simulation system. MICRO 1990: 252-259
12EEChristos A. Papachristou, Anil L. Pandya: A design scheme for PLA-based control tables with reduced area and time-delay cost. IEEE Trans. on CAD of Integrated Circuits and Systems 9(5): 453-472 (1990)
1989
11EEWen-Ben Jone, Christos A. Papachristou: A Coordinated Approach to Partitioning and Test Pattern Generation for Pseudoexhaustive Testing. DAC 1989: 525-534
10EEWen-Ben Jone, Christos A. Papachristou, M. Pereira: A Scheme for Overlaying Concurrent Testing of VLSI Circuits. DAC 1989: 531-536
9EEJong-Jiann Shieh, Christos A. Papachristou: On reordering instruction streams for pipelined computers. MICRO 1989: 199-206
1988
8EEL. Shih, Christos A. Papachristou: Mapping of micro data flow computations on parallel microarchitectures. MICRO 1988: 70-72
1987
7 Christos A. Papachristou, Suntae Hwang: A Systolic Array Structure for Matrix Multiplication in the Residue Number System. ICS 1987: 716-731
6EEChristos A. Papachristou: Associative table lookup processing for multioperand residue arithmetic. J. ACM 34(2): 376-396 (1987)
1986
5EEChristos A. Papachristou: Expert system approach to VLSI cell design (abstract). ACM Conference on Computer Science 1986: 485
1985
4 Christos A. Papachristou, Narendar B. Sahgal: An Improved Method for Detecting Functional Faults in Semiconductor Random Access Memories. IEEE Trans. Computers 34(2): 110-116 (1985)
1983
3 Christos A. Papachristou: Direct Implementation of Discrete and Residue-Based Functions Via Optimal Encoding: A Programmable Array Logic Approach. IEEE Trans. Computers 32(10): 961-968 (1983)
1978
2 Christos A. Papachristou: An Algorithm for Optimal NAND Cascade Logic Synthesis. IEEE Trans. Computers 27(12): 1099-1111 (1978)
1977
1EEChristos A. Papachristou: Characteristic measures of switching functions. Inf. Sci. 13(1): 51-75 (1977)

Coauthor Index

1Osama Al-Khaleel [81] [84] [86]
2Yusuf Alzazeri [56]
3Mikhail Baklashov [42] [43] [46] [48]
4Ken Batcher [54]
5Dimitris Bekiaris [93]
6Swarup Bhunia [92] [96]
7Joan Carletta [30] [31] [33] [40] [45] [57] [62] [63] [64]
8Rajat Subhra Chakraborty [92] [96]
9Scott Chiu [16] [17] [18] [19] [25]
10W. Clay [94] [95]
11J. El-Ziq [35]
12Ehat Ercanli [37]
13Steven L. Garverick [78]
14Balkaran S. Gill [71] [76] [78] [83] [87]
15Haidar Harmanani [16] [18] [26] [27]
16Jerry Hwang [13]
17Suntae Hwang [7]
18Venkata R. Immaneni [23]
19Najmi T. Jarwala [35]
20Niraj K. Jha [35]
21Wen-Ben Jone [10] [11] [29]
22Michael J. Knieser [20] [59] [70]
23Haluk Konuk [15]
24Kowen Lai [39] [42] [46] [48]
25Jianchun Li [72] [73] [77]
26F. Martin [58]
27Peter Marwedel [35]
28David R. McIntyre [70] [75]
29Michael Nicolaidis [76] [78]
30Mehrdad Nourani [22] [27] [28] [32] [38] [44] [45] [49] [50] [52] [53] [57] [58] [60] [61] [62] [63] [64] [68]
31Kelly A. Ockunzzi [41] [47] [65] [66]
32Anil L. Pandya [12]
33Somnath Paul [96]
34Kiamal Z. Pekmestzi [81] [84] [86] [93]
35M. Pereira [10]
36Janusz Rajski [35]
37Hani Rizk [74] [79]
38Narendar B. Sahgal [4]
39Raj Shekhar [72] [73] [77]
40John W. Sheppard [35]
41Jong-Jiann Shieh [9] [14]
42L. Shih [8]
43Y. Shiyanovskii [94] [95]
44Djahida Smati [13]
45Mark Spining [32] [38] [53]
46Massood Tabib-Azar [67]
47Gorn Tepvorachai [85] [88] [89] [90]
48H. Fatih Ugurdag [21] [24]
49R. Vijayakumar [82]
50J. Weaver [82]
51Daniel J. Weyer [59] [70] [94] [95]
52Francis G. Wolff [59] [69] [70] [71] [74] [75] [78] [79] [82] [83] [86] [87] [91] [92] [94] [95] [96]
53Frank Wolff [81] [84]
54Shih-yu Yang [67] [80]
55Wei Zhao [34] [36] [51]

Colors in the list of coauthors

Copyright © Tue Nov 3 08:52:44 2009 by Michael Ley (ley@uni-trier.de)