| 2008 |
|---|
| 79 | EE | Michael Nicolaidis,
Renaud Perez,
Dan Alexandrescu:
Low-Cost Highly-Robust Hardened Cells Using Blocking Feedback Transistors.
VTS 2008: 371-376 |
| 2007 |
|---|
| 78 | EE | Jean Arlat,
Ravishankar K. Iyer,
Michael Nicolaidis:
Workshop on Dependable and Secure Nanocomputing.
DSN 2007: 809-810 |
| 77 | EE | Michael Nicolaidis:
GRAAL: A Fault-Tolerant Architecture for Enabling Nanometric Technologies.
IOLTS 2007: 255 |
| 76 | EE | Lorena Anghel,
Michael Nicolaidis:
Defects Tolerant Logic Gates for Unreliable Future Nanotechnologies.
IWANN 2007: 422-429 |
| 2006 |
|---|
| 75 | EE | Slimane Boutobza,
Michael Nicolaidis,
Kheiredine M. Lamara,
Andrea Costa:
A Transparent based Programmable Memory BIST.
European Test Symposium 2006: 89-96 |
| 74 | EE | Michael Nicolaidis:
A Low-Cost Single-Event Latchup Mitigation Sscheme.
IOLTS 2006: 111-118 |
| 73 | EE | Lorena Anghel,
Michael Nicolaidis,
Nadine Buard:
From Nuclear Reaction to System Failures: Can We Address All Levels of Soft Errors Accurately?
IOLTS 2006: 85 |
| 72 | EE | Michael Nicolaidis:
Session Abstract.
VTS 2006: 286-287 |
| 2005 |
|---|
| 71 | EE | Balkaran S. Gill,
Michael Nicolaidis,
Francis G. Wolff,
Christos A. Papachristou,
Steven L. Garverick:
An Efficient BICS Design for SEUs Detection and Correction in Semiconductor Memories.
DATE 2005: 592-597 |
| 70 | EE | Balkaran S. Gill,
Michael Nicolaidis,
Christos A. Papachristou:
Radiation Induced Single-Word Multiple-Bit Upsets Correction in SRAM.
IOLTS 2005: 266-271 |
| 69 | EE | Lorena Anghel,
Michael Nicolaidis:
Simulation and Mitigation of Single Event Effects.
IOLTS 2005: 81 |
| 68 | EE | Michael Nicolaidis:
Design for Mitigation of Single Event Effects.
IOLTS 2005: 95-96 |
| 67 | EE | Michael Nicolaidis,
Lorena Anghel,
Nadir Achouri:
Memory Defect Tolerance Architectures for Nanotechnologies.
J. Electronic Testing 21(4): 445-455 (2005) |
| 2004 |
|---|
| 66 | EE | Lorena Anghel,
Nadir Achouri,
Michael Nicolaidis:
Evaluation of Memory Built-in Self Repair Techniques for High Defect Density Technologie.
PRDC 2004: 315-320 |
| 65 | EE | Michael Nicolaidis,
Nadir Achouri,
Lorena Anghel:
A Diversified Memory Built-In Self-Repair Approach for Nanotechnologies.
VTS 2004: 313-318 |
| 2003 |
|---|
| 64 | EE | Michael Nicolaidis,
Nadir Achouri,
Slimane Boutobza:
Optimal Reconfiguration Functions for Column or Data-bit Built-In Self-Repair.
DATE 2003: 10590-10595 |
| 63 | EE | Michael Nicolaidis,
Nadir Achouri,
Lorena Anghel:
A Memory Built-In Self-Repair for High Defect Densities Based on Error Polarities.
DFT 2003: 459-466 |
| 62 | EE | Michael Nicolaidis,
Nadir Achouri,
Slimane Boutobza:
Dynamic Data-bit Memory Built-In Self- Repair.
ICCAD 2003: 588-594 |
| 61 | EE | Michael Nicolaidis,
Nadir Achouri,
Lorena Anghel:
Memory Built-In Self-Repair for Nanotechnologies.
IOLTS 2003: 94- |
| 60 | EE | Michael Nicolaidis:
Reliability Threats in VDSM - Shortcomings in Conventional Test and Fault-Tolerance Alternatives.
ITC 2003: 1282 |
| 59 | EE | Michael Nicolaidis:
Carry checking/parity prediction adders and ALUs.
IEEE Trans. VLSI Syst. 11(1): 121-128 (2003) |
| 2002 |
|---|
| 58 | EE | Michael Nicolaidis:
IP for Embedded Robustness.
DATE 2002: 240-241 |
| 57 | EE | Eric Dupont,
Michael Nicolaidis,
Peter Rohr:
Embedded Robustness Ips.
DATE 2002: 244-247 |
| 56 | EE | Dan Alexandrescu,
Lorena Anghel,
Michael Nicolaidis:
New Methods for Evaluating the Impact of Single Event Transients in VDSM ICs.
DFT 2002: 99-107 |
| 55 | EE | Eric Dupont,
Michael Nicolaidis:
Robustness IPs for Reliability and Security of SoCs.
ITC 2002: 357-364 |
| 54 | | Michael Nicolaidis:
Soft Error Protection for Embedded Memories.
MTDT 2002 |
| 53 | EE | Eric Dupont,
Michael Nicolaidis,
Peter Rohr:
Embedded Robustness IPs for Transient-Error-Free ICs.
IEEE Design & Test of Computers 19(3): 56-70 (2002) |
| 2001 |
|---|
| 52 | EE | Eleftherios Kolonis,
Michael Nicolaidis:
Fail-Safe Synchronization Circuit for Duplicated Systems.
DFT 2001: 412-417 |
| 51 | EE | Jim Chung,
N. Derhacobian,
Jean Gasiot,
Michael Nicolaidis,
David Towne,
R. Velazco:
Soft Errors and Tolerance for Soft Errors.
VTS 2001: 279-280 |
| 2000 |
|---|
| 50 | EE | Lorena Anghel,
Michael Nicolaidis:
Cost Reduction and Evaluation of a Temporary Faults Detecting Technique.
DATE 2000: 591-598 |
| 49 | EE | Yervant Zorian,
Michael Nicolaidis,
Peter Muhmenthaler,
David Y. Lepejian,
Chris W. H. Strolenberg,
Kees Veelenturf:
Tutorial Statement.
DATE 2000: 66 |
| 48 | EE | Michael Nicolaidis,
N. Zaidan,
Th. Calin,
D. Bied-Charreton:
ISIS: A Fail-Safe Interface Realized in Smart Power Technology.
IOLTW 2000: 191- |
| 47 | EE | Lorena Anghel,
Michael Nicolaidis,
Issam Alzaher-Noufal:
Self-Checking Circuits versus Realistic Faults in Very Deep Submicron.
VTS 2000: 55-66 |
| 1999 |
|---|
| 46 | EE | Issam Alzaher-Noufal,
Michael Nicolaidis:
A CAD Framework for Generating Self-Checking 1 Multipliers Based on Residue Codes.
DATE 1999: 122- |
| 45 | EE | Michael Nicolaidis,
Yervant Zorian:
Scaling Deeper to Submicron: On-Line Testing to the Rescue.
DATE 1999: 432- |
| 44 | EE | Iyad Rayane,
J. Velasco-Medina,
Michael Nicolaidis:
A One-Bit-Signature BIST for Embedded Operational Amplifiers in Mixed-Signal Circuits Based on the Slew-Rate Detection.
DATE 1999: 792- |
| 43 | EE | Haridimos T. Vergos,
Dimitris Nikolos,
Y. Tsiatouhas,
Th. Haniotakis,
Michael Nicolaidis:
On Path Delay Fault Testing of Multiplexer - Based Shifters.
Great Lakes Symposium on VLSI 1999: 20-23 |
| 42 | EE | J. Velasco-Medina,
Iyad Rayane,
Michael Nicolaidis:
On-Line BIST for Testing Analog Circuits.
ICCD 1999: 330- |
| 41 | EE | Fabien Clermidy,
Thierry Collette,
Michael Nicolaidis:
A New Placement Algorithm Dedicated to Parallel Computers: Bases and Application.
PRDC 1999: 242- |
| 40 | EE | Th. Calin,
Lorena Anghel,
Michael Nicolaidis:
Built-In Current Sensor for IDDQ Testing in Deep Submicron CMOS.
VTS 1999: 135-142 |
| 39 | EE | Iyad Rayane,
J. Velasco-Medina,
Michael Nicolaidis:
A Digital BIST for Operational Amplifiers Embedded in Mixed-Signal Circuits.
VTS 1999: 304-310 |
| 38 | EE | Michael Nicolaidis:
Time Redundancy Based Soft-Error Tolerance to Rescue Nanometer Technologies.
VTS 1999: 86-94 |
| 37 | EE | Michael Nicolaidis,
Ricardo de Oliveira Duarte:
Fault-Secure Parity Prediction Booth Multipliers.
IEEE Design & Test of Computers 16(3): 90-101 (1999) |
| 1998 |
|---|
| 36 | EE | J. Velasco-Medina,
Marcelo Lubaszewski,
Michael Nicolaidis:
An Approach to the On-Line Testing of Operational Amplifiers.
Asian Test Symposium 1998: 290-295 |
| 35 | EE | Michael Nicolaidis,
Ricardo de Oliveira Duarte:
Design of Fault-Secure Parity-Prediction Booth Multipliers.
DATE 1998: 7-14 |
| 34 | EE | J. Velasco-Medina,
Th. Calin,
Michael Nicolaidis:
Fault Detection for Linear Analog Circuits Using Current Injection.
DATE 1998: 987- |
| 33 | EE | Michael Nicolaidis:
Scaling Deeper to Submicron: On-Line Testing to the Rescue.
ITC 1998: 1139 |
| 32 | EE | Michael Nicolaidis:
Design for soft-error robustness to rescue deep submicron scaling.
ITC 1998: 1140 |
| 31 | | Ramesh Karri,
Michael Nicolaidis:
Guest Editors' Introduction: Online VLSI Testing.
IEEE Design & Test of Computers 15(4): 12-16 (1998) |
| 30 | | Michael Nicolaidis:
Fail-Safe Interfaces for VLSI: Theoretical Foundations and Implementation.
IEEE Trans. Computers 47(1): 62-77 (1998) |
| 29 | EE | Michael Nicolaidis:
On-line testing for VLSI: state of the art and trends.
Integration 26(1-2): 197-209 (1998) |
| 1997 |
|---|
| 28 | | Michael Nicolaidis:
On-Line Testing for VLSI.
ITC 1997: 1042 |
| 27 | EE | Michael Nicolaidis,
Ricardo de Oliveira Duarte,
Salvador Manich,
Joan Figueras:
Fault-Secure Parity Prediction Arithmetic Operators.
IEEE Design & Test of Computers 14(2): 60-71 (1997) |
| 1996 |
|---|
| 26 | EE | Michael Nicolaidis,
Rubin A. Parekhji,
M. Boudjit:
E-Groups: A New Technique for Fast Backward Propagation in System Level Test Generation.
Asian Test Symposium 1996: 34-41 |
| 25 | EE | Salvador Manich,
Michael Nicolaidis,
Joan Figueras:
Enhancing realistic fault secureness in parity prediction array arithmetic operators by I/sub DDQ/ monitoring.
VTS 1996: 124-129 |
| 24 | EE | R. L. Campbell,
P. Kuekes,
David Y. Lepejian,
W. Maly,
Michael Nicolaidis,
Alex Orailoglu:
Can Defect-Tolerant Chips Better Meet the Quality Challenge?
VTS 1996: 362-363 |
| 23 | | Michael Nicolaidis:
Theory of Transparent BIST for RAMs.
IEEE Trans. Computers 45(10): 1141-1156 (1996) |
| 1995 |
|---|
| 22 | EE | H. Bederr,
Michael Nicolaidis,
Alain Guyot:
Analytic approach for error masking elimination in on-line multipliers.
IEEE Symposium on Computer Arithmetic 1995: 30-37 |
| 21 | | O. Kebichi,
Michael Nicolaidis,
Vyacheslav N. Yarmolik:
Exact Aliasing Computation for RAM BIST.
ITC 1995: 13-22 |
| 20 | | Fabian Vargas,
Michael Nicolaidis,
Yervant Zorian:
An Approach for Designing Total-Dose Tolerant MCMs Based on Current Monitoring.
ITC 1995: 345-354 |
| 19 | | Th. Calin,
F. L. Vargas,
Michael Nicolaidis:
Upset-Tolerant CMOS SRAM Using Current Monitoring: Prototype and Test Experiments.
ITC 1995: 45-53 |
| 18 | EE | B. Hamdi,
H. Bederr,
Michael Nicolaidis:
A tool for automatic generation of self-checking data paths.
VTS 1995: 460-466 |
| 17 | EE | Michael Nicolaidis,
Vladimir Castro Alves,
H. Bederr:
Testing complex couplings in multiport memories.
IEEE Trans. VLSI Syst. 3(1): 59-71 (1995) |
| 16 | EE | Jien-Chung Lo,
James C. Daly,
Michael Nicolaidis:
A strongly code disjoint built-in current sensor for strongly fault-secure static CMOS realizations.
IEEE Trans. on CAD of Integrated Circuits and Systems 14(11): 1402-1407 (1995) |
| 1994 |
|---|
| 15 | | Michael Nicolaidis,
H. Bederr:
Efficient Implementations of Self-Checking Multiply and Divide Arrays.
EDAC-ETC-EUROASIC 1994: 574-579 |
| 14 | | Ricardo de Oliveira Duarte,
Michael Nicolaidis:
A Test Methodology Applied to Cellular Logic Programmable Gate Arrays.
FPL 1994: 11-22 |
| 13 | | F. L. Vargas,
Michael Nicolaidis:
SEU-Tolerant SRAM Design Based on Current Monitoring.
FTCS 1994: 106-115 |
| 12 | | Vyacheslav N. Yarmolik,
Michael Nicolaidis,
O. Kebichi:
Aliasing-free Signature Analysis for RAM BIST.
ITC 1994: 368-377 |
| 11 | EE | Michael Nicolaidis:
Fault secure property versus strongly code disjoint checkers.
IEEE Trans. on CAD of Integrated Circuits and Systems 13(5): 651-658 (1994) |
| 1993 |
|---|
| 10 | | Michael Nicolaidis:
Efficient Implementations of Self-Checking Adders and ALUs.
FTCS 1993: 586-595 |
| 9 | | F. L. Vargas,
Michael Nicolaidis,
Bernard Courtois:
Quiescent Current Monitoring to Improve the Reliability of Electronic Systems in Space Radiation Environments.
ICCD 1993: 596-600 |
| 1992 |
|---|
| 8 | | Jien-Chung Lo,
James C. Daly,
Michael Nicolaidis:
Design of Static CMOS Self-Checking Circuits using Built-In Current Sensing.
FTCS 1992: 104-111 |
| 7 | | O. Kebichi,
Michael Nicolaidis:
A Tool for Automatic Generation of BISTed and Transparent BISTed Rams.
ICCD 1992: 570-575 |
| 6 | | Michael Nicolaidis:
Transparent BIST for RAMs.
ITC 1992: 598-607 |
| 5 | EE | Jien-Chung Lo,
Suchai Thanawastien,
T. R. N. Rao,
Michael Nicolaidis:
An SFS Berger check prediction ALU and its application to self-checking processor designs.
IEEE Trans. on CAD of Integrated Circuits and Systems 11(4): 525-540 (1992) |
| 1991 |
|---|
| 4 | | Vladimir Castro Alves,
Michael Nicolaidis,
P. Lestrat,
Bernard Courtois:
Built-In Self-Test for Multi-Port RAMs.
ICCAD 1991: 248-251 |
| 3 | | Michael Nicolaidis,
M. Boudjit:
New Implementations, Tools, and Experiments for Decreasing Self-Checking PLAs Area Overhead.
ICCD 1991: 275-281 |
| 1989 |
|---|
| 2 | EE | Michael Nicolaidis:
Self-exercising checkers for unified built-in self-test (UBIST).
IEEE Trans. on CAD of Integrated Circuits and Systems 8(3): 203-218 (1989) |
| 1988 |
|---|
| 1 | | Michael Nicolaidis,
Bernard Courtois:
Strongly Code Disjoint Checkers.
IEEE Trans. Computers 37(6): 751-756 (1988) |
