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* | 2006 | |
---|---|---|

83 | EE | Zile Wei, Donald Chai, A. Richard Newton, Andreas Kuehlmann: Fast Boolean Matching with Don't Cares. ISQED 2006: 346-351 |

2005 | ||

82 | EE | Heloise Hwawen Hse, A. Richard Newton: Recognition and beautification of multi-stroke symbols in digital ink. Computers & Graphics 29(4): 533-546 (2005) |

2004 | ||

81 | EE | A. Richard Newton: Great works for the 21st century: a critical role for the modern research university. EMSOFT 2004: 1 |

80 | EE | Heloise Hwawen Hse, A. Richard Newton: Sketched Symbol Recognition using Zernike Moments. ICPR (1) 2004: 367-370 |

79 | EE | Zile Wei, Yu Cao, A. Richard Newton: Digital Image Restoration by Exposure-Splitting and Registration. ICPR (4) 2004: 657-660 |

78 | EE | Heloise Hwawen Hse, Michael Shilman, A. Richard Newton: Robust sketched symbol fragmentation using templates. IUI 2004: 156-160 |

2002 | ||

77 | EE | Kurt Keutzer, Sharad Malik, A. Richard Newton: From ASIC to ASIP: The Next Design Discontinuity. ICCD 2002: 84-90 |

2001 | ||

76 | EE | Lixin Su, Wray L. Buntine, A. Richard Newton, Bradley S. Peters: Learning as applied to stochastic optimization for standard-cellplacement. IEEE Trans. on CAD of Integrated Circuits and Systems 20(4): 516-527 (2001) |

2000 | ||

75 | EE | Naji Ghazal, A. Richard Newton, Jan M. Rabaey: Retargetable estimation scheme for DSP architecture selection. ASP-DAC 2000: 485-490 |

74 | EE | Naji Ghazal, A. Richard Newton, Jan M. Rabaey: Predicting performance potential of modern DSPs. DAC 2000: 332-335 |

73 | EE | A. Richard Newton, Walden C. Rhines, Sünke Mehrgardt, Henry Samueli, Tudor Brown: Embedded systems design in the new millennium (panel session). DAC 2000: 338-339 |

72 | EE | Kurt Keutzer, A. Richard Newton, Jan M. Rabaey, Alberto L. Sangiovanni-Vincentelli: System-level design: orthogonalization of concerns andplatform-based design. IEEE Trans. on CAD of Integrated Circuits and Systems 19(12): 1523-1543 (2000) |

71 | EE | Abdallah Tabbara, Bassam Tabbara, Robert K. Brayton, A. Richard Newton: Integration of retiming with architectural floorplanning. Integration 29(1): 25-43 (2000) |

1999 | ||

70 | EE | Abdallah Tabbara, Robert K. Brayton, A. Richard Newton: Retiming for DSM with Area-Delay Trade-Offs and Delay Constraints. DAC 1999: 725-730 |

69 | EE | Kurt Keutzer, A. Richard Newton: The MARCO/DARPA Gigascale Silicon Research Center. ICCD 1999: 14- |

1998 | ||

68 | EE | Francis L. Chan, Mark D. Spiller, A. Richard Newton: WELD - An Environment for Web-based Electronic Design. DAC 1998: 146-151 |

67 | EE | A. Richard Newton: Technical Challenges of IP and System-on-Chip: The ASIC Vendor Perspective (Panel). DAC 1998: 501 |

66 | EE | James Shin Young, Josh MacDonald, Michael Shilman, Abdallah Tabbara, Paul N. Hilfinger, A. Richard Newton: Design and Specification of Embedded Systems in Java Using Successive, Formal Refinement. DAC 1998: 70-75 |

1997 | ||

65 | EE | Wray L. Buntine, Lixin Su, A. Richard Newton, Andrew Mayer: Adaptive methods for netlist partitioning. ICCAD 1997: 356-363 |

64 | EE | Mark D. Spiller, A. Richard Newton: EDA and the network. ICCAD 1997: 470-476 |

63 | EE | Premal Buch, Amit Narayan, A. Richard Newton, Alberto L. Sangiovanni-Vincentelli: Logic synthesis for large pass transistor circuits. ICCAD 1997: 663-670 |

62 | EE | Premal Buch, Christopher K. Lennard, A. Richard Newton: Engineering change for power optimization using global sensitivity and synthesis flexibility. ISLPED 1997: 88-91 |

61 | EE | Kurt Keutzer, A. Richard Newton, Narendra V. Shenoy: The future of logic synthesis and physical design in deep-submicron process geometries. ISPD 1997: 218-224 |

60 | Juan Bicarregui, D. L. Clutterbuck, Gavin R. Finnie, Howard P. Haughton, Kevin Lano, H. Lesan, D. W. R. M. Marsh, B. M. Matthews, Michael R. Moulding, A. Richard Newton, Brian Ritchie, T. G. A. Rushton, P. N. Scharbach: Formal methods into practice: case studies in the application of the B method. IEE Proceedings - Software 144(2): 119-133 (1997) | |

1996 | ||

59 | EE | Christopher K. Lennard, Premal Buch, A. Richard Newton: Logic synthesis using power-sensitive don't care sets. ISLPED 1996: 293-296 |

58 | EE | Christopher K. Lennard, A. Richard Newton: On estimation accuracy for guiding low-power resynthesis. IEEE Trans. on CAD of Integrated Circuits and Systems 15(6): 644-664 (1996) |

1995 | ||

57 | EE | Christopher K. Lennard, A. Richard Newton: An estimation technique to guide low power resynthesis algorithms. ISLPD 1995: 227-232 |

1994 | ||

56 | EE | Ernst Siepmann, A. Richard Newton: TOBAC: A Test Case Browser for Testing Object-Oriented Software. ISSTA 1994: 154-168 |

55 | EE | Jaijeet S. Roychowdhury, A. Richard Newton, Donald O. Pederson: Algorithms for the transient simulation of lossy interconnect. IEEE Trans. on CAD of Integrated Circuits and Systems 13(1): 96-104 (1994) |

1993 | ||

54 | Abdul A. Malik, Robert K. Brayton, A. Richard Newton, Alberto L. Sangiovanni-Vincentelli: Two-Level Minimization of Multivalued Functions with Large Offsets. IEEE Trans. Computers 42(11): 1325-1342 (1993) | |

53 | EE | Abhijit Ghosh, Srinivas Devadas, A. Richard Newton: Sequential test generation and synthesis for testability at the register-transfer and logic levels. IEEE Trans. on CAD of Integrated Circuits and Systems 12(5): 579-598 (1993) |

1992 | ||

52 | EE | Jaijeet S. Roychowdhury, A. Richard Newton, Donald O. Pederson: Simulating Lossy Interconnect with High Frequency Nonidealities in Linear Time. DAC 1992: 75-80 |

51 | EE | Takayasu Sakurai, Bill Lin, A. Richard Newton: Fast simulated diffusion: an optimization algorithm for multiminimum problems and its application to MOSFET model parameter extraction. IEEE Trans. on CAD of Integrated Circuits and Systems 11(2): 228-234 (1992) |

50 | EE | Abhijit Ghosh, Srinivas Devadas, A. Richard Newton: Heuristic minimization of Boolean relations using testing techniques. IEEE Trans. on CAD of Integrated Circuits and Systems 11(9): 1166-1172 (1992) |

1991 | ||

49 | A. Richard Newton: Framework Standards: How Important are They? (Panel Abstract). DAC 1991: 315 | |

48 | Chuck Kring, A. Richard Newton: A Cell-Replicating Approach to Minicut-Based Circuit Partitioning. ICCAD 1991: 2-5 | |

47 | Jaijeet S. Roychowdhury, A. Richard Newton, Donald O. Pederson: An Impulse-Response Based Linear Time-Complexity Algorithm for Lossy Interconnect Simulation. ICCAD 1991: 62-65 | |

46 | Bill Lin, A. Richard Newton: Implicit Manipulation of Equivalence Classes Using Binary Decision Diagrams. ICCD 1991: 81-85 | |

45 | A. Richard Newton: Has CAD for VLSI Reached a Dead End? VLSI 1991: 187-192 | |

44 | Bill Lin, A. Richard Newton: Exact Redundant State Registers Removal Based on Binary Decision Diagrams. VLSI 1991: 277-286 | |

43 | EE | Srinivas Devadas, A. Richard Newton: Exact algorithms for output encoding, state assignment, and four-level Boolean minimization. IEEE Trans. on CAD of Integrated Circuits and Systems 10(1): 13-27 (1991) |

42 | EE | Xuejun Du, Gary D. Hachtel, Bill Lin, A. Richard Newton: MUSE: a multilevel symbolic encoding algorithm for state assignment. IEEE Trans. on CAD of Integrated Circuits and Systems 10(1): 28-38 (1991) |

41 | EE | Pranav Ashar, Srinivas Devadas, A. Richard Newton: Optimum and heuristic algorithms for an approach to finite state machine decomposition. IEEE Trans. on CAD of Integrated Circuits and Systems 10(3): 296-310 (1991) |

40 | EE | Pranav Ashar, Srinivas Devadas, A. Richard Newton: Irredundant interacting sequential machines via optimal logic synthesis. IEEE Trans. on CAD of Integrated Circuits and Systems 10(3): 311-325 (1991) |

39 | EE | Seung Ho Hwang, A. Richard Newton: An efficient verifier for finite state machines. IEEE Trans. on CAD of Integrated Circuits and Systems 10(3): 326-334 (1991) |

38 | EE | Abdul A. Malik, Robert K. Brayton, A. Richard Newton, Alberto L. Sangiovanni-Vincentelli: Reduced offsets for minimization of binary-valued functions. IEEE Trans. on CAD of Integrated Circuits and Systems 10(4): 413-426 (1991) |

37 | EE | Abhijit Ghosh, Srinivas Devadas, A. Richard Newton: Test generation and verification for highly sequential circuits. IEEE Trans. on CAD of Integrated Circuits and Systems 10(5): 652-667 (1991) |

1990 | ||

36 | EE | Andrea Casotto, A. Richard Newton, Alberto L. Sangiovanni-Vincentelli: Design Management Based on Design Traces. DAC 1990: 136-141 |

35 | EE | Abhijit Ghosh, Srinivas Devadas, A. Richard Newton: Verification of Interacting Sequential Circuits. DAC 1990: 213-219 |

34 | EE | Abdul A. Malik, Robert K. Brayton, A. Richard Newton, Alberto L. Sangiovanni-Vincentelli: Reduced Offsets for Two-Level Multi-Valued Logic Minimization. DAC 1990: 290-296 |

33 | A. Richard Newton: Standards, Openness and Design Environments in Electronic Design Automation (Panel Abstract). DAC 1990: 497-498 | |

32 | EE | Abhijit Ghosh, Srinivas Devadas, A. Richard Newton: Sequential Test Generation at the Register-Transfer and Logic Levels. DAC 1990: 580-586 |

31 | EE | Pranav Ashar, Srinivas Devadas, A. Richard Newton: A Unified Approach to the Decomposition and Re-Decomposition of Sequential Machines. DAC 1990: 601-606 |

30 | EE | Gregory S. Whitcomb, A. Richard Newton: Abstract Data Types and High-Level Synthesis. DAC 1990: 680-685 |

29 | Bill Lin, Hervé J. Touati, A. Richard Newton: Don't Care Minimization of Multi-Level Sequential Logic Networks. ICCAD 1990: 414-417 | |

28 | Pranav Ashar, Abhijit Ghosh, Srinivas Devadas, A. Richard Newton: Implicit State Transition Graphs: Applications to Sequential Logic Synthesis and Test. ICCAD 1990: 84-87 | |

27 | Brian W. O'Krafka, A. Richard Newton: An Empirical Evaluation of Two Memory-Efficient Directory Methods. ISCA 1990: 138-147 | |

26 | EE | Srinivas Devadas, Hi-Keung Tony Ma, A. Richard Newton, Alberto L. Sangiovanni-Vincentelli: Irredundant sequential machines via optimal logic synthesis. IEEE Trans. on CAD of Integrated Circuits and Systems 9(1): 8-18 (1990) |

25 | EE | Bill Lin, A. Richard Newton: A circuit disassembly technique for synthesizing symbolic layouts from mask descriptions. IEEE Trans. on CAD of Integrated Circuits and Systems 9(9): 959-969 (1990) |

24 | EE | Srinivas Devadas, Hi-Keung Tony Ma, A. Richard Newton: Redundancies and don't cares in sequential logic synthesis. J. Electronic Testing 1(1): 15-30 (1990) |

1989 | ||

23 | Srinivas Devadas, Hi-Keung Tony Ma, A. Richard Newton: Redundancies and Don't Cares in Sequential Logic Synthesis. ITC 1989: 491-500 | |

22 | EE | Young Hwan Kim, Seung Ho Hwang, A. Richard Newton: Electrical-logic simulation and its applications. IEEE Trans. on CAD of Integrated Circuits and Systems 8(1): 8-22 (1989) |

21 | EE | Srinivas Devadas, Hi-Keung Tony Ma, A. Richard Newton, Alberto L. Sangiovanni-Vincentelli: A synthesis and optimization procedure for fully and easily testable sequential machines. IEEE Trans. on CAD of Integrated Circuits and Systems 8(10): 1100-1107 (1989) |

20 | EE | Srinivas Devadas, A. Richard Newton: Decomposition and factorization of sequential finite state machines. IEEE Trans. on CAD of Integrated Circuits and Systems 8(11): 1206-1217 (1989) |

19 | EE | Resve A. Saleh, A. Richard Newton: The exploitation of latency and multirate behavior using nonlinear relaxation for circuit simulation. IEEE Trans. on CAD of Integrated Circuits and Systems 8(12): 1286-1298 (1989) |

18 | EE | Srinivas Devadas, A. Richard Newton: Algorithms for hardware allocation in data path synthesis. IEEE Trans. on CAD of Integrated Circuits and Systems 8(7): 768-781 (1989) |

1988 | ||

17 | EE | A. Richard Newton: Twenty-Five Years of Electronic Design Automation. DAC 1988: 2 |

16 | Srinivas Devadas, Hi-Keung Tony Ma, A. Richard Newton, Alberto L. Sangiovanni-Vincentelli: Synthesis and Optimization Procedures for Fully and Easily Testable Sequential Machines. ITC 1988: 621-630 | |

15 | Hi-Keung Tony Ma, A. Richard Newton, Srinivas Devadas, Alberto L. Sangiovanni-Vincentelli: An Incomplete Scan Design Approach to Test Generation for Sequential Machines. ITC 1988: 730-734 | |

14 | EE | Hi-Keung Tony Ma, Srinivas Devadas, A. Richard Newton, Alberto L. Sangiovanni-Vincentelli: Test generation for sequential circuits. IEEE Trans. on CAD of Integrated Circuits and Systems 7(10): 1081-1093 (1988) |

13 | EE | Srinivas Devadas, Hi-Keung Tony Ma, A. Richard Newton, Alberto L. Sangiovanni-Vincentelli: MUSTANG: state assignment of finite state machines targeting multilevel logic implementations. IEEE Trans. on CAD of Integrated Circuits and Systems 7(12): 1290-1300 (1988) |

12 | EE | Srinivas Devadas, Hi-Keung Tony Ma, A. Richard Newton: On the verification of sequential machines at differing levels of abstraction. IEEE Trans. on CAD of Integrated Circuits and Systems 7(6): 713-722 (1988) |

1987 | ||

11 | EE | Srinivas Devadas, Hi-Keung Tony Ma, A. Richard Newton: On the Verification of Sequential Machines at Differing Levels of Abstraction. DAC 1987: 271-276 |

10 | EE | Bill Lin, A. Richard Newton: KAHLUA: A Hierarchical Circuit Disassembler. DAC 1987: 311-317 |

9 | EE | Srinivas Devadas, A. Richard Newton: Topological Optimization of Multiple-Level Array Logic. IEEE Trans. on CAD of Integrated Circuits and Systems 6(6): 915-941 (1987) |

1986 | ||

8 | EE | Seung Ho Hwang, Young Hwan Kim, A. Richard Newton: An accuration delay modeling technique for switch-level timing verification. DAC 1986: 227-233 |

7 | EE | George K. Jacob, A. Richard Newton, Donald O. Pederson: An empirical analysis of the performance of a multiprocessor-based circuit simulator. DAC 1986: 588-593 |

6 | EE | Srinivas Devadas, A. Richard Newton: GENIE: a generalized array optimizer for VLSI synthesis. DAC 1986: 631-637 |

5 | Carlo H. Séquin, A. Richard Newton, Alberto L. Sangiovanni-Vincentelli: Highlights of VLSI Research at Berkeley. FJCC 1986: 894-897 | |

1984 | ||

4 | EE | A. Richard Newton, Alberto L. Sangiovanni-Vincentelli: Relaxation-Based Electrical Simulation. IEEE Trans. on CAD of Integrated Circuits and Systems 3(4): 308-331 (1984) |

1983 | ||

3 | EE | Giovanni De Micheli, A. Richard Newton, Alberto L. Sangiovanni-Vincentelli: Symmetric Displacement Algorithms for the Timing Analysis of Large Scale Circuits. IEEE Trans. on CAD of Integrated Circuits and Systems 2(3): 167-180 (1983) |

1982 | ||

2 | Kenneth H. Keller, A. Richard Newton: KIC2: A Low-Cost, Interactive Editor for Integrated Circuit Design. COMPCON 1982: 305-306 | |

1 | EE | Gary D. Hachtel, A. Richard Newton, Alberto L. Sangiovanni-Vincentelli: An Algorithm for Optimal PLA Folding. IEEE Trans. on CAD of Integrated Circuits and Systems 1(2): 63-77 (1982) |