| * | 2009 |
|---|
| 7 | EE | Roope Kaivola,
Rajnish Ghughal,
Naren Narasimhan,
Amber Telfer,
Jesse Whittemore,
Sudhindra Pandav,
Anna Slobodová,
Christopher Taylor,
Vladimir Frolov,
Erik Reeber,
Armaghan Naik:
Replacing Testing with Formal Verification in Intel CoreTM i7 Processor Execution Engine Validation.
CAV 2009: 414-429 |
| 2002 |
|---|
| 6 | EE | Roope Kaivola,
Naren Narasimhan:
Formal Verification of the Pentium ® 4 Floating-Point Multiplier.
DATE 2002: 20-27 |
| 2001 |
|---|
| 5 | | Naren Narasimhan,
Elena Teica,
Rajesh Radhakrishnan,
Sriram Govindarajan,
Ranga Vemuri:
Theorem Proving Guided Development of Formal Assertions in a Resource-Constrained Scheduler for High-Level Synthesis.
Formal Methods in System Design 19(3): 237-273 (2001) |
| 1998 |
|---|
| 4 | EE | Naren Narasimhan,
Ranga Vemuri:
On the Effectiveness of Theorem Proving Guided Discovery of Formal Assertions for a Register Allocator in a High-Level Synthesis System.
TPHOLs 1998: 367-386 |
| 1996 |
|---|
| 3 | EE | Naren Narasimhan,
Vinoo Srinivasan,
Madhavi Vootukuru,
Jeffrey Walrath,
Sriram Govindarajan,
Ranga Vemuri:
Rapid Prototyping of Reconfigurable Coprocessors.
ASAP 1996: 303-312 |
| 2 | | Naren Narasimhan,
Ranga Vemuri:
Specification of Control Flow Properties for Verification of Synthesized VHDL Designs.
FMCAD 1996: 327-345 |
| 1 | EE | Naren Narasimhan,
Ranga Vemuri,
Jay Roy:
Synchronous Controller Models for Synthesis from Communicating VHDL Processes.
VLSI Design 1996: 198-204 |
