| * | 2009 |
|---|
| 11 | EE | Hiroki Morizumi:
Limiting Negations in Formulas.
ICALP (1) 2009: 701-712 |
| 10 | EE | Kazuo Iwama,
Hiroki Morizumi,
Jun Tarui:
Negation-Limited Complexity of Parity and Inverters.
Algorithmica 54(2): 256-267 (2009) |
| 9 | EE | Hiroki Morizumi,
Jun Tarui:
Linear-size log-depth negation-limited inverter for k-tonic binary sequences.
Theor. Comput. Sci. 410(11): 1054-1060 (2009) |
| 8 | EE | Hiroki Morizumi:
Limiting negations in non-deterministic circuits.
Theor. Comput. Sci. 410(38-40): 3988-3994 (2009) |
| 2008 |
|---|
| 7 | EE | Hiroki Morizumi,
Genki Suzuki:
Negation-Limited Inverters of Linear Size.
ISAAC 2008: 605-614 |
| 6 | EE | Hiroki Morizumi:
A Note on the Inversion Complexity of Boolean Functions in Boolean Formulas
CoRR abs/0811.0699: (2008) |
| 5 | EE | Kazuo Iwama,
Hiroki Morizumi,
Jun Tarui:
Reductions for monotone Boolean circuits.
Theor. Comput. Sci. 408(2-3): 208-212 (2008) |
| 2007 |
|---|
| 4 | EE | Hiroki Morizumi,
Jun Tarui:
Linear-Size Log-Depth Negation-Limited Inverter for k -Tonic Binary Sequences.
TAMC 2007: 605-615 |
| 2006 |
|---|
| 3 | EE | Kazuo Iwama,
Hiroki Morizumi,
Jun Tarui:
Negation-Limited Complexity of Parity and Inverters.
ISAAC 2006: 223-232 |
| 2 | EE | Kazuo Iwama,
Hiroki Morizumi:
Reductions for Monotone Boolean Circuits.
MFCS 2006: 540-548 |
| 2002 |
|---|
| 1 | EE | Kazuo Iwama,
Hiroki Morizumi:
An Explicit Lower Bound of 5n - o(n) for Boolean Circuits.
MFCS 2002: 353-364 |
