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Renate Merker Vis

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*2008
37EERainer Schaffer, Renate Merker, Frank Hannig, Jürgen Teich: Utilization of all Levels of Parallelism in a Processor Array with Subword Parallelism. DSD 2008: 391-398
36EEJosef Angermeier, Mateusz Majer, Jürgen Teich, Lars Braun, T. Schwalb, Philipp Graf, Michael Hübner, Jürgen Becker, Enno Lübbers, Marco Platzner, Christopher Claus, Walter Stechele, Andreas Herkersdorf, Markus Rullmann, Renate Merker: Fine grain reconfigurable architectures. FPL 2008: 348
2007
35EEMarkus Rullmann, Renate Merker: A Reconfiguration Aware Circuit Mapper for FPGAs. IPDPS 2007: 1-8
34 Hritam Dutta, Frank Hannig, Alexey Kupriyanov, Dmitrij Kissler, Jürgen Teich, Rainer Schaffer, Sebastian Siegel, Renate Merker, Bernard Pottier: Massively Parallel Processor Architectures: A Co-design Approach. ReCoSoC 2007: 61-68
2006
33 Markus Rullmann, Renate Merker: Design and Implementation of Reconfigurable Tasks with Minimum Reconfiguration Overhead. ARCS Workshops 2006: 132-141
32EESebastian Siegel, Renate Merker: Minimum Cost for Channels and Registers in Processor Arrays by Avoiding Redundancy. ASAP 2006: 28-32
31EESebastian Siegel, Renate Merker: Efficient Realization of Data Dependencies in Algorithm Partitioning Under Resource Constraints. Euro-Par 2006: 1181-1191
30EERainer Schaffer, Renate Merker: Parameterized Mapping of Algorithms onto Processor Arrays with Sub-Word Parallelism. ICSAMOS 2006: 99-106
29EEMarkus Rullmann, Renate Merker: Maximum edge matching for reconfigurable computing. IPDPS 2006
28EERainer Schaffer, Renate Merker, Francky Catthoor: Derivation of Packing Instructions for Exploiting Sub-Word Parallelism. PARELEC 2006: 167-172
27EESebastian Siegel, Rainer Schaffer, Renate Merker: Efficient Realization of the Edge Detection Algorithm on a Processor Array with Parallelism on Two Levels. PARELEC 2006: 173-180
2005
26EEMarkus Rullmann, Sebastian Siegel, Renate Merker: Optimization of Reconfiguration Overhead by Algorithmic Transformations and Hardware Matching. IPDPS 2005
25 Frank Hannig, Hritam Dutta, Alexey Kupriyanov, Jürgen Teich, Rainer Schaffer, Sebastian Siegel, Renate Merker, Ronan Keryell, Bernard Pottier, Daniel Chillet, Daniel Menard, Olivier Sentieys: Co-Design of Massively Parallel Embedded Processor Architectures. ReCoSoC 2005: 27-34
2004
24EESebastian Siegel, Renate Merker: Optimized Data-Reuse in Processor Arrays. ASAP 2004: 315-325
23EEJan Müller, Dirk Fimmel, Renate Merker: Optimal Loop Scheduling with Register Constraints Using Flow Graphs. ISPAN 2004: 180-186
22EEJan Müller, Dirk Fimmel, Renate Merker: Exploitation of Instruction-Level Parallelism for Optimal Loop Scheduling. Interaction between Compilers and Computer Architectures 2004: 13-21
21EEMathias Kortke, Jan Müller, Rainer Schaffer, Sebastian Siegel, Renate Merker, Jürgen Kelber: A Parallel Hardware-Software System for Signal Processing Algorithms. PARELEC 2004: 215-220
20EESebastian Siegel, Renate Merker: Algorithm Partitioning including Optimized Data-Reuse for Processor Arrays. PARELEC 2004: 85-90
2003
19EERainer Schaffer, Renate Merker, Francky Catthoor: Causality Constraints for Processor Architectures with Sub-Word Parallelism. DSD 2003: 82-89
18EEJan Müller, Dirk Fimmel, Renate Merker, Rainer Schaffer: A Hardware-Software System for Tomographic Reconstruction. Journal of Circuits, Systems, and Computers 12(2): 203- (2003)
2002
17EERainer Schaffer, Renate Merker, Francky Catthoor: Systematic Design of Programs with Sub-Word Parallelism. PARELEC 2002: 393-398
2001
16 Dirk Fimmel, Renate Merker: Design of Processor Arrays for Reconfigurable Architectures. The Journal of Supercomputing 19(1): 41-56 (2001)
2000
15EEMathias Kortke, Thomas Schmitt, Renate Merker: Application of Partitioning Methods for the Design of Parallel Programs for a System of Digital Signal Processors. PARELEC 2000: 139-143
14EERenate Merker: High-Level Synthesis System (HLDESA) for Processor Arrays. PARELEC 2000: 89-93
13EERainer Schaffer, Renate Merker, Francky Catthoor: Combining Background Memory Management and Regular Array Co-Partitioning, Illustrated on a Full Motion Estimation Kernel. VLSI Design 2000: 104-109
12 Rainer Schaffer, Francky Catthoor, Renate Merker: Combining Background Memory Management and Regular Array Co-Partitioning, Illustrated on a Full Motion Estimation Kernel. Parallel Algorithms Appl. 15(3-4): 201-228 (2000)
1999
11EEThomas Schmitt, Dirk Fimmel, Mathias Kortke, Renate Merker: Parallel Processor Array for Tomographic Reconstruction Algorithms. EUROCAST 1999: 127-141
10EEMathias Kortke, Dirk Fimmel, Renate Merker: Parallelization of Algorithms for a System of Digital Signal Processors. EUROMICRO 1999: 1046-1050
9EEDirk Fimmel, Renate Merker: Localization of Data Transfer in Processor Arrays. Euro-Par 1999: 401-408
8EEUwe Eckhardt, Renate Merker: Hierarchical algorithm partitioning at system level for an improved utilization of memory structures. IEEE Trans. on CAD of Integrated Circuits and Systems 18(1): 14-24 (1999)
1998
7EEDirk Fimmel, Renate Merker: Design of Processor Arrays for Real-Time Applications. Euro-Par 1998: 1018-1028
1997
6EEDirk Fimmel, Renate Merker: Determination of the Processor Functionality in the Design of Processor Arrays. ASAP 1997: 199-208
5EEUwe Eckhardt, Renate Merker: Scheduling in Co-Partitioned Array Architectures. ASAP 1997: 219-228
4EERenate Merker, Ulrich Eckhardt, Dirk Fimmel, H. Schreiber: A System for Designing Parallel Processor Arrays. EUROCAST 1997: 3-12
3EEUwe Eckhardt, Renate Merker: Optimization of the Background Memory Utilization by Partitioning. ISSS 1997: 82-89
1996
2EEDirk Fimmel, Renate Merker: Propagation of I/O-Variables in Massively Parallel Processor Arrays. PDP 1996: 501-509
1994
1 A. Schubert, Renate Merker, H. Schreiber: Systematic Generation of a Variety of Processor Arrays. Parcella 1994: 267-276

Coauthor Index

1Josef Angermeier [36]
2Jürgen Becker [36]
3Lars Braun [36]
4Francky Catthoor [12] [13] [17] [19] [28]
5Daniel Chillet [25]
6Christopher Claus [36]
7Hritam Dutta [25] [34]
8Ulrich Eckhardt [4]
9Uwe Eckhardt [3] [5] [8]
10Dirk Fimmel [2] [4] [6] [7] [9] [10] [11] [16] [18] [22] [23]
11Philipp Graf [36]
12Frank Hannig [25] [34] [37]
13Andreas Herkersdorf [36]
14Michael Hübner [36]
15Jürgen Kelber [21]
16Ronan Keryell [25]
17Dmitrij Kissler [34]
18Mathias Kortke [10] [11] [15] [21]
19Alexey Kupriyanov [25] [34]
20Enno Lübbers [36]
21Mateusz Majer [36]
22Daniel Menard [25]
23Jan Müller [18] [21] [22] [23]
24Marco Platzner [36]
25Bernard Pottier [25] [34]
26Markus Rullmann [26] [29] [33] [35] [36]
27Rainer Schaffer [12] [13] [17] [18] [19] [21] [25] [27] [28] [30] [34] [37]
28Thomas Schmitt [11] [15]
29H. Schreiber [1] [4]
30A. Schubert [1]
31T. Schwalb [36]
32Olivier Sentieys [25]
33Sebastian Siegel [20] [21] [24] [25] [26] [27] [31] [32] [34]
34Walter Stechele [36]
35Jürgen Teich [25] [34] [36] [37]

Colors in the list of coauthors

Copyright © Tue Nov 3 08:52:44 2009 by Michael Ley (ley@uni-trier.de)