dblp.uni-trier.dewww.uni-trier.de

Jose Manuel Mendias Vis

José M. Mendías

List of publications from the DBLP Bibliography Server - FAQ
Coauthor Index - Ask others: ACM DL/Guide - CiteSeerX - CSB - MetaPress - Google - Bing - Yahoo
Home Page

*2009
55EEMaría C. Molina, Rafael Ruiz-Sautua, Pedro Garcia-Repetto, José M. Mendías: Performance-driven scheduling of behavioural specifications. Integration 42(3): 294-303 (2009)
2008
54EEAlexandros Bartzas, Miguel Peon-Quiros, Stylianos Mamagkakis, Francky Catthoor, Dimitrios Soudris, Jose Manuel Mendias: Enabling run-time memory data transfer optimizations at the system level with automated extraction of embedded software metadata information. ASP-DAC 2008: 434-439
53EEAlberto A. Del Barrio, María C. Molina, Jose Manuel Mendias, Esther Andres Perez, Román Hermida: Restricted Chaining and Fragmentation Techniques in Power Aware High Level Synthesis. DSD 2008: 267-273
52EEAlberto A. Del Barrio, María C. Molina, Jose Manuel Mendias, Esther Andres Perez, Román Hermida, Francisco Tirado: Applying speculation techniques to implement functional units. ICCD 2008: 74-80
2007
51EESalvatore Carta, Andrea Acquaviva, Pablo Garcia Del Valle, David Atienza, Giovanni De Micheli, Fernando Rincón, Luca Benini, Jose Manuel Mendias: Multi-processor operating system emulation framework with thermal feedback for systems-on-chip. ACM Great Lakes Symposium on VLSI 2007: 311-316
50EEMaría C. Molina, Rafael Ruiz-Sautua, Jose Manuel Mendias, Román Hermida: Area optimization of multi-cycle operators in high-level synthesis. DATE 2007: 449-454
49EEMiguel Peon-Quiros, Alexandros Bartzas, Stylianos Mamagkakis, Francky Catthoor, Jose Manuel Mendias, Dimitrios Soudris: Direct Memory Access Optimization in Wireless Terminals for Reduced Memory Latency and Energy Consumption. PATMOS 2007: 373-383
48EEDavid Atienza, Pablo Garcia Del Valle, Giacomo Paci, Francesco Poletti, Luca Benini, Giovanni De Micheli, Jose Manuel Mendias, Román Hermida: HW-SW emulation framework for temperature-aware design in MPSoCs. ACM Trans. Design Autom. Electr. Syst. 12(3): (2007)
47EERafael Ruiz-Sautua, María C. Molina, José M. Mendías, Román Hermida: Behavioural Transformation to Improve Circuit Performance in High-Level Synthesis CoRR abs/0710.4801: (2007)
46EERafael Ruiz-Sautua, María C. Molina, Jose Manuel Mendias: Exploiting Bit-Level Delay Calculations to Soften Read-After-Write Dependences in Behavioral Synthesis. IEEE Trans. on CAD of Integrated Circuits and Systems 26(9): 1589-1601 (2007)
2006
45EEDavid Atienza, Pablo Garcia Del Valle, Giacomo Paci, Francesco Poletti, Luca Benini, Giovanni De Micheli, Jose Manuel Mendias: A fast HW/SW FPGA-based thermal emulation framework for multi-processor system-on-chip. DAC 2006: 618-623
44EERafael Ruiz-Sautua, María C. Molina, José M. Mendías, Román Hermida: Pre-synthesis optimization of multiplications to improve circuit performance. DATE 2006: 1306-1311
43EEStylianos Mamagkakis, David Atienza, Christophe Poucet, Francky Catthoor, Dimitrios Soudris, Jose Manuel Mendias: Automated exploration of pareto-optimal configurations in parameterized dynamic memory allocation for embedded systems. DATE 2006: 874-875
42EEPablo Garcia Del Valle, David Atienza, Ivan Magan, Javier Garcia Flores, Esther Andres Perez, Jose Manuel Mendias, Luca Benini, Giovanni De Micheli: A Complete Multi-Processor System-on-Chip FPGA-Based Emulation Framework. VLSI-SoC 2006: 140-145
41EEDavid Atienza, Jose Manuel Mendias, Stylianos Mamagkakis, Dimitrios Soudris, Francky Catthoor: Systematic dynamic memory management design methodology for reduced memory footprint. ACM Trans. Design Autom. Electr. Syst. 11(2): 465-489 (2006)
40EEMaría C. Molina, Rafael Ruiz-Sautua, Jose Manuel Mendias, Román Hermida: Bitwise scheduling to balance the computational cost of behavioral specifications. IEEE Trans. on CAD of Integrated Circuits and Systems 25(1): 31-46 (2006)
39EEDavid Atienza, Stylianos Mamagkakis, Francesco Poletti, Jose Manuel Mendias, Francky Catthoor, Luca Benini, Dimitrios Soudris: Efficient system-level prototyping of power-aware dynamic memory managers for embedded systems. Integration 39(2): 113-130 (2006)
2005
38EERafael Ruiz-Sautua, María C. Molina, José M. Mendías, Román Hermida: Arrival time aware scheduling to minimize clock cycle length. ASP-DAC 2005: 1018-1021
37EERafael Ruiz-Sautua, María C. Molina, José M. Mendías, Román Hermida: Behavioural Transformation to Improve Circuit Performance in High-Level Synthesis. DATE 2005: 1252-1257
36EENicolas Genko, David Atienza, Giovanni De Micheli, Jose Manuel Mendias, Román Hermida, Francky Catthoor: A Complete Network-On-Chip Emulation Framework. DATE 2005: 246-251
35 Rafael Ruiz-Sautua, María C. Molina, Jose Manuel Mendias, Román Hermida: Performance-driven read-after-write dependencies softening in high-level synthesis. ICCAD 2005: 7-12
34EENicolas Genko, David Atienza, Giovanni De Micheli, Luca Benini, Jose Manuel Mendias, Román Hermida, Francky Catthoor: A novel approach for network on chip emulation. ISCAS (3) 2005: 2365-2368
33 J. B. Pérez-Ramas, David Atienza, Mercedes Peón, Ivan Magan, Jose Manuel Mendias, Román Hermida: Versatile FPGA-Based Functional Validation Framework for Networks-on-Chip Interconnections Designs. PARCO 2005: 769-776
32EEJosé Manuel Velasco, David Atienza, Katzalin Olcoz, Francky Catthoor, Francisco Tirado, Jose Manuel Mendias: Energy Characterization of Garbage Collectors for Dynamic Applications on Embedded Systems. PATMOS 2005: 69-78
31EEStylianos Mamagkakis, Christos Baloukas, David Atienza, Francky Catthoor, Dimitrios Soudris, José M. Mendías, Antonios Thanailakis: Reducing Memory Fragmentation with Performance-Optimized Dynamic Memory Allocators in Network Applications. WWIC 2005: 354-364
30EEMarc Leeman, David Atienza, Geert Deconinck, Vincenzo De Florio, José M. Mendías, Chantal Ykman-Couvreur, Francky Catthoor, Rudy Lauwereins: Methodology for Refinement and Optimisation of Dynamic Memory Management for Embedded Systems in Multimedia Applications. VLSI Signal Processing 40(3): 383-396 (2005)
2004
29EEFrancesco Poletti, Paul Marchal, David Atienza, Luca Benini, Francky Catthoor, Jose Manuel Mendias: An integrated hardware/software approach for run-time scratchpad management. DAC 2004: 238-243
28EEDavid Atienza, Stylianos Mamagkakis, Francky Catthoor, Jose Manuel Mendias, Dimitrios Soudris: Dynamic Memory Management Design Methodology for Reduced Memory Footprint in Multimedia and Wireless Network Applications. DATE 2004: 532-537
27EEMaría C. Molina, Rafael Ruiz-Sautua, José M. Mendías, Román Hermida: Behavioural Bitwise Scheduling Based on Computational Effort Balancing. DATE 2004: 684-685
26 David Atienza, Stylianos Mamagkakis, Francky Catthoor, Jose Manuel Mendias, Dimitrios Soudris: Reducing memory accesses with a system-level design methodology in customized dynamic memory management. ESTImedia 2004: 93-98
25 David Atienza, Marc Leeman, Francky Catthoor, Geert Deconinck, Jose Manuel Mendias, Vincenzo De Florio, Rudy Lauwereins: Fast prototyping and refinement of complex dynamic data types in multimedia applications for consumer embedded devices. ICME 2004: 803-806
24EEMaría C. Molina, Rafael Ruiz-Sautua, José M. Mendías, Román Hermida: Behavioural Scheduling to Balance the Bit-Level Computational Effort. ISVLSI 2004: 99-104
23EEJosé Manuel Velasco, David Atienza, Francky Catthoor, Francisco Tirado, Katzalin Olcoz, Jose Manuel Mendias: Garbage Collector Refinement for New Dynamic Multimedia Applications on Embedded Systems. Interaction between Compilers and Computer Architectures 2004: 25-32
22EEDavid Atienza, Stylianos Mamagkakis, Francky Catthoor, Jose Manuel Mendias, Dimitrios Soudris: Modular Construction and Power Modelling of Dynamic Memory Managers for Embedded Systems. PATMOS 2004: 510-520
21EEStylianos Mamagkakis, Alexandros Mpartzas, Georgios Pouiklis, David Atienza, Francky Catthoor, Dimitrios Soudris, Jose Manuel Mendias, Antonios Thanailakis: Design of Energy Efficient Wireless Networks Using Dynamic Data Type Refinement Methodology. WWIC 2004: 26-37
20 Edgar G. Daylight, David Atienza, Arnout Vandecappelle, Francky Catthoor, José M. Mendías: Memory-access-aware data structure transformations for embedded software with dynamic data accesses. IEEE Trans. VLSI Syst. 12(3): 269-280 (2004)
2003
19EEMaría C. Molina, José M. Mendías, Román Hermida: High-Level Allocation to Minimize Internal Hardware Wastage. DATE 2003: 10264-10269
18EEMarc Leeman, David Atienza, Francky Catthoor, Vincenzo De Florio, Geert Deconinck, Jose Manuel Mendias, Rudy Lauwereins: Power Estimation Approach of Dynamic Data Storage on a Hardware Software Boundary Level. PATMOS 2003: 289-298
17EEMaría C. Molina, Rafael Ruiz-Sautua, José M. Mendías, Román Hermida: Bit-Level Allocation for Low Power in Behavioural High-Level Synthesis. PATMOS 2003: 617-627
16EEMaría C. Molina, José M. Mendías, Román Hermida: Allocation of multiple precision behaviors for maximal bit level reuse of hardware resources. Journal of Systems Architecture 49(12-15): 505-519 (2003)
2002
15EEMaría C. Molina, José M. Mendías, Román Hermida: High-level synthesis of multiple-precision circuitsindependent of data-objects length. DAC 2002: 612-615
14EEOlga Peñalba, José M. Mendías, Román Hermida: Maximizing Conditonal Reuse by Pre-Synthesis Transformations. DATE 2002: 1097
13EEMaría C. Molina, José M. Mendías, Román Hermida: Multiple-Precision Circuits Allocation Independent of Data-Objects Length. DATE 2002: 909-915
12EEAitor Ibarra, José M. Mendías, Juan Lanchares, José Ignacio Hidalgo, Román Hermida: Optimization of Equational Specifications Using Genetic Techniques. DSD 2002: 252-258
11EEJosé M. Mendías, Román Hermida, María C. Molina, Olga Peñalba: Efficient Verification of Scheduling, Allocation and Binding in High-Level Synthesis. DSD 2002: 308-315
10EEOlga Peñalba, José M. Mendías, Román Hermida: Source Code Transformation to Improve Conditional Hardware Reuse. DSD 2002: 324-331
9EEMaría C. Molina, José M. Mendías, Román Hermida: Bit-Level Allocation of Multiple-Precision Specifications. DSD 2002: 385-392
8EEAitor Ibarra, Juan Lanchares, Jose Manuel Mendias, José Ignacio Hidalgo, Román Hermida: Transformation of Equational Specification by Means of Genetic Programming. EuroGP 2002: 248-257
7EEMaría C. Molina, José M. Mendías, Román Hermida: Bit-level scheduling of heterogeneous behavioural specifications. ICCAD 2002: 602-608
6EEJosé M. Mendías, Román Hermida, Olga Peñalba: A study about the efficiency of formal high-level synthesis applied to verification. Integration 31(2): 101-131 (2002)
5EEOlga Peñalba, José M. Mendías, Román Hermida: A global approach to improve conditional hardware reuse in high-level synthesis. Journal of Systems Architecture 47(12): 959-975 (2002)
2000
4EEOlga Peñalba, José M. Mendías, María C. Molina: Execution Condition Analysis in High Level Synthesis: A Unified Approach. ISSS 2000: 73-78
1999
3EEOlga Peñalba, José M. Mendías, Román Hermida: A Unified Algorithm for Mutual Exclusiveness Identification. EUROMICRO 1999: 1504-1510
1998
2EEJosé M. Mendías, Román Hermida: Correct High-Level Synthesis: a Formal Perspective. DATE 1998: 977-978
1997
1EEJosé M. Mendías, Román Hermida, Milagros Fernández: Formal Techniques for Hardware Allocation. VLSI Design 1997: 161-165

Coauthor Index

1Andrea Acquaviva [51]
2David Atienza [18] [20] [21] [22] [23] [25] [26] [28] [29] [30] [31] [32] [33] [34] [36] [39] [41] [42] [43] [45] [48] [51]
3Christos Baloukas [31]
4Alberto A. Del Barrio [52] [53]
5Alexandros Bartzas [49] [54]
6Luca Benini [29] [34] [39] [42] [45] [48] [51]
7Salvatore Carta [51]
8Francky Catthoor [18] [20] [21] [22] [23] [25] [26] [28] [29] [30] [31] [32] [34] [36] [39] [41] [43] [49] [54]
9Edgar G. Daylight [20]
10Geert Deconinck [18] [25] [30]
11Milagros Fernández [1]
12Javier Garcia Flores [42]
13Vincenzo De Florio [18] [25] [30]
14Pedro Garcia-Repetto [55]
15Nicolas Genko [34] [36]
16Román Hermida [1] [2] [3] [5] [6] [7] [8] [9] [10] [11] [12] [13] [14] [15] [16] [17] [19] [24] [27] [33] [34] [35] [36] [37] [38] [40] [44] [47] [48] [50] [52] [53]
17José Ignacio Hidalgo [8] [12]
18Aitor Ibarra [8] [12]
19Juan Lanchares [8] [12]
20Rudy Lauwereins [18] [25] [30]
21Marc Leeman [18] [25] [30]
22Ivan Magan [33] [42]
23Stylianos Mamagkakis (Stelios Mamagkakis) [21] [22] [26] [28] [31] [39] [41] [43] [49] [54]
24Paul Marchal [29]
25Giovanni De Micheli [34] [36] [42] [45] [48] [51]
26María C. Molina [4] [7] [9] [11] [13] [15] [16] [17] [19] [24] [27] [35] [37] [38] [40] [44] [46] [47] [50] [52] [53] [55]
27Alexandros Mpartzas [21]
28Katzalin Olcoz [23] [32]
29Giacomo Paci [45] [48]
30Olga Peñalba [3] [4] [5] [6] [10] [11] [14]
31Mercedes Peón [33]
32Miguel Peon-Quiros [49] [54]
33Esther Andres Perez [42] [52] [53]
34J. B. Pérez-Ramas [33]
35Francesco Poletti [29] [39] [45] [48]
36Christophe Poucet [43]
37Georgios Pouiklis [21]
38Fernando Rincón [51]
39Rafael Ruiz-Sautua [17] [24] [27] [35] [37] [38] [40] [44] [46] [47] [50] [55]
40Dimitrios Soudris (D. J. Soudris) [21] [22] [26] [28] [31] [39] [41] [43] [49] [54]
41Adonios Thanailakis (Antonios Thanailakis) [21] [31]
42Francisco Tirado [23] [32] [52]
43Pablo Garcia Del Valle [42] [45] [48] [51]
44Arnout Vandecappelle [20]
45José Manuel Velasco [23] [32]
46Chantal Ykman-Couvreur [30]

Copyright © Tue Nov 3 08:52:44 2009 by Michael Ley (ley@uni-trier.de)