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Edward J. McCluskey Vis

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*2008
166EEFrançois-Fabien Ferhani, Nirmal R. Saxena, Edward J. McCluskey, Phil Nigh: How Many Test Patterns are Useless? VTS 2008: 23-28
165EEJaekwang Lee, Intaik Park, Edward J. McCluskey: Error Sequence Analysis. VTS 2008: 255-260
164EEIntaik Park, Donghwi Lee, Erik Chmelar, Edward J. McCluskey: Inconsistent Fail due to Limited Tester Timing Accuracy. VTS 2008: 47-52
2007
163EEKyoung Youn Cho, Edward J. McCluskey: Test Set Reordering Using the Gate Exhaustive Test Metric. VTS 2007: 199-204
2006
162EEErik Chmelar, Edward J. McCluskey: Session Abstract. VTS 2006: 156-157
2005
161EEAhmad A. Al-Yamani, Edward J. McCluskey: BIST-Guided ATPG. ISQED 2005: 244-249
160EEIntaik Park, Ahmad A. Al-Yamani, Edward J. McCluskey: Effective TARO Pattern Generation. VTS 2005: 161-166
159EEAhmad A. Al-Yamani, Edward J. McCluskey: Test chip experimental results on high-level structural test. ACM Trans. Design Autom. Electr. Syst. 10(4): 690-701 (2005)
158EEChien-Mo James Li, Edward J. McCluskey: Diagnosis of resistive-open and stuck-open defects in digital CMOS ICs. IEEE Trans. on CAD of Integrated Circuits and Systems 24(11): 1748-1759 (2005)
157EEAhmad A. Al-Yamani, Subhasish Mitra, Edward J. McCluskey: Optimized reseeding by seed ordering and encoding. IEEE Trans. on CAD of Integrated Circuits and Systems 24(2): 264-270 (2005)
2004
156EEKenneth A. Brand, Erik H. Volkerink, Edward J. McCluskey, Subhasish Mitra: Speed Clustering of Integrated Circuits. ITC 2004: 1128-1137
155EEMehdi Baradaran Tahoori, Edward J. McCluskey, Michel Renovell, Philippe Faure: A Multi-Configuration Strategy for an Application Dependent Testing of FPGAs. VTS 2004: 154-170
154EEEdward J. McCluskey, Ahmad A. Al-Yamani, Chien-Mo James Li, Chao-Wen Tseng, Erik H. Volkerink, François-Fabien Ferhani, Edward Li, Subhasish Mitra: ELF-Murphy Data on Defects and Test Sets. VTS 2004: 16-22
153EESubhasish Mitra, Erik H. Volkerink, Edward J. McCluskey, Stefan Eichenberger: Delay Defect Screening using Process Monitor Structures. VTS 2004: 43-52
152EESubhasish Mitra, Wei-Je Huang, Nirmal R. Saxena, Shu-Yi Yu, Edward J. McCluskey: Reconfigurable Architecture for Autonomous Self-Repair. IEEE Design & Test of Computers 21(3): 228-240 (2004)
151EESubhasish Mitra, Nirmal R. Saxena, Edward J. McCluskey: Efficient Design Diversity Estimation for Combinational Circuits. IEEE Trans. Computers 53(11): 1483-1492 (2004)
2003
150EEAhmad A. Al-Yamani, Edward J. McCluskey: Seed encoding with LFSRs and cellular automata. DAC 2003: 560-565
149EEAhmad A. Al-Yamani, Edward J. McCluskey: Built-In Reseeding for Serial Bist. VTS 2003: 63-68
148EEAhmad A. Al-Yamani, Subhasish Mitra, Edward J. McCluskey: Bist Reseeding with very few Seeds. VTS 2003: 69-76
2002
147EEAhmad A. Al-Yamani, Subhasish Mitra, Edward J. McCluskey: Testing Digital Circuits with Constraints. DFT 2002: 195-206
146EESubhasish Mitra, Edward J. McCluskey: Dependable Reconfigurable Computing Design Diversity and Self Repair. Evolvable Hardware 2002: 5
145EEMehdi Baradaran Tahoori, Subhasish Mitra, Shahin Toutounchi, Edward J. McCluskey: Fault Grading FPGA Interconnect Test Configurations. ITC 2002: 608-617
144EEChien-Mo James Li, Edward J. McCluskey: Diagnosis of Sequence-Dependent Chips. VTS 2002: 187-192
143EESubhasish Mitra, Edward J. McCluskey, Samy Makar: Design for Testability and Testing of IEEE 1149.1 Tap Controller. VTS 2002: 247-252
142EEEdward J. McCluskey, Subhasish Mitra, Bob Madge, Peter C. Maxwell, Phil Nigh, Mike Rodgers: Debating the Future of Burn-In. VTS 2002: 311-314
141EEChao-Wen Tseng, James Li, Edward J. McCluskey: Experimental Results for Slow-Speed Testing. VTS 2002: 37-42
140EENahmsuk Oh, Subhasish Mitra, Edward J. McCluskey: ED4I: Error Detection by Diverse Data and Duplicated Instructions. IEEE Trans. Computers 51(2): 180-199 (2002)
139EESubhasish Mitra, Nirmal R. Saxena, Edward J. McCluskey: A Design Diversity Metric and Analysis of Redundant Systems. IEEE Trans. Computers 51(5): 498-510 (2002)
2001
138EEShu-Yi Yu, Edward J. McCluskey: Permanent Fault Repair for FPGAs with Limited Redundant Area. DFT 2001: 125-133
137EENahmsuk Oh, Edward J. McCluskey: Procedure Call Duplication: Minimization of Energy Consumption with Constrained Error Detection Latency. DFT 2001: 182-
136EEWei-Je Huang, Subhasish Mitra, Edward J. McCluskey: Fast Run-Time Fault Location in Dependable FPGA-Based Applications. DFT 2001: 206-214
135EEAhmad A. Al-Yamani, Nahmsuk Oh, Edward J. McCluskey: Performance Evaluation of Checksum-Based ABFT. DFT 2001: 461-
134EESubhasish Mitra, Nirmal R. Saxena, Edward J. McCluskey: Techniques for Estimation of Design Diversity for Combinational Logic Circuits. DSN 2001: 25-36
133EEWei-Je Huang, Edward J. McCluskey: A memory coherence technique for online transient error recovery of FPGA configurations. FPGA 2001: 183-192
132EESubhasish Mitra, Edward J. McCluskey: Diversity Techniques for Concurrent Error Detection. ISQED 2001: 249-250
131 Chao-Wen Tseng, Chien-Mo James Li, Mike Purtell, Edward J. McCluskey: Testing for resistive opens and stuck opens. ITC 2001: 1049-1058
130 Shu-Yi Yu, Edward J. McCluskey: On-line testing and recovery in TMR systems for real-time applications. ITC 2001: 240-249
129 Chao-Wen Tseng, Edward J. McCluskey: Multiple-output propagation transition fault test. ITC 2001: 358-366
128EESubhasish Mitra, Edward J. McCluskey: Design Diversity for Concurrent Error Detection in Sequential Logic Circuts. VTS 2001: 178-183
127EESubhasish Mitra, Edward J. McCluskey: Design of Redundant Systems Protected Against Common-Mode Failures. VTS 2001: 190-197
126EEChien-Mo James Li, Edward J. McCluskey: Diagnosis of Tunneling Opens. VTS 2001: 22-27
125EEChao-Wen Tseng, Ray Chen, Edward J. McCluskey, Phil Nigh: MINVDD Testing for Weak CMOS ICs. VTS 2001: 339-345
124EEChao-Wen Tseng, Subhasish Mitra, Edward J. McCluskey, Scott Davidson: An Evaluation of Pseudo Random Testing for Detecting Real Defects. VTS 2001: 404-410
123EENur A. Touba, Edward J. McCluskey: Bit-fixing in pseudorandom sequences for scan BIST. IEEE Trans. on CAD of Integrated Circuits and Systems 20(4): 545-555 (2001)
2000
122EEShu-Yi Yu, Nirmal R. Saxena, Edward J. McCluskey: An ACS Robotic Control Algorithm with Fault Tolerant Capabilities. FCCM 2000: 175-184
121EEWei-Je Huang, Nirmal R. Saxena, Edward J. McCluskey: A Reliable LZ Data Compressor on Reconfigurable Coprocessors. FCCM 2000: 249-258
120 Subhasish Mitra, Edward J. McCluskey: Combinational logic synthesis for diversity in duplex systems. ITC 2000: 179-188
119 Edward J. McCluskey, Chao-Wen Tseng: Stuck-fault tests vs. actual defects. ITC 2000: 336-343
118 Chien-Mo James Li, Edward J. McCluskey: Testing for tunneling opens. ITC 2000: 85-94
117 Subhasish Mitra, Edward J. McCluskey: Which concurrent error detection scheme to choose ? ITC 2000: 985-994
116EEWei-Je Huang, Edward J. McCluskey: Transient errors and rollback recovery in LZ compression. PRDC 2000: 128-138
115EEChao-Wen Tseng, Edward J. McCluskey, Xiaoping Shao, David M. Wu: Cold Delay Defect Screening. VTS 2000: 183-188
114EESubhasish Mitra, Nirmal R. Saxena, Edward J. McCluskey: Fault Escapes in Duplex Systems. VTS 2000: 453-458
113EESubhasish Mitra, Edward J. McCluskey: Word Voter: A New Voter Design for Triple Modular Redundant Systems. VTS 2000: 465-470
112EENirmal R. Saxena, Santiago Fernández-Gomez, Wei-Je Huang, Subhasish Mitra, Shu-Yi Yu, Edward J. McCluskey: Dependable Computing and Online Testing in Adaptive and Configurable Systems. IEEE Design & Test of Computers 17(1): 29-41 (2000)
111EESubhasish Mitra, LaNae J. Avra, Edward J. McCluskey: Efficient Multiplexer Synthesis Techniques. IEEE Design & Test of Computers 17(4): 90-97 (2000)
1999
110 Subhasish Mitra, Nirmal R. Saxena, Edward J. McCluskey: A design diversity metric and reliability analysis for redundant systems. ITC 1999: 662-671
109 Chaohuang Zeng, Nirmal R. Saxena, Edward J. McCluskey: Finite state machine synthesis with concurrent error detection. ITC 1999: 672-679
108EEPhilip P. Shirvani, Edward J. McCluskey: PADded Cache: A New Fault-Tolerance Technique for Cache Memories. VTS 1999: 440-445
107EESubhasish Mitra, LaNae J. Avra, Edward J. McCluskey: An output encoding problem and a solution technique. IEEE Trans. on CAD of Integrated Circuits and Systems 18(6): 761-768 (1999)
106EENur A. Touba, Edward J. McCluskey: RP-SYN: synthesis of random pattern testable circuits with test point insertion. IEEE Trans. on CAD of Integrated Circuits and Systems 18(8): 1202-1213 (1999)
1998
105EEJonathan T.-Y. Chang, Chao-Wen Tseng, Chien-Mo James Li, Mike Purtell, Edward J. McCluskey: Analysis of pattern-dependent and timing-dependent failures in an experimental test chip. ITC 1998: 184-193
104EEJonathan T.-Y. Chang, Edward J. McCluskey: Detecting resistive shorts for CMOS domino circuits. ITC 1998: 890-899
103EEJonathan T.-Y. Chang, Chao-Wen Tseng, Yi-Chin Chu, Sanjay Wattal, Mike Purtell, Edward J. McCluskey: Experimental Results for IDDQ and VLV Testing. VTS 1998: 118-125
1997
102EESubhasish Mitra, LaNae J. Avra, Edward J. McCluskey: An output encoding problem and a solution technique. ICCAD 1997: 304-307
101 Nur A. Touba, Edward J. McCluskey: Pseudo-Random Pattern Testing of Bridging Faults. ICCD 1997: 54-60
100 Subhasish Mitra, LaNae J. Avra, Edward J. McCluskey: Scan Synthesis for One-Hot Signals. ITC 1997: 714-722
99EESamy Makar, Edward J. McCluskey: ATPG for scan chain latches and flip-flops. VTS 1997: 364-369
98EERobert B. Norwood, Edward J. McCluskey: High-Level Synthesis for Orthogonal Sca. VTS 1997: 370-375
97EEJonathan T.-Y. Chang, Edward J. McCluskey: SHOrt voltage elevation (SHOVE) test for weak CMOS ICs. VTS 1997: 446-
96 Nirmal R. Saxena, Edward J. McCluskey: Parallel Signatur Analysis Design with Bounds on Aliasing. IEEE Trans. Computers 46(4): 425-438 (1997)
95EENur A. Touba, Edward J. McCluskey: Logic synthesis of multilevel circuits with concurrent error detection. IEEE Trans. on CAD of Integrated Circuits and Systems 16(7): 783-789 (1997)
1996
94 Nur A. Touba, Edward J. McCluskey: Altering a Pseudo-Random Bit Sequence for Scan-Based BIST. ITC 1996: 167-175
93 Jonathan T.-Y. Chang, Edward J. McCluskey: Detecting Delay Flaws by Very-Low-Voltage Testing. ITC 1996: 367-376
92 Robert B. Norwood, Edward J. McCluskey: Orthogonal Scan: Low-Overhead Scan for Data Paths. ITC 1996: 659-668
91 Piero Franco, Siyad C. Ma, Jonathan Chang, Yi-Chin Chu, Sanjay Wattal, Edward J. McCluskey, Robert L. Stokes, William D. Farwell: Analysis and Detection of Timing Failures in an Experimental Test Chip. ITC 1996: 691-700
90EENur A. Touba, Edward J. McCluskey: Test point insertion based on path tracing. VTS 1996: 2-8
89EEJonathan T.-Y. Chang, Edward J. McCluskey: Quantitative analysis of very-low-voltage testing. VTS 1996: 332-337
88EENur A. Touba, Edward J. McCluskey: Applying two-pattern tests using scan-mapping. VTS 1996: 393-399
87EERobert B. Norwood, Edward J. McCluskey: Synthesis-for-scan and scan chain ordering. VTS 1996: 87-92
86 Nirmal R. Saxena, Edward J. McCluskey: Counting Two-State Transition-Tour Sequences. IEEE Trans. Computers 45(11): 1337-1342 (1996)
1995
85EETeruhiko Yamada, Koji Yamazaki, Edward J. McCluskey: A simple technique for locating gate-level faults in combinational circuits. Asian Test Symposium 1995: 65-70
84 Samy Makar, Edward J. McCluskey: Functional Tests for Scan Chain Latches. ITC 1995: 606-615
83 Piero Franco, William D. Farwell, Robert L. Stokes, Edward J. McCluskey: An Experimental Chip to Evaluate Test Techniques: Chip and Experiment Design. ITC 1995: 653-662
82 Siyad C. Ma, Piero Franco, Edward J. McCluskey: An Experimental Chip to Evaluate Test Techniques: Experiment Results. ITC 1995: 663-672
81 Nur A. Touba, Edward J. McCluskey: Synthesis of Mapping Logic for Generating Transformed Pseudo-Random Patterns for BIST. ITC 1995: 674-682
80EEShridhar K. Mukund, Edward J. McCluskey, T. R. N. Rao: An apparatus for pseudo-deterministic testing. VTS 1995: 125-131
79EESamy Makar, Edward J. McCluskey: Checking experiments to test latches. VTS 1995: 196-201
78EENur A. Touba, Edward J. McCluskey: Transformed pseudo-random patterns for BIST. VTS 1995: 410-416
77 Daniel Boley, Gene H. Golub, Samy Makar, Nirmal R. Saxena, Edward J. McCluskey: Floating Point Fault Tolerance with Backward Error Assertions. IEEE Trans. Computers 44(2): 302-311 (1995)
76EESiyad C. Ma, Edward J. McCluskey: Open faults in BiCMOS gates. IEEE Trans. on CAD of Integrated Circuits and Systems 14(5): 567-575 (1995)
1994
75EENur A. Touba, Edward J. McCluskey: Logic synthesis techniques for reduced area implementation of multilevel circuits with concurrent error detection. ICCAD 1994: 651-654
74 Nur A. Touba, Edward J. McCluskey: Automated Logic Synthesis of Random-Pattern-Testable Circuits. ITC 1994: 174-183
73EENirmal R. Saxena, Edward J. McCluskey: Linear Complexity Assertions for Sorting. IEEE Trans. Software Eng. 20(6): 424-431 (1994)
1993
72 Hong Hao, Edward J. McCluskey: Very-Low-Voltage Testing for Weak CMOS Logic ICs. ITC 1993: 275-284
71 Edward J. McCluskey: Quality and Single-Stuck Faults. ITC 1993: 597
70 LaNae J. Avra, Edward J. McCluskey: Synthesizing for Scan Dependence in Built-In Self-Testable Desings. ITC 1993: 734-743
69 Hong Hao, Edward J. McCluskey: Analysis of Gate Oxide Shorts in CMOS Circuits. IEEE Trans. Computers 42(12): 1510-1516 (1993)
1992
68 Siyad C. Ma, Edward J. McCluskey: Non-Conventional Faults in BiCMOS Digital Circuits. ITC 1992: 882-891
67 Nirmal R. Saxena, Piero Franco, Edward J. McCluskey: Simple Bounds on Serial Signature Analysis Aliasing for Random Testing. IEEE Trans. Computers 41(5): 638-645 (1992)
1991
66 Nirmal R. Saxena, Piero Franco, Edward J. McCluskey: Bounds on Signature Analysis Aliasing for Random Testing. FTCS 1991: 104-113
65 Steven D. Millman, Edward J. McCluskey: Bridging, Transition, and Stuck-Open Faults in Self-Testing CMOS Checkers. FTCS 1991: 154-161
64 Hong Hao, Edward J. McCluskey: "Resistive Shorts" Within CMOS Gates. ITC 1991: 292-301
63 Kiyoshi Furuya, Edward J. McCluskey: Two-Pattern Test Capabilities of Autonomous TPG Circuits. ITC 1991: 704-711
62 Piero Franco, Edward J. McCluskey: Delay Testing of Digital Circuits by Output Waveform Analysis. ITC 1991: 798-807
61 Nirmal R. Saxena, Piero Franco, Edward J. McCluskey: Refined Bounds on Signature Analysis Aliasing for Random Testing. ITC 1991: 818-827
1990
60 Edward J. McCluskey: Design Techniques for Testable Embedded Error Checkers. IEEE Computer 23(7): 84-88 (1990)
59 Nirmal R. Saxena, Edward J. McCluskey: Control-Flow Checking Using Watchdog Assists and Extended-Precision Checksums. IEEE Trans. Computers 39(4): 554-559 (1990)
58 Nirmal R. Saxena, Edward J. McCluskey: Analysis of Checksums, Extended-Precision Checksums, and Cyclic Redundancy Checks. IEEE Trans. Computers 39(7): 969-975 (1990)
1988
57 Jon G. Udeli Jr., Edward J. McCluskey: Partial Hardware Partitioning: A New Pseudo-Exhaustive Test Implementation. ITC 1988: 1000
56 Edward J. McCluskey: Practice and Theory. ITC 1988: 203-204
55 Edward J. McCluskey, Fred Buelow: IC Quality and Test Transparency. ITC 1988: 295-301
54 Samy Makar, Edward J. McCluskey: On the Testing of Multiplexers. ITC 1988: 669-679
53 Steven D. Millman, Edward J. McCluskey: Detecting Bridging Faults with Stuck-at Test Sets. ITC 1988: 773-783
52 Samiha Mourad, Edward J. McCluskey: On Benchmarking Digital Testing Systems. ITC 1988: 997
51 Laung-Terng Wang, Edward J. McCluskey: Linear Feedback Shift Register Design Using Cyclic Codes. IEEE Trans. Computers 37(10): 1302-1306 (1988)
50 Aamer Mahmood, Edward J. McCluskey: Concurrent Error Detection Using Watchdog Processors - A Survey. IEEE Trans. Computers 37(2): 160-174 (1988)
49EEDick L. Liu, Edward J. McCluskey: Design of large embedded CMOS PLAs for built-in self-test. IEEE Trans. on CAD of Integrated Circuits and Systems 7(1): 50-59 (1988)
48EEEdward J. McCluskey, Samy Makar, Samiha Mourad, Kenneth D. Wagner: Probability models for pseudorandom test sequences. IEEE Trans. on CAD of Integrated Circuits and Systems 7(1): 68-74 (1988)
47EELaung-Terng Wang, Edward J. McCluskey: Hybrid designs generating maximum-length sequences. IEEE Trans. on CAD of Integrated Circuits and Systems 7(1): 91-99 (1988)
46EELaung-Terng Wang, Edward J. McCluskey: Circuits for pseudoexhaustive test pattern generation. IEEE Trans. on CAD of Integrated Circuits and Systems 7(10): 1068-1080 (1988)
1987
45EEHassanein H. Amer, Edward J. McCluskey: Modeling the Effect of Chip Failures on Cache Memory Systems. ICDE 1987: 340-346
44 Cary K. Chin, Edward J. McCluskey: Test Length for Pseudorandom Testing. IEEE Trans. Computers 36(2): 252-256 (1987)
43 Kenneth D. Wagner, Cary K. Chin, Edward J. McCluskey: Pseudorandom Testing. IEEE Trans. Computers 36(3): 332-343 (1987)
1986
42 Samiha Mourad, Joseph L. A. Hughes, Edward J. McCluskey: Multiple Fault Detection in Parity Trees. COMPCON 1986: 441-444
41 Samiha Mourad, Joseph L. A. Hughes, Edward J. McCluskey: Stuck-At Fault Detection in Parity Trees. FJCC 1986: 836-840
40 Gregory Freeman, Dick L. Liu, Bruce A. Wooley, Edward J. McCluskey: Two CMOS Metastability Sensors. ITC 1986: 140-144
39 Laung-Terng Wang, Edward J. McCluskey: Circuits for Pseudo-Exhaustive Test Pattern Generation. ITC 1986: 25-37
38 Joseph L. A. Hughes, Edward J. McCluskey: Multiple Stuck-At Fault Coverage of Single Stuck-At Fault Test Sets. ITC 1986: 368-374
37 Laung-Terng Wang, Edward J. McCluskey: A Hybrid Design of Maximum-Length Sequence Generators. ITC 1986: 38-47
36 Mario L. Côrtes, Edward J. McCluskey: An Experiment on Intermittent-Failure Mechanisms. ITC 1986: 435-442
35 Laung-Terng Wang, Edward J. McCluskey: Condensed Linear Feedback Shift Register (LFSR) Testing - A Pseudoexhaustive Test Technique. IEEE Trans. Computers 35(4): 367-370 (1986)
34 Saied Bozorgui-Nesbat, Edward J. McCluskey: Lower Overhead Design for Testability of Programmable Logic Arrays. IEEE Trans. Computers 35(4): 379-383 (1986)
1985
33 Edward J. McCluskey: Hardware Fault-Tolerance. COMPCON 1985: 260-263
32 Joseph L. A. Hughes, Samiha Mourad, Edward J. McCluskey: An Experimental Study Comparing 74LS181 Test Sets. COMPCON 1985: 384-387
31 Aamer Mahmood, Edward J. McCluskey, Aydin Ersoz: Concurrent System-Level Error Detection Using a Watchdog Processor. ITC 1985: 145-152
30 Edward J. McCluskey: Test Teaching. ITC 1985: 235
29 Cary K. Chin, Edward J. McCluskey: Test Length for Pseudo Random Testing. ITC 1985: 94-99
1984
28 Syed Zahoor Hassan, Edward J. McCluskey: Pseudo-Exhaustive Testing of Sequential Machines Using Signature Analysis. ITC 1984: 320-326
27 Joseph L. A. Hughes, Edward J. McCluskey: An Analysis of the Multiple Fault Detection Capabilities of Single Stuck-at Fault Test Sets. ITC 1984: 52-58
26 Saied Bozorgui-Nesbat, Edward J. McCluskey: Lower Overhead Design for Testability of Programmable Logic Arrays. ITC 1984: 856-865
25 Edward J. McCluskey: Verification Testing - A Pseudoexhaustive Test Technique. IEEE Trans. Computers 33(6): 541-546 (1984)
24 Joseph L. A. Hughes, Edward J. McCluskey, David J. Lu: Design of Totally Self-Checking Comparators with an Arbitrary Number of Inputs. IEEE Trans. Computers 33(6): 546-550 (1984)
23 Javad Khakbaz, Edward J. McCluskey: Self-Testing Embedded Parity Checkers. IEEE Trans. Computers 33(8): 753-756 (1984)
22EEDavid J. Lu, Edward J. McCluskey: Quantitative Evaluation of Self-Checking Circuits. IEEE Trans. on CAD of Integrated Circuits and Systems 3(2): 150-155 (1984)
1983
21 Edward J. McCluskey: Teaching Testing. ITC 1983: 166-169
20 Aamer Mahmood, Edward J. McCluskey, David J. Lu: Concurrent Fault Detection Using a Watchdog Processor and Assertions. ITC 1983: 622-628
19 Edward J. McCluskey, David J. Lu: Recurrent Test Patterns. ITC 1983: 76-82
1982
18 Edward J. McCluskey: Built-In Verification Test. ITC 1982: 183-190
17 Ravishankar K. Iyer, Steven E. Butner, Edward J. McCluskey: A Statistical Failure/Load Relationship: Results of a Multicomputer Study. IEEE Trans. Computers 31(7): 697-706 (1982)
1981
16 Edward J. McCluskey, Saied Bozorgui-Nesbat: Design for Autonomous Test. IEEE Trans. Computers 30(11): 866-875 (1981)
1980
15 David J. Lu, Edward J. McCluskey, Masood Namjoo: Summary of Structural integrity Checking. IEEE Real-Time Systems Symposium 1980: 107-109
1979
14 Edward J. McCluskey: Logic Design of Multivalued I2L Logic Circuits. IEEE Trans. Computers 28(8): 546-559 (1979)
1978
13 Edward J. McCluskey, Kenneth P. Parker, John J. Shedletsky: Boolean Network Probabilities and Network Design. IEEE Trans. Computers 27(2): 187-189 (1978)
12 Kenneth P. Parker, Edward J. McCluskey: Sequential Circuit Output Probabilities From Regular Expressions. IEEE Trans. Computers 27(3): 222-231 (1978)
1977
11 Tich T. Dao, Edward J. McCluskey, Lewis K. Russel: Multivalued Integrated Injection Logic. IEEE Trans. Computers 26(12): 1233-1241 (1977)
1975
10 Kenneth P. Parker, Edward J. McCluskey: Analysis of Logic Circuits with Faults Using Input Signal Probabilities. IEEE Trans. Computers 24(5): 573-578 (1975)
9 Kenneth P. Parker, Edward J. McCluskey: Probabilistic Treatment of General Combinational Networks. IEEE Trans. Computers 24(6): 668-670 (1975)
1974
8 John F. Wakerly, Edward J. McCluskey: Design of Low-Cost General-Purpose Self-Diagnosing Computers. IFIP Congress 1974: 108-111
1968
7EEWilliam F. Atchison, Samuel D. Conte, John W. Hamblen, Thomas E. Hull, Thomas A. Keenan, William B. Kehl, Edward J. McCluskey, Silvio O. Navarro, Werner C. Rheinboldt, Earl J. Schweppe, William Viavant, David M. Young: Curriculum 68: Recommendations for academic programs in computer science: a report of the ACM curriculum committee on computer science. Commun. ACM 11(3): 151-197 (1968)
1964
6 J. F. Poage, Edward J. McCluskey: Derivation of optimum test sequences for sequential machines FOCS 1964: 121-132
1963
5 Edward J. McCluskey: Logical design theory of NOR gate networks with no complemented inputs FOCS 1963: 137-148
4 Edward J. McCluskey: Reduction of Feedback Loops in Sequential Circuits and Carry Leads in Iterative Networks Information and Control 6(2): 99-118 (1963)
1962
3 Edward J. McCluskey: Reduction of feedback loops in sequential circuits and carry leads in iterative networks FOCS 1962: 91-102
2 Edward J. McCluskey: Fundamental Mode and Pulse Mode Operations of Sequential Circuits. IFIP Congress 1962: 725-730
1961
1 Edward J. McCluskey: Minimal sums for Boolean functions having many unspecified fundamental products FOCS 1961: 10-17

Coauthor Index

1Ahmad A. Al-Yamani [135] [147] [148] [149] [150] [154] [157] [159] [160] [161]
2Hassanein H. Amer [45]
3William F. Atchison [7]
4LaNae J. Avra [70] [100] [102] [107] [111]
5Daniel Boley [77]
6Saied Bozorgui-Nesbat [16] [26] [34]
7Kenneth A. Brand [156]
8Fred Buelow [55]
9Steven E. Butner [17]
10Jonathan Chang [91]
11Jonathan T.-Y. Chang [89] [93] [97] [103] [104] [105]
12Ray Chen [125]
13Cary K. Chin [29] [43] [44]
14Erik Chmelar [162] [164]
15Kyoung Youn Cho [163]
16Yi-Chin Chu [91] [103]
17Samuel D. Conte [7]
18Mario L. Côrtes [36]
19Tich T. Dao [11]
20Scott Davidson [124]
21Stefan Eichenberger [153]
22Aydin Ersoz [31]
23William D. Farwell [83] [91]
24Philippe Faure [155]
25François-Fabien Ferhani [154] [166]
26Santiago Fernández-Gomez [112]
27Piero Franco [61] [62] [66] [67] [82] [83] [91]
28Gregory Freeman [40]
29Kiyoshi Furuya [63]
30Gene H. Golub [77]
31John W. Hamblen [7]
32Hong Hao [64] [69] [72]
33Syed Zahoor Hassan [28]
34Wei-Je Huang [112] [116] [121] [133] [136] [152]
35Joseph L. A. Hughes [24] [27] [32] [38] [41] [42]
36Thomas E. Hull [7]
37Ravishankar K. Iyer (Ravi K. Iyer) [17]
38Thomas A. Keenan [7]
39William B. Kehl [7]
40Javad Khakbaz [23]
41Donghwi Lee [164]
42Jaekwang Lee [165]
43Chien-Mo James Li (James Chien-Mo Li) [105] [118] [126] [131] [144] [154] [158]
44Edward Li [154]
45James Li [141]
46Dick L. Liu [40] [49]
47David J. Lu [15] [19] [20] [22] [24]
48Siyad C. Ma [68] [76] [82] [91]
49Bob Madge [142]
50Aamer Mahmood [20] [31] [50]
51Samy Makar [48] [54] [77] [79] [84] [99] [143]
52Peter C. Maxwell [142]
53Steven D. Millman [53] [65]
54Subhasish Mitra [100] [102] [107] [110] [111] [112] [113] [114] [117] [120] [124] [127] [128] [132] [134] [136] [139] [140] [142] [143] [145] [146] [147] [148] [151] [152] [153] [154] [156] [157]
55Samiha Mourad [32] [41] [42] [48] [52]
56Shridhar K. Mukund [80]
57Masood Namjoo [15]
58Silvio O. Navarro [7]
59Phil Nigh [125] [142] [166]
60Robert B. Norwood [87] [92] [98]
61Nahmsuk Oh [135] [137] [140]
62Intaik Park [160] [164] [165]
63Kenneth P. Parker [9] [10] [12] [13]
64J. F. Poage [6]
65Mike Purtell [103] [105] [131]
66T. R. N. Rao (Thammavarapu R. N. Rao) [80]
67Michel Renovell [155]
68Werner C. Rheinboldt [7]
69Mike Rodgers [142]
70Lewis K. Russel [11]
71Nirmal R. Saxena [58] [59] [61] [66] [67] [73] [77] [86] [96] [109] [110] [112] [114] [121] [122] [134] [139] [151] [152] [166]
72Earl J. Schweppe [7]
73Xiaoping Shao [115]
74John J. Shedletsky [13]
75Philip P. Shirvani [108]
76Robert L. Stokes [83] [91]
77Mehdi Baradaran Tahoori [145] [155]
78Nur A. Touba [74] [75] [78] [81] [88] [90] [94] [95] [101] [106] [123]
79Shahin Toutounchi [145]
80Chao-Wen Tseng [103] [105] [115] [119] [124] [125] [129] [131] [141] [154]
81Jon G. Udeli Jr. [57]
82William Viavant [7]
83Erik H. Volkerink [153] [154] [156]
84Kenneth D. Wagner [43] [48]
85John F. Wakerly [8]
86Laung-Terng Wang [35] [37] [39] [46] [47] [51]
87Sanjay Wattal [91] [103]
88Bruce A. Wooley [40]
89David M. Wu [115]
90Teruhiko Yamada [85]
91Koji Yamazaki [85]
92David M. Young [7]
93Shu-Yi Yu [112] [122] [130] [138] [152]
94Chaohuang Zeng [109]

Colors in the list of coauthors

Copyright © Tue Nov 3 08:52:44 2009 by Michael Ley (ley@uni-trier.de)