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Hans Jürgen Mattausch Vis

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*2009
33EEMasataka Miyake, Daisuke Hori, Norio Sadachika, Uwe Feldmann, Mitiko Miura-Mattausch, Hans Jürgen Mattausch, Takahiro Iizuka, Kazuya Matsuzawa, Yasuyuki Sahara, Teruhiko Hoshida, Toshiro Tsukada: Non-Quasi-Static Carrier Dynamics of MOSFETs under Low-Voltage Operation. IEICE Transactions 92-C(5): 608-615 (2009)
32EEMasataka Miyake, Daisuke Hori, Norio Sadachika, Uwe Feldmann, Mitiko Miura-Mattausch, Hans Jürgen Mattausch, Tatsuya Ohguro, Takahiro Iizuka, Masahiko Taguchi, Shunsuke Miyamoto: Degraded Frequency-Tuning Range and Oscillation Amplitude of LC-VCOs due to the Nonquasi-Static Effect in MOS Varactors. IEICE Transactions 92-C(6): 777-784 (2009)
2008
31EENorio Sadachika, Takahiro Murakami, Hideki Oka, Ryou Tanabe, Hans Jürgen Mattausch, Mitiko Miura-Mattausch: Compact Double-Gate Metal-Oxide-Semiconductor Field Effect Transistor Model for Device/Circuit Optimization. IEICE Transactions 91-C(8): 1379-1381 (2008)
30EETakeshi Kumaki, Masakatsu Ishizaki, Tetsushi Koide, Hans Jürgen Mattausch, Yasuto Kuroda, Takayuki Gyohten, Hideyuki Noda, Katsumi Dosaka, Kazutami Arimoto, Kazunori Saito: Integration Architecture of Content Addressable Memory and Massive-Parallel Memory-Embedded SIMD Matrix for Versatile Multimedia Processor. IEICE Transactions 91-C(9): 1409-1418 (2008)
29EETatsuya Ezaki, Dondee Navarro, Youichi Takeda, Norio Sadachika, G. Suzuki, Mitiko Miura-Mattausch, Hans Jürgen Mattausch, Tatsuya Ohguro, Takahiro Iizuka, Masahiko Taguchi, Shigetaka Kumashiro, Shunsuke Miyamoto: Non-quasi-static approach with surface-potential-based MOSFET model HiSIM for RF circuit simulations. Mathematics and Computers in Simulation 79(4): 1096-1106 (2008)
2007
28EETakeshi Kumaki, Tetsushi Koide, Hans Jürgen Mattausch, Yasuto Kuroda, Hideyuki Noda, Katsumi Dosaka, Kazutami Arimoto, Kazunori Saito: Efficient Vertical/Horizontal-Space 1D-DCT Processing Based on Massive-Parallel Matrix-Processing Engine. ISCAS 2007: 525-528
27EEMd. Anwarul Abedin, Yuki Tanaka, Ali Ahmadi, Shogo Sakakibara, Tetsushi Koide, Hans Jürgen Mattausch: Realization of K-Nearest-Matches Search Capability in Fully-Parallel Associative Memories. IEICE Transactions 90-A(6): 1240-1243 (2007)
26EEKoh Johguchi, Hans Jürgen Mattausch, Tetsushi Koide, Tetsuo Hironaka: 4-Port Unified Data/Instruction Cache Design with Distributed Crossbar and Interleaved Cache-Line Words. IEICE Transactions 90-C(11): 2157-2160 (2007)
25EETakeshi Kumaki, Yasuto Kuroda, Masakatsu Ishizaki, Tetsushi Koide, Hans Jürgen Mattausch, Hideyuki Noda, Katsumi Dosaka, Kazutami Arimoto, Kazunori Saito: Real-Time Huffman Encoder with Pipelined CAM-Based Data Path and Code-Word-Table Optimizer. IEICE Transactions 90-D(1): 334-345 (2007)
24EETakeshi Kumaki, Yutaka Kono, Masakatsu Ishizaki, Tetsushi Koide, Hans Jürgen Mattausch: Scalable FPGA/ASIC Implementation Architecture for Parallel Table-Lookup-Coding Using Multi-Ported Content Addressable Memory. IEICE Transactions 90-D(1): 346-354 (2007)
23EETakeshi Kumaki, Masakatsu Ishizaki, Tetsushi Koide, Hans Jürgen Mattausch, Yasuto Kuroda, Hideyuki Noda, Katsumi Dosaka, Kazutami Arimoto, Kazunori Saito: Acceleration of DCT Processing with Massive-Parallel Memory-Embedded SIMD Matrix Processor. IEICE Transactions 90-D(8): 1312-1315 (2007)
2006
22EEKoh Johguchi, Zhaomin Zhu, Hans Jürgen Mattausch, Tetsushi Koide, Tetsuo Hironaka, Kazuya Tanigawa: Unified Data/Instruction Cache with Hierarchical Multi-Port Architecture and Hidden Precharge Pipeline. APCCAS 2006: 1297-1300
21EEMd. Anwarul Abedin, Yuki Tanaka, Ali Ahmadi, Tetsushi Koide, Hans Jürgen Mattausch: Fully Parallel Associative Memory Architecture with Mixed Digital-Analog Match Circuit for Nearest Euclidean Distance Search. APCCAS 2006: 1309-1312
20EETakeshi Kumaki, Y. Kouno, Masakatsu Ishizaki, Tetsushi Koide, Hans Jürgen Mattausch: Application of Multi-ported CAM for Parallel Coding. APCCAS 2006: 1859-1862
19EETakashi Morimoto, Hidekazu Adachi, K. Yamaoka, K. Awane, Tetsushi Koide, Hans Jürgen Mattausch: An FPGA-Based Region-Growing Video Segmentation System with Boundary-Scan-Only LSI Architecture. APCCAS 2006: 944-947
18EEK. Yamaoka, Takashi Morimoto, Hidekazu Adachi, Tetsushi Koide, Hans Jürgen Mattausch: Image segmentation and pattern matching based FPGA/ASIC implementation architecture of real-time object tracking. ASP-DAC 2006: 176-181
17EEK. Yamaoka, Takashi Morimoto, Hidekazu Adachi, K. Awane, Tetsushi Koide, Hans Jürgen Mattausch: Multi-object tracking VLSI architecture using image-scan based region growing and feature matching. ISCAS 2006
16EEHideyuki Noda, Katsumi Dosaka, Hans Jürgen Mattausch, Tetsushi Koide, Fukashi Morishita, Kazutami Arimoto: A Reliability-Enhanced TCAM Architecture with Associated Embedded DRAM and ECC. IEICE Transactions 89-C(11): 1612-1619 (2006)
15EETakashi Morimoto, Hidekazu Adachi, Osamu Kiriyama, Tetsushi Koide, Hans Jürgen Mattausch: Boundary-Active-Only Adaptive Power-Reduction Scheme for Region-Growing Video-Segmentation. IEICE Transactions 89-D(3): 1299-1302 (2006)
2005
14EETakashi Morimoto, Osamu Kiriyama, Hidekazu Adachi, Zhaomin Zhu, Tetsushi Koide, Hans Jürgen Mattausch: A low-power video segmentation LSI with boundary-active-only architecture. ASP-DAC 2005: 13-14
13EETakashi Morimoto, Osamu Kiriyama, Yohmei Harada, Hidekazu Adachi, Tetsushi Koide, Hans Jürgen Mattausch: Object tracking in video pictures based on image segmentation and pattern matching. ISCAS (4) 2005: 3215-3218
12EET. Saito, M. Maeda, Tetsuo Hironaka, Kazuya Tanigawa, Tetsuya Sueyoshi, K. Aoyama, Tetsushi Koide, Hans Jürgen Mattausch: Design of superscalar processor with multi-bank register file. ISCAS (4) 2005: 3507-3510
11EETakeshi Kumaki, Yasuto Kuroda, Tetsushi Koide, Hans Jürgen Mattausch, Hideyuki Noda, Katsumi Dosaka, Kazutami Arimoto, Kazunori Saito: CAM-based VLSI architecture for Huffman coding with real-time optimization of the code word table [image coding example]. ISCAS (5) 2005: 5202-5205
10EEShizunori Matsumoto, Hiroaki Ueno, Satoshi Hosokawa, Toshihiko Kitamura, Mitiko Miura-Mattausch, Hans Jürgen Mattausch, Tatsuya Ohguro, Shigetaka Kumashiro, Tetsuya Yamaguchi, Kyoji Yamashita, Noriaki Nakayama: 1/f-Noise Characteristics in 100 nm-MOSFETs and Its Modeling for Circuit Simulation. IEICE Transactions 88-C(2): 247-254 (2005)
9EEHideyuki Noda, Kazunari Inoue, Hans Jürgen Mattausch, Tetsushi Koide, Katsumi Dosaka, Kazutami Arimoto, Kazuyasu Fujishima, Kenji Anami, Tsutomu Yoshihara: Embedded Low-Power Dynamic TCAM Architecture with Transparently Scheduled Refresh. IEICE Transactions 88-C(4): 622-629 (2005)
8EEDondee Navarro, Takeshi Mizoguchi, Masami Suetake, Kazuya Hisamitsu, Hiroaki Ueno, Mitiko Miura-Mattausch, Hans Jürgen Mattausch, Shigetaka Kumashiro, Tetsuya Yamaguchi, Kyoji Yamashita, Noriaki Nakayama: A Compact Model of the Pinch-off Region of 100 nm MOSFETs Based on the Surface-Potential. IEICE Transactions 88-C(5): 1079-1086 (2005)
7EEKazunari Inoue, Hideyuki Noda, Kazutami Arimoto, Hans Jürgen Mattausch, Tetsushi Koide: A CAM-Based Signature-Matching Co-processor with Application-Driven Power-Reduction Features. IEICE Transactions 88-C(6): 1332-1342 (2005)
6EETakahiro Sasaki, Tomohiro Inoue, Nobuhiko Omori, Tetsuo Hironaka, Hans Jürgen Mattausch, Tetsushi Koide: Chip size and performance evaluations of shared cache for on-chip multiprocessor. Systems and Computers in Japan 36(9): 1-13 (2005)
2004
5EETakashi Morimoto, Yohmei Harada, Tetsushi Koide, Hans Jürgen Mattausch: 350nm CMOS test-chip for architecture verification of real-time QVGA color-video segmentation at the 90nm technology node. ASP-DAC 2004: 531-532
4EEYuji Yano, Tetsushi Koide, Hans Jürgen Mattausch: Associative memory with fully parallel nearest-Manhattan-distance search for low-power real-time single-chip applications. ASP-DAC 2004: 543-544
3EETetsuya Sueyoshi, Hiroshi Uchida, Hans Jürgen Mattausch, Tetsushi Koide, Yosuke Mitani, Tetsuo Hironaka: Compact 12-port multi-bank register file test-chip in 0.35µm CMOS for highly parallel processors. ASP-DAC 2004: 551-552
2001
2EED. Miyawaki, Shizunori Matsumoto, Hans Jürgen Mattausch, S. Ooshiro, Masami Suetake, Michiko Miura-Mattausch, Shigetaka Kumashiro, Tetsuya Yamaguchi, Kyoji Yamashita, Noriaki Nakayama: Correlation method of circuit-performance and technology fluctuations for improved design reliability. ASP-DAC 2001: 39-44
2000
1EEMasayasu Tanaka, N. Tokida, T. Okagaki, Michiko Miura-Mattausch, Walter Hansch, Hans Jürgen Mattausch: High performance of short-channel MOSFETs due to an elevated central-channel doping. ASP-DAC 2000: 365-370

Coauthor Index

1Md. Anwarul Abedin [21] [27]
2Hidekazu Adachi [13] [14] [15] [17] [18] [19]
3Ali Ahmadi [21] [27]
4Kenji Anami [9]
5K. Aoyama [12]
6Kazutami Arimoto [7] [9] [11] [16] [23] [25] [28] [30]
7K. Awane [17] [19]
8Katsumi Dosaka [9] [11] [16] [23] [25] [28] [30]
9Tatsuya Ezaki [29]
10Uwe Feldmann [32] [33]
11Kazuyasu Fujishima [9]
12Takayuki Gyohten [30]
13Walter Hansch [1]
14Yohmei Harada [5] [13]
15Tetsuo Hironaka [3] [6] [12] [22] [26]
16Kazuya Hisamitsu [8]
17Daisuke Hori [32] [33]
18Teruhiko Hoshida [33]
19Satoshi Hosokawa [10]
20Takahiro Iizuka [29] [32] [33]
21Kazunari Inoue [7] [9]
22Tomohiro Inoue [6]
23Masakatsu Ishizaki [20] [23] [24] [25] [30]
24Koh Johguchi [22] [26]
25Osamu Kiriyama [13] [14] [15]
26Toshihiko Kitamura [10]
27Tetsushi Koide [3] [4] [5] [6] [7] [9] [11] [12] [13] [14] [15] [16] [17] [18] [19] [20] [21] [22] [23] [24] [25] [26] [27] [28] [30]
28Yutaka Kono [24]
29Y. Kouno [20]
30Takeshi Kumaki [11] [20] [23] [24] [25] [28] [30]
31Shigetaka Kumashiro [2] [8] [10] [29]
32Yasuto Kuroda [11] [23] [25] [28] [30]
33M. Maeda [12]
34Shizunori Matsumoto [2] [10]
35Kazuya Matsuzawa [33]
36Yosuke Mitani [3]
37Michiko Miura-Mattausch [1] [2]
38Mitiko Miura-Mattausch [8] [10] [29] [31] [32] [33]
39Masataka Miyake [32] [33]
40Shunsuke Miyamoto [29] [32]
41D. Miyawaki [2]
42Takeshi Mizoguchi [8]
43Takashi Morimoto [5] [13] [14] [15] [17] [18] [19]
44Fukashi Morishita [16]
45Takahiro Murakami [31]
46Noriaki Nakayama [2] [8] [10]
47Dondee Navarro [8] [29]
48Hideyuki Noda [7] [9] [11] [16] [23] [25] [28] [30]
49Tatsuya Ohguro [10] [29] [32]
50Hideki Oka [31]
51T. Okagaki [1]
52Nobuhiko Omori [6]
53S. Ooshiro [2]
54Norio Sadachika [29] [31] [32] [33]
55Yasuyuki Sahara [33]
56Kazunori Saito [11] [23] [25] [28] [30]
57T. Saito [12]
58Shogo Sakakibara [27]
59Takahiro Sasaki [6]
60Masami Suetake [2] [8]
61Tetsuya Sueyoshi [3] [12]
62G. Suzuki [29]
63Masahiko Taguchi [29] [32]
64Youichi Takeda [29]
65Ryou Tanabe [31]
66Masayasu Tanaka [1]
67Yuki Tanaka [21] [27]
68Kazuya Tanigawa [12] [22]
69N. Tokida [1]
70Toshiro Tsukada [33]
71Hiroshi Uchida [3]
72Hiroaki Ueno [8] [10]
73Tetsuya Yamaguchi [2] [8] [10]
74K. Yamaoka [17] [18] [19]
75Kyoji Yamashita [2] [8] [10]
76Yuji Yano [4]
77Tsutomu Yoshihara [9]
78Zhaomin Zhu [14] [22]

Colors in the list of coauthors

Copyright © Tue Nov 3 08:52:44 2009 by Michael Ley (ley@uni-trier.de)