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Igor L. Markov Vis

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*2009
138EESmita Krishnaswamy, Igor L. Markov, John P. Hayes: Improving testability and soft-error resilience through retiming. DAC 2009: 508-513
137EEKai-Hui Chang, Valeria Bertacco, Igor L. Markov: Customizing IP cores for system-on-chip designs using extensive external don't-cares. DATE 2009: 582-585
136EEKai-Hui Chang, David A. Papa, Igor L. Markov, Valeria Bertacco: Incremental Verification with Error Detection, Diagnosis, and Visualization. IEEE Design & Test of Computers 26(2): 34-43 (2009)
135EESmita Krishnaswamy, Stephen Plaza, Igor L. Markov, John P. Hayes: Signature-Based SER Analysis and Design of Logic Circuits. IEEE Trans. on CAD of Integrated Circuits and Systems 28(1): 74-86 (2009)
134EEJarrod A. Roy, Aaron N. Ng, Rajat Aggarwal, Venky Ramachandran, Igor L. Markov: Solving modern mixed-size placement instances. Integration 42(2): 262-275 (2009)
2008
133EEPaul T. Darga, Karem A. Sakallah, Igor L. Markov: Faster symmetry discovery using sparsity of symmetries. DAC 2008: 149-154
132EEJarrod A. Roy, Farinaz Koushanfar, Igor L. Markov: Protecting bus-based hardware IP by secret sharing. DAC 2008: 846-851
131EESmita Krishnaswamy, Igor L. Markov, John P. Hayes: On the role of timing masking in reliable logic circuit design. DAC 2008: 924-929
130EEJarrod A. Roy, Farinaz Koushanfar, Igor L. Markov: EPIC: Ending Piracy of Integrated Circuits. DATE 2008: 1069-1074
129EEStephen Plaza, Igor L. Markov, Valeria Bertacco: Random Stimulus Generation using Entropy and XOR Constraints. DATE 2008: 664-669
128EEJarrod A. Roy, Farinaz Koushanfar, Igor L. Markov: Circuit CAD Tools as a Security Threat. HOST 2008: 65-66
127EEJae-sun Seo, Igor L. Markov, Dennis Sylvester, David Blaauw: On the decreasing significance of large standard cells in technology mapping. ICCAD 2008: 116-121
126EEKai-Hui Chang, Igor L. Markov, Valeria Bertacco: Reap what you sow: spare cells for post-silicon metal fix. ISPD 2008: 103-110
125EEMichael D. Moffitt, Jarrod A. Roy, Igor L. Markov: The coming of age of (academic) global routing. ISPD 2008: 148-155
124EEDavid A. Papa, Tao Luo, Michael D. Moffitt, Chin-Ngai Sze, Zhuo Li, Gi-Joon Nam, Charles J. Alpert, Igor L. Markov: RUMBLE: an incremental, timing-driven, physical-synthesis optimization algorithm. ISPD 2008: 2-9
123EEStephen Plaza, Igor L. Markov, Valeria Bertacco: Optimizing non-monotonic interconnect using functional simulation and logic restructuring. ISPD 2008: 95-102
122EEJin Hu, Jarrod A. Roy, Igor L. Markov: Sidewinder: a scalable ILP-based router. SLIP 2008: 73-80
121EEAndrew A. Kennings, Igor L. Markov: Circuit Placement. Encyclopedia of Algorithms 2008
120EESmita Krishnaswamy, George F. Viamontes, Igor L. Markov, John P. Hayes: Probabilistic transfer matrices in symbolic reliability analysis of logic circuits. ACM Trans. Design Autom. Electr. Syst. 13(1): (2008)
119EEMichael D. Moffitt, Jarrod A. Roy, Igor L. Markov, Martha E. Pollack: Constraint-driven floorplan repair. ACM Trans. Design Autom. Electr. Syst. 13(4): (2008)
118EEKai-Hui Chang, Igor L. Markov, Valeria Bertacco: Automating Postsilicon Debugging and Repair. IEEE Computer 41(7): 47-54 (2008)
117EEKai-Hui Chang, Igor L. Markov, Valeria Bertacco: Fixing Design Errors With Counterexamples and Resynthesis. IEEE Trans. on CAD of Integrated Circuits and Systems 27(1): 184-188 (2008)
116EEStephen Plaza, Igor L. Markov, Valeria Bertacco: Optimizing Nonmonotonic Interconnect Using Functional Simulation and Logic Restructuring. IEEE Trans. on CAD of Integrated Circuits and Systems 27(12): 2107-2119 (2008)
115EEDavid A. Papa, Tao Luo, Michael D. Moffitt, Chin-Ngai Sze, Zhuo Li, Gi-Joon Nam, Charles J. Alpert, Igor L. Markov: RUMBLE: An Incremental Timing-Driven Physical-Synthesis Optimization Algorithm. IEEE Trans. on CAD of Integrated Circuits and Systems 27(12): 2156-2168 (2008)
114EEJarrod A. Roy, Igor L. Markov: High-Performance Routing at the Nanometer Scale. IEEE Trans. on CAD of Integrated Circuits and Systems 27(6): 1066-1077 (2008)
113EEKai-Hui Chang, Igor L. Markov, Valeria Bertacco: SafeResynth: A new technique for physical synthesis. Integration 41(4): 544-556 (2008)
112EEIgor L. Markov, Yaoyun Shi: Simulating Quantum Computation by Contracting Tensor Networks. SIAM J. Comput. 38(3): 963-981 (2008)
2007
111EEJarrod A. Roy, Igor L. Markov: ECO-system: Embracing the Change in Placement. ASP-DAC 2007: 147-152
110EEStephen Plaza, Kai-Hui Chang, Igor L. Markov, Valeria Bertacco: Node Mergers in the Presence of Don't Cares. ASP-DAC 2007: 414-419
109EEKai-Hui Chang, Igor L. Markov, Valeria Bertacco: Safe Delay Optimization for Physical Synthesis. ASP-DAC 2007: 628-633
108EEKai-Hui Chang, Igor L. Markov, Valeria Bertacco: Fixing Design Errors with Counterexamples and Resynthesis. ASP-DAC 2007: 944-949
107EESmita Krishnaswamy, Stephen Plaza, Igor L. Markov, John P. Hayes: Enhancing design robustness with reliability-aware resynthesis and logic simulation. ICCAD 2007: 149-154
106EEJarrod A. Roy, Igor L. Markov: High-performance routing at the nanometer scale. ICCAD 2007: 496-502
105EEGeorge F. Viamontes, Igor L. Markov, John P. Hayes: Checking equivalence of quantum circuits and states. ICCAD 2007: 69-74
104EEKai-Hui Chang, Igor L. Markov, Valeria Bertacco: Automating post-silicon debugging and repair. ICCAD 2007: 91-98
103EEKai-Hui Chang, David A. Papa, Igor L. Markov, Valeria Bertacco: InVerS: An Incremental Verification System with Circuit Similarity Metrics and Error Visualization. ISQED 2007: 487-494
102EEFadi A. Aloul, Arathi Ramani, Igor L. Markov, Karem A. Sakallah: Symmetry breaking for pseudo-Boolean formulas. ACM Journal of Experimental Algorithmics 12: (2007)
101EEKai-Hui Chang, Igor L. Markov, Valeria Bertacco: Postplacement rewiring by exhaustive search for functional symmetries. ACM Trans. Design Autom. Electr. Syst. 12(3): (2007)
100EEIgor L. Markov, Yaoyun Shi: Constant-degree graph expansions that preserve the treewidth CoRR abs/0707.3622: (2007)
99EESmita Krishnaswamy, Igor L. Markov, John P. Hayes: Tracking Uncertainty with Probabilistic Logic Circuit Testing. IEEE Design & Test of Computers 24(4): 312-321 (2007)
98EEFadi A. Aloul, Arathi Ramani, Karem A. Sakallah, Igor L. Markov: Solution and Optimization of Systems of Pseudo-Boolean Constraints. IEEE Trans. Computers 56(10): 1415-1424 (2007)
97EEKai-Hui Chang, Valeria Bertacco, Igor L. Markov: Simulation-Based Bug Trace Minimization With BMC-Based Refinement. IEEE Trans. on CAD of Integrated Circuits and Systems 26(1): 152-165 (2007)
96EEJarrod A. Roy, Igor L. Markov: ECO-System: Embracing the Change in Placement. IEEE Trans. on CAD of Integrated Circuits and Systems 26(12): 2173-2185 (2007)
95EEJarrod A. Roy, Igor L. Markov: Seeing the Forest and the Trees: Steiner Wirelength Optimization in Placement. IEEE Trans. on CAD of Integrated Circuits and Systems 26(4): 632-644 (2007)
94EEIgor L. Markov, Louis Scheffer, Dirk Stroobandt: Special issue on System-Level Interconnect Prediction. Integration 40(4): 381 (2007)
2006
93EEDavid A. Papa, Igor L. Markov, Philip Chong: Utility of the OpenAccess database in academic research. ASP-DAC 2006: 440-441
92EEMichael D. Moffitt, Aaron N. Ng, Igor L. Markov, Martha E. Pollack: Constraint-driven floorplan repair. DAC 2006: 1103-1108
91EERamashis Das, Igor L. Markov, John P. Hayes: On-Chip Test Generation Using Linear Subspaces. European Test Symposium 2006: 111-116
90EEAaron N. Ng, Igor L. Markov, Rajat Aggarwal, Venky Ramachandran: Solving hard instances of floorplacement. ISPD 2006: 170-177
89EEJarrod A. Roy, David A. Papa, Aaron N. Ng, Igor L. Markov: Satisfying whitespace requirements in top-down placement. ISPD 2006: 206-208
88EEJarrod A. Roy, James F. Lu, Igor L. Markov: Seeing the forest and the trees: Steiner wirelength optimization in placemen. ISPD 2006: 78-85
87EEKrysta Marie Svore, Alfred V. Aho, Andrew W. Cross, Isaac L. Chuang, Igor L. Markov: A Layered Software Architecture for Quantum Computing Design Tools. IEEE Computer 39(1): 74-83 (2006)
86EEFadi A. Aloul, Karem A. Sakallah, Igor L. Markov: Efficient Symmetry Breaking for Boolean Satisfiability. IEEE Trans. Computers 55(5): 549-558 (2006)
85EEVivek V. Shende, Stephen S. Bullock, Igor L. Markov: Synthesis of quantum-logic circuits. IEEE Trans. on CAD of Integrated Circuits and Systems 25(6): 1000-1010 (2006)
84EEJarrod A. Roy, Saurabh N. Adya, David A. Papa, Igor L. Markov: Min-cut floorplacement. IEEE Trans. on CAD of Integrated Circuits and Systems 25(7): 1313-1326 (2006)
83EESaurabh N. Adya, Igor L. Markov, Paul G. Villarrubia: On whitespace and stability in physical synthesis. Integration 39(4): 340-362 (2006)
82EEArathi Ramani, Igor L. Markov, Karem A. Sakallah, Fadi A. Aloul: Breaking Instance-Independent Symmetries In Exact Graph Coloring. J. Artif. Intell. Res. (JAIR) 26: 289-322 (2006)
81EEAditya K. Prasad, Vivek V. Shende, Igor L. Markov, John P. Hayes, Ketan N. Patel: Data structures and algorithms for simplifying reversible circuits. JETC 2(4): 277-293 (2006)
2005
80 Igor L. Markov, Mike Hutton: The Seventh International Workshop on System-Level Interconnect Prediction (SLIP 2005), San Francisco, CA, USA, April 2-3, 2005, Proceedings ACM 2005
79EEVivek V. Shende, Stephen S. Bullock, Igor L. Markov: Synthesis of quantum logic circuits. ASP-DAC 2005: 272-275
78EEFadi A. Aloul, Arathi Ramani, Igor L. Markov, Karem A. Sakallah: Dynamic symmetry-breaking for improved Boolean optimization. ASP-DAC 2005: 445-450
77EESmita Krishnaswamy, George F. Viamontes, Igor L. Markov, John P. Hayes: Accurate Reliability Evaluation and Enhancement via Probabilistic Transfer Matrices. DATE 2005: 282-287
76EEIgor L. Markov, Dmitri Maslov: Uniformly-Switching Logic for Cryptographic Hardware. DATE 2005: 432-433
75 Kai-Hui Chang, Valeria Bertacco, Igor L. Markov: Simulation-based bug trace minimization with BMC-based refinement. ICCAD 2005: 1045-1051
74 Kai-Hui Chang, Igor L. Markov, Valeria Bertacco: Post-placement rewiring and rebuffering by exhaustive search for functional symmetries. ICCAD 2005: 56-63
73EEHayward H. Chan, Saurabh N. Adya, Igor L. Markov: Are floorplan representations important in digital design? ISPD 2005: 129-136
72EEJarrod A. Roy, David A. Papa, Saurabh N. Adya, Hayward H. Chan, Aaron N. Ng, James F. Lu, Igor L. Markov: Capo: robust and scalable open-source min-cut floorplacer. ISPD 2005: 224-226
71EEZhong Xiu, David A. Papa, Philip Chong, Christoph Albrecht, Andreas Kuehlmann, Rob A. Rutenbar, Igor L. Markov: Early research experience with OpenAccess gear: an open source development environment for physical design. ISPD 2005: 94-100
70EEAaron N. Ng, Igor L. Markov: Toward Quality EDA Tools and Tool Flows Through High-Performance Computing. ISQED 2005: 22-27
69EESaurabh N. Adya, Igor L. Markov: Combinatorial techniques for mixed-size placement. ACM Trans. Design Autom. Electr. Syst. 10(1): 58-90 (2005)
68EEDoRon B. Motter, Jarrod A. Roy, Igor L. Markov: Resolution cannot polynomially simulate compressed-BFS. Ann. Math. Artif. Intell. 44(1-2): 121-156 (2005)
2004
67 Louis Scheffer, Igor L. Markov: The Sixth International Workshop on System-Level Interconnect Prediction (SLIP 2004), Paris, France, February 14-15, 2004, Proceedings ACM 2004
66EEDavid A. Papa, Saurabh N. Adya, Igor L. Markov: Constructive benchmarking for placement. ACM Great Lakes Symposium on VLSI 2004: 113-118
65EEAndrew B. Kahng, Igor L. Markov, Sherief Reda: On legalization of row-based placements. ACM Great Lakes Symposium on VLSI 2004: 214-219
64EEHayward H. Chan, Igor L. Markov: Practical slicing and non-slicing block-packing without simulated annealing. ACM Great Lakes Symposium on VLSI 2004: 282-287
63EEFadi A. Aloul, Arathi Ramani, Igor L. Markov, Karem A. Sakallah: ShatterPB: symmetry-breaking for pseudo-Boolean formulas. ASP-DAC 2004: 883-886
62EEArathi Ramani, Igor L. Markov: Automatically Exploiting Symmetries in Constraint Programming. CSCLP 2004: 98-112
61EEYoonna Oh, Maher N. Mneimneh, Zaher S. Andraus, Karem A. Sakallah, Igor L. Markov: AMUSE: a minimally-unsatisfiable subformula extractor. DAC 2004: 518-523
60EEPaul T. Darga, Mark H. Liffiton, Karem A. Sakallah, Igor L. Markov: Exploiting structure in symmetry detection for CNF. DAC 2004: 530-534
59EEAndrew B. Kahng, Igor L. Markov, Sherief Reda: Boosting: Min-Cut Placement with Improved Signal Delay. DATE 2004: 1098-1103
58EEGeorge F. Viamontes, Igor L. Markov, John P. Hayes: High-Performance QuIDD-Based Simulation of Quantum Circuits. DATE 2004: 1354-1355
57EEArathi Ramani, Fadi A. Aloul, Igor L. Markov, Karem A. Sakallah: Breaking Instance-Independent Symmetries in Exact Graph Coloring. DATE 2004: 324-331
56EEVivek V. Shende, Igor L. Markov, Stephen S. Bullock: Smaller Two-Qubit Circuits for Quantum Communication and Computation. DATE 2004: 980-987
55EESaurabh N. Adya, S. Chaturvedi, Jarrod A. Roy, David A. Papa, Igor L. Markov: Unification of partitioning, placement and floorplanning. ICCAD 2004: 550-557
54EEKetan N. Patel, Igor L. Markov: Error-correction and crosstalk avoidance in DSM busses. IEEE Trans. VLSI Syst. 12(10): 1076-1080 (2004)
53EESaurabh N. Adya, Mehmet Can Yildiz, Igor L. Markov, Paul Villarrubia, Phiroze N. Parakh, Patrick H. Madden: Benchmarking for large-scale placement and beyond. IEEE Trans. on CAD of Integrated Circuits and Systems 23(4): 472-487 (2004)
52EEKetan N. Patel, John P. Hayes, Igor L. Markov: Fault testing for reversible circuits. IEEE Trans. on CAD of Integrated Circuits and Systems 23(8): 1220-1230 (2004)
51EEFadi A. Aloul, Igor L. Markov, Karem A. Sakallah: MINCE: A Static Global Variable-Ordering Heuristic for SAT Search and BDD Manipulation. J. UCS 10(12): 1562-1596 (2004)
2003
50EEFadi A. Aloul, Igor L. Markov, Karem A. Sakallah: FORCE: a fast and easy-to-implement variable-ordering heuristic. ACM Great Lakes Symposium on VLSI 2003: 116-119
49EEStephen S. Bullock, Igor L. Markov: An arbitrary twoqubit computation In 23 elementary gates or less. DAC 2003: 324-329
48EEFadi A. Aloul, Igor L. Markov, Karem A. Sakallah: Shatter: efficient symmetry-breaking for boolean satisfiability. DAC 2003: 836-839
47EESaurabh N. Adya, Igor L. Markov, Paul Villarrubia: On Whitespace and Stability in Mixed-Size Placement and Physical Synthesis. ICCAD 2003: 311-319
46 Arathi Ramani, Igor L. Markov: Combining Two Local Search Approaches to Hypergraph Partitioning. IJCAI 2003: 1546-
45 Fadi A. Aloul, Karem A. Sakallah, Igor L. Markov: Efficient Symmetry Breaking for Boolean Satisfiability. IJCAI 2003: 271-276
44EESaurabh N. Adya, Mehmet Can Yildiz, Igor L. Markov, Paul Villarrubia, Phiroze N. Parakh, Patrick H. Madden: Benchmarking for large-scale placement and beyond. ISPD 2003: 95-103
43EEAndrew B. Kahng, Igor L. Markov: Impact of Interoperability on CAD-IP Reuse: An Academic Viewpoint. ISQED 2003: 208-213
42EEKetan N. Patel, Igor L. Markov: Error-correction and crosstalk avoidance in DSM busses. SLIP 2003: 9-14
41EEKetan N. Patel, John P. Hayes, Igor L. Markov: Fault Testing for Reversible Circuits. VTS 2003: 410-416
40EEYu Cao, Chenming Hu, Xuejue Huang, Andrew B. Kahng, Igor L. Markov, Michael Oliver, Dirk Stroobandt, Dennis Sylvester: Improved a priori interconnect predictions and technology extrapolation in the GTX system. IEEE Trans. VLSI Syst. 11(1): 3-14 (2003)
39EESaurabh N. Adya, Igor L. Markov: Fixed-outline floorplanning: enabling hierarchical design. IEEE Trans. VLSI Syst. 11(6): 1120-1135 (2003)
38EEAndrew E. Caldwell, Andrew B. Kahng, Igor L. Markov: Hierarchical whitespace allocation in top-down placement. IEEE Trans. on CAD of Integrated Circuits and Systems 22(11): 1550-1556 (2003)
37EEVivek V. Shende, Aditya K. Prasad, Igor L. Markov, John P. Hayes: Synthesis of reversible logic circuits. IEEE Trans. on CAD of Integrated Circuits and Systems 22(6): 710-722 (2003)
36EEFadi A. Aloul, Arathi Ramani, Igor L. Markov, Karem A. Sakallah: Solving difficult instances of Boolean satisfiability in the presence of symmetry. IEEE Trans. on CAD of Integrated Circuits and Systems 22(9): 1117-1137 (2003)
2002
35EEDoRon B. Motter, Igor L. Markov: A Compressed Breadth-First Search for Satisfiability. ALENEX 2002: 29-42
34EEFadi A. Aloul, Arathi Ramani, Igor L. Markov, Karem A. Sakallah: Solving difficult SAT instances in the presence of symmetry. DAC 2002: 731-736
33EEVivek V. Shende, Aditya K. Prasad, Igor L. Markov, John P. Hayes: Reversible logic circuit synthesis. ICCAD 2002: 353-360
32EEFadi A. Aloul, Arathi Ramani, Igor L. Markov, Karem A. Sakallah: Generic ILP versus specialized 0-1 ILP: an update. ICCAD 2002: 450-457
31EEFadi A. Aloul, Igor L. Markov, Karem A. Sakallah: Improving the Efficiency of Circuit-to-BDD Conversion by Gate and Input Ordering. ICCD 2002: 64-69
30EESaurabh N. Adya, Igor L. Markov: Consistent placement of macro-blocks using floorplanning and standard-cell placement. ISPD 2002: 12-17
29EEAndrew B. Kahng, Stefanus Mantik, Igor L. Markov: Min-max placement for large-scale timing optimization. ISPD 2002: 143-148
28 Vivek V. Shende, Aditya K. Prasad, Igor L. Markov, John P. Hayes: Reversible Logic Circuit Synthesis. IWLS 2002: 125-130
27 Fadi A. Aloul, Igor L. Markov, Karem A. Sakallah: Efficient Gate and Input Ordering for Circuit-to-BDD Conversion. IWLS 2002: 137-142
26 DoRon B. Motter, Igor L. Markov: Overcoming Resolution-Based Lower Bounds for SAT Solvers. IWLS 2002: 373-378
25EEAndrew E. Caldwell, Igor L. Markov: Toward CAD-IP Reuse: A Web Bookshelf of Fundamental Algorithms. IEEE Design & Test of Computers 19(3): 72-81 (2002)
2001
24EEFadi A. Aloul, Igor L. Markov, Karem A. Sakallah: Faster SAT and Smaller BDDs via Common Function Structure. ICCAD 2001: 443-448
23 Saurabh N. Adya, Igor L. Markov: Fixed-outline Floorplanning through Better Local Search. ICCD 2001: 328-334
22EEAndrew B. Kahng, John Lach, William H. Mangione-Smith, Stefanus Mantik, Igor L. Markov, Miodrag Potkonjak, Paul Tucker, Huijuan Wang, Gregory Wolfe: Constraint-based watermarking techniques for design IP protection. IEEE Trans. on CAD of Integrated Circuits and Systems 20(10): 1236-1252 (2001)
2000
21EEAndrew A. Kennings, Igor L. Markov: Analytical minimization of half-perimeter wirelength. ASP-DAC 2000: 179-184
20EEAndrew E. Caldwell, Andrew B. Kahng, Igor L. Markov: Improved algorithms for hypergraph bipartitioning. ASP-DAC 2000: 661-666
19EEAndrew E. Caldwell, Andrew B. Kahng, Igor L. Markov: Can recursive bisection alone produce routable placements? DAC 2000: 477-482
18EEAndrew E. Caldwell, Yu Cao, Andrew B. Kahng, Farinaz Koushanfar, Hua Lu, Igor L. Markov, Michael Oliver, Dirk Stroobandt, Dennis Sylvester: GTX: the MARCO GSRC technology extrapolation system. DAC 2000: 693-698
17EEOlivier Coudert, Igor L. Markov, Christoph Meinel, Ellen Sentovich: Web-based frameworks to enable CAD RD (abstract). DAC 2000: 711
16EEAndrew E. Caldwell, Andrew B. Kahng, Igor L. Markov: Design and Implementation of Move-Based Heuristics for VLSI Hypergraph Partitioning. ACM Journal of Experimental Algorithmics 5: 5 (2000)
15EEAndrew E. Caldwell, Andrew B. Kahng, Igor L. Markov: Optimal partitioners and end-case placers for standard-cell layout. IEEE Trans. on CAD of Integrated Circuits and Systems 19(11): 1304-1313 (2000)
14EECharles J. Alpert, Andrew E. Caldwell, Andrew B. Kahng, Igor L. Markov: Hypergraph partitioning with fixed vertices [VLSI CAD]. IEEE Trans. on CAD of Integrated Circuits and Systems 19(2): 267-272 (2000)
1999
13EEAndrew E. Caldwell, Andrew B. Kahng, Igor L. Markov: Design and Implementation of the Fiduccia-Mattheyses Heuristic for VLSI Netlist Partitioning. ALENEX 1999: 177-193
12EERoss Baldick, Andrew B. Kahng, Andrew A. Kennings, Igor L. Markov: Function Smoothing with Applications to VLSI Layout. ASP-DAC 1999: 225-
11EEAndrew E. Caldwell, Andrew B. Kahng, Andrew A. Kennings, Igor L. Markov: Hypergraph Partitioning for VLSI CAD: Methodology for Heuristic Development, Experimentation and Reporting. DAC 1999: 349-354
10EEAndrew E. Caldwell, Andrew B. Kahng, Igor L. Markov: Hypergraph Partitioning with Fixed Vertices. DAC 1999: 355-359
9EECharles J. Alpert, Andrew E. Caldwell, Andrew B. Kahng, Igor L. Markov: Partitioning with terminals: a "new" problem and new benchmarks. ISPD 1999: 151-157
8EEAndrew E. Caldwell, Andrew B. Kahng, Igor L. Markov: Optimal partitioners and end-case placers for standard-cell layout. ISPD 1999: 90-96
7EEAndrew E. Caldwell, Andrew B. Kahng, Stefanus Mantik, Igor L. Markov, Alexander Zelikovsky: On wirelength estimations for row-based placement. IEEE Trans. on CAD of Integrated Circuits and Systems 18(9): 1265-1278 (1999)
1998
6EEAndrew B. Kahng, John Lach, William H. Mangione-Smith, Stefanus Mantik, Igor L. Markov, Miodrag Potkonjak, Paul Tucker, Huijuan Wang, Gregory Wolfe: Watermarking Techniques for Intellectual Property Protection. DAC 1998: 776-781
5EEAndrew B. Kahng, Stefanus Mantik, Igor L. Markov, Miodrag Potkonjak, Paul Tucker, Huijuan Wang, Gregory Wolfe: Robust IP Watermarking Methodologies for Physical Design. DAC 1998: 782-787
4EEAndrew E. Caldwell, Andrew B. Kahng, Stefanus Mantik, Igor L. Markov, Alexander Zelikovsky: On wirelength estimations for row-based placement. ISPD 1998: 4-11
3EECharles J. Alpert, Tony F. Chan, Andrew B. Kahng, Igor L. Markov, Pep Mulet: Faster minimization of linear wirelength for global placement. IEEE Trans. on CAD of Integrated Circuits and Systems 17(1): 3-13 (1998)
1997
2EECharles J. Alpert, Tony F. Chan, Dennis J.-H. Huang, Igor L. Markov, Kenneth Yan: Quadratic Placement Revisited. DAC 1997: 752-757
1EECharles J. Alpert, Tony F. Chan, Dennis J.-H. Huang, Andrew B. Kahng, Igor L. Markov, Pep Mulet, Kenneth Yan: Faster minimization of linear wirelength for global placement. ISPD 1997: 4-11

Coauthor Index

1Saurabh N. Adya [23] [30] [39] [44] [47] [53] [55] [66] [69] [72] [73] [83] [84]
2Rajat Aggarwal [90] [134]
3Alfred V. Aho [87]
4Christoph Albrecht [71]
5Fadi A. Aloul [24] [27] [31] [32] [34] [36] [45] [48] [50] [51] [57] [63] [78] [82] [86] [98] [102]
6Charles J. Alpert [1] [2] [3] [9] [14] [115] [124]
7Zaher S. Andraus [61]
8Ross Baldick [12]
9Valeria Bertacco [74] [75] [97] [101] [103] [104] [108] [109] [110] [113] [116] [117] [118] [123] [126] [129] [136] [137]
10David Blaauw (David T. Blaauw) [127]
11Stephen S. Bullock [49] [56] [79] [85]
12Andrew E. Caldwell [4] [7] [8] [9] [10] [11] [13] [14] [15] [16] [18] [19] [20] [25] [38]
13Yu Cao [18] [40]
14Hayward H. Chan [64] [72] [73]
15Tony F. Chan [1] [2] [3]
16Kai-Hui Chang [74] [75] [97] [101] [103] [104] [108] [109] [110] [113] [117] [118] [126] [136] [137]
17S. Chaturvedi [55]
18Philip Chong [71] [93]
19Isaac L. Chuang [87]
20Olivier Coudert [17]
21Andrew W. Cross [87]
22Paul T. Darga [60] [133]
23Ramashis Das [91]
24John P. Hayes [28] [33] [37] [41] [52] [58] [77] [81] [91] [99] [105] [107] [120] [131] [135] [138]
25Chenming Hu [40]
26Jin Hu [122]
27Dennis J.-H. Huang (Jen-Hsin Huang) [1] [2]
28Xuejue Huang [40]
29Michael Hutton (Michael D. Hutton, Mike Hutton) [80]
30Andrew B. Kahng [1] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] [13] [14] [15] [16] [18] [19] [20] [22] [29] [38] [40] [43] [59] [65]
31Andrew A. Kennings [11] [12] [21] [121]
32Farinaz Koushanfar [18] [128] [130] [132]
33Smita Krishnaswamy [77] [99] [107] [120] [131] [135] [138]
34Andreas Kuehlmann [71]
35John Lach [6] [22]
36Zhuo Li [115] [124]
37Mark H. Liffiton [60]
38James F. Lu [72] [88]
39Hua Lu [18]
40Tao Luo [115] [124]
41Patrick H. Madden [44] [53]
42William H. Mangione-Smith [6] [22]
43Stefanus Mantik [4] [5] [6] [7] [22] [29]
44Dmitri Maslov [76]
45Christoph Meinel [17]
46Maher N. Mneimneh [61]
47Michael D. Moffitt [92] [115] [119] [124] [125]
48DoRon B. Motter [26] [35] [68]
49Pep Mulet [1] [3]
50Gi-Joon Nam [115] [124]
51Aaron N. Ng [70] [72] [89] [90] [92] [134]
52Yoonna Oh [61]
53Michael Oliver [18] [40]
54David A. Papa [55] [66] [71] [72] [84] [89] [93] [103] [115] [124] [136]
55Phiroze N. Parakh [44] [53]
56Ketan N. Patel [41] [42] [52] [54] [81]
57Stephen Plaza [107] [110] [116] [123] [129] [135]
58Martha E. Pollack [92] [119]
59Miodrag Potkonjak [5] [6] [22]
60Aditya K. Prasad [28] [33] [37] [81]
61Venky Ramachandran [90] [134]
62Arathi Ramani [32] [34] [36] [46] [57] [62] [63] [78] [82] [98] [102]
63Sherief Reda [59] [65]
64Jarrod A. Roy [55] [68] [72] [84] [88] [89] [95] [96] [106] [111] [114] [119] [122] [125] [128] [130] [132] [134]
65Rob A. Rutenbar [71]
66Karem A. Sakallah [24] [27] [31] [32] [34] [36] [45] [48] [50] [51] [57] [60] [61] [63] [78] [82] [86] [98] [102] [133]
67Louis Scheffer [67] [94]
68Ellen Sentovich (Ellen M. Sentovich) [17]
69Jae-sun Seo [127]
70Vivek V. Shende [28] [33] [37] [56] [79] [81] [85]
71Yaoyun Shi [100] [112]
72Dirk Stroobandt [18] [40] [94]
73Krysta Marie Svore [87]
74Dennis Sylvester [18] [40] [127]
75Chin-Ngai Sze [115] [124]
76Paul Tucker [5] [6] [22]
77George F. Viamontes [58] [77] [105] [120]
78Paul G. Villarrubia (Paul Villarrubia) [44] [47] [53] [83]
79Huijuan Wang [5] [6] [22]
80Gregory Wolfe [5] [6] [22]
81Zhong Xiu [71]
82Kenneth Yan [1] [2]
83Mehmet Can Yildiz [44] [53]
84Alexander Zelikovsky [4] [7]

Colors in the list of coauthors

Copyright © Tue Nov 3 08:52:44 2009 by Michael Ley (ley@uni-trier.de)