| * | 2009 |
|---|
| 6 | EE | Anselme Vignon,
Stefan Cosemans,
Wim Dehaene,
Pol Marchal,
Marco Facchini:
A novel DRAM architecture as a low leakage alternative for SRAM caches in a 3D interconnect context.
DATE 2009: 929-933 |
| 2007 |
|---|
| 5 | EE | Francesco Poletti,
Antonio Poggiali,
Davide Bertozzi,
Luca Benini,
Pol Marchal,
Mirko Loghi,
Massimo Poncino:
Energy-Efficient Multiprocessor Systems-on-Chip for Embedded Computing: Exploring Programming Models and Their Architectural Support.
IEEE Trans. Computers 56(5): 606-621 (2007) |
| 2006 |
|---|
| 4 | EE | Jin Guo,
Antonis Papanikolaou,
Pol Marchal,
Francky Catthoor:
Physical design implementation of segmented buses to reduce communication energy.
ASP-DAC 2006: 42-47 |
| 3 | EE | Jin Guo,
Antonis Papanikolaou,
Pol Marchal,
Francky Catthoor:
Energy/area/delay trade-offs in the physical design of on-chip segmented bus architecture.
SLIP 2006: 75-81 |
| 2 | EE | Antonis Papanikolaou,
Miguel Miranda,
Hua Wang,
Francky Catthoor,
M. Satyakiran,
Pol Marchal,
Ben Kaczer,
C. Bruynseraede,
Zsolt Tokei:
Reliability issues in deep deep sub-micron technologies: time-dependent variability and its impact on embedded system design.
VLSI-SoC 2006: 342-347 |
| 2005 |
|---|
| 1 | EE | Mohammed Javed Absar,
Pol Marchal,
Francky Catthoor:
Data-Access Optimization of Embedded Systems Through Selective Inlining Transformation.
ESTImedia 2005: 75-80 |
