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Alberto Macii

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2008
57EEAshoka Visweswara Sathanur, Antonio Pullini, Luca Benini, Alberto Macii, Enrico Macii, Massimo Poncino: Optimal sleep transistor synthesis under timing and area constraints. ACM Great Lakes Symposium on VLSI 2008: 177-182
2007
56EEAndrea Calimera, Antonio Pullini, Ashoka Visweswara Sathanur, Luca Benini, Alberto Macii, Enrico Macii, Massimo Poncino: Design of a family of sleep transistor cells for a clustered power-gating flow in 65nm technology. ACM Great Lakes Symposium on VLSI 2007: 501-504
55EEA. Sathanur, Andrea Calimera, Luca Benini, Alberto Macii, Enrico Macii, Massimo Poncino: Interactive presentation: Efficient computation of discharge current upper bounds for clustered sleep transistor sizing. DATE 2007: 1544-1549
54EEKarthik Duraisami, Prassanna Sithambaram, A. Sathanur, Alberto Macii, Enrico Macii, Massimo Poncino: Design Exploration of a Thermal Management Unit for Dynamic Control of Temperature-Induced Clock Skew. ISCAS 2007: 1061-1064
53EEAshoka Visweswara Sathanur, Antonio Pullini, Luca Benini, Alberto Macii, Enrico Macii, Massimo Poncino: Timing-driven row-based power gating. ISLPED 2007: 104-109
52EEPrassanna Sithambaram, Alberto Macii, Enrico Macii: New Adaptive Encoding Schemes for Switching Activity Balancing in On-Chip Buses. PATMOS 2007: 232-241
2006
51EEAshutosh Chakraborty, Prassanna Sithambaram, Karthik Duraisami, Alberto Macii, Enrico Macii, Massimo Poncino: Thermal resilient bounded-skew clock tree optimization methodology. DATE 2006: 832-837
50EEPietro Babighian, Luca Benini, Alberto Macii, Enrico Macii: Enabling fine-grain leakage management by voltage anchor insertion. DATE 2006: 868-873
49EEAshutosh Chakraborty, Karthik Duraisami, Ashoka Visweswara Sathanur, Prassanna Sithambaram, Alberto Macii, Enrico Macii, Massimo Poncino: Implications of ultra low-voltage devices on design techniques for controlling leakage in NanoCMOS circuits. ISCAS 2006
48EEAshutosh Chakraborty, Karthik Duraisami, Ashoka Visweswara Sathanur, Prassanna Sithambaram, Luca Benini, Alberto Macii, Enrico Macii, Massimo Poncino: Dynamic thermal clock skew compensation using tunable delay buffers. ISLPED 2006: 162-167
47EEAshutosh Chakraborty, Karthik Duraisami, Ashoka Visweswara Sathanur, Prassanna Sithambaram, Alberto Macii, Enrico Macii, Massimo Poncino: Dynamic Management of Thermally-Induced Clock Skew: An Implementation Perspective. PATMOS 2006: 214-224
2005
46EEPietro Babighian, Luca Benini, Alberto Macii, Enrico Macii: Low-overhead state-retaining elements for low-leakage MTCMOS design. ACM Great Lakes Symposium on VLSI 2005: 367-370
45EEPrassanna Sithambaram, Alberto Macii, Enrico Macii: Exploring the impact of architectural parameters on energy efficiency of application-specific block-enabled SRAMs. ACM Great Lakes Symposium on VLSI 2005: 377-380
44EEPrassanna Sithambaram, Alberto Macii, Enrico Macii: Design and Implementation of a Memory Generator for Low-Energy Application-Specific Block-Enabled SRAMs. PATMOS 2005: 477-487
2004
43EELuca Benini, Alessandro Ivaldi, Alberto Macii, Enrico Macii: Block-Enabled Memory Macros: Design Space Exploration and Application-Specific Tuning. DATE 2004: 698-699
42EEPietro Babighian, Luca Benini, Alberto Macii, Enrico Macii: Post-layout leakage power minimization based on distributed sleep transistor insertion. ISLPED 2004: 138-143
41 Luca Benini, Davide Bruni, Alberto Macii, Enrico Macii: Memory energy minimization by data compression: algorithms, architectures and implementation. IEEE Trans. VLSI Syst. 12(3): 255-268 (2004)
2003
40EELuca Benini, Alberto Macii, Enrico Macii, Elvira Omerbegovic, Massimo Poncino, Fabrizio Pro: A novel architecture for power maskable arithmetic units. ACM Great Lakes Symposium on VLSI 2003: 136-140
39EELuca Benini, Alberto Macii, Enrico Macii, Elvira Omerbegovic, Fabrizio Pro, Massimo Poncino: Energy-aware design techniques for differential power analysis protection. DAC 2003: 36-41
38EEAlberto Macii, Enrico Macii, Massimo Poncino: Improving the Efficiency of Memory Partitioning by Address Clustering. DATE 2003: 10018-10023
37EEAlberto Macii, Enrico Macii, Fabrizio Crudo, Roberto Zafalon: A New Algorithm for Energy-Driven Data Compression in VLIW Embedded Processors. DATE 2003: 10024-10029
36EEAlberto Macii, Enrico Macii, Massimo Poncino: Increasing the locality of memory access patterns by low-overhead hardware address relocation. ISCAS (5) 2003: 385-388
35EELuca Benini, Angelo Galati, Alberto Macii, Enrico Macii, Massimo Poncino: Energy-efficient data scrambling on memory-processor interfaces. ISLPED 2003: 26-29
34EELuca Benini, Davide Bruni, Alberto Macii, Enrico Macii: Hardw are Implementation of Data Compression Algorithms for Memory Energy Optimization. ISVLSI 2003: 250-251
33EEMaurizio Bruno, Alberto Macii, Massimo Poncino: A Statistic Power Model for Non-synthetic RTL Operators. PATMOS 2003: 208-218
32EELuca Benini, Alberto Macii, Massimo Poncino: Energy-aware design of embedded memories: A survey of technologies, architectures, and optimization techniques. ACM Trans. Embedded Comput. Syst. 2(1): 5-32 (2003)
31EELuca Benini, Davide Bruni, Alberto Macii, Enrico Macii, Massimo Poncino: Discharge Current Steering for Battery Lifetime Optimization. IEEE Trans. Computers 52(8): 985-995 (2003)
30EELuca Benini, Alberto Macii, Enrico Macii, Massimo Poncino, Riccardo Scarsi: Scheduling battery usage in mobile systems. IEEE Trans. VLSI Syst. 11(6): 1136-1143 (2003)
2002
29EEMonica Donno, Luca Macchiarulo, Alberto Macii, Enrico Macii, Massimo Poncino: Enhanced clustered voltage scaling for low power. ACM Great Lakes Symposium on VLSI 2002: 18-23
28EELuca Benini, Davide Bruni, Alberto Macii, Enrico Macii: Hardware-Assisted Data Compression for Energy Minimization in Systems with Embedded Processors. DATE 2002: 449-450
27EELuca Benini, Davide Bruni, Bruno Riccò, Alberto Macii, Enrico Macii: An adaptive data compression scheme for memory traffic minimization in processor-based systems. ISCAS (4) 2002: 866-869
26EELuca Benini, Alberto Macii, Enrico Macii, Massimo Poncino: Discharge current steering for battery lifetime optimization. ISLPED 2002: 118-123
25EELuca Benini, Alberto Macii, Enrico Macii: Offline Data Profiling Techniques to Enhance Memory Compression in Embedded Systems. PATMOS 2002: 314-322
24EELuca Benini, Luca Macchiarulo, Alberto Macii, Massimo Poncino: Layout-driven memory synthesis for embedded systems-on-chip. IEEE Trans. VLSI Syst. 10(2): 96-105 (2002)
23EELuca Benini, Alberto Macii, Enrico Macii, Massimo Poncino: Minimizing memory access energy in embedded systems by selective instruction compression. IEEE Trans. VLSI Syst. 10(5): 521-531 (2002)
2001
22EELuca Benini, Luca Macchiarulo, Alberto Macii, Enrico Macii, Massimo Poncino: From Architecture to Layout: Partitioned Memory Synthesis for Embedded Systems-on-Chip. DAC 2001: 784-789
21EELuca Benini, Giuliano Castelli, Alberto Macii, Enrico Macii, Massimo Poncino, Riccardo Scarsi: Extending lifetime of portable systems by battery scheduling. DATE 2001: 197-203
20EELuca Benini, Alberto Macii, Alberto Nannarelli: Cached-code compression for energy minimization in embedded processors. ISLPED 2001: 322-327
19EELuca Benini, Giuliano Castelli, Alberto Macii, Riccardo Scarsi: Battery-Driven Dynamic Power Management. IEEE Design & Test of Computers 18(2): 53-60 (2001)
18EEAlberto Macii, Enrico Macii, Massimo Poncino, Riccardo Scarsi: Stream synthesis for efficient power simulation based on spectral transforms. IEEE Trans. VLSI Syst. 9(3): 417-426 (2001)
17EELuca Benini, Giuliano Castelli, Alberto Macii, Enrico Macii, Massimo Poncino, Riccardo Scarsi: Discrete-time battery models for system-level low-power design. IEEE Trans. VLSI Syst. 9(5): 630-640 (2001)
2000
16EELuca Benini, Marco Ferrero, Alberto Macii, Enrico Macii, Massimo Poncino: Supporting system-level power exploration for DSP applications. ACM Great Lakes Symposium on VLSI 2000: 17-22
15EELuca Benini, Alberto Macii, Enrico Macii, Massimo Poncino: Synthesis of application-specific memories for power optimization in embedded systems. DAC 2000: 300-303
14EELuca Benini, Giuliano Castelli, Alberto Macii, Enrico Macii, Massimo Poncino, Riccardo Scarsi: A Discrete-Time Battery Model for High-Level Power Estimation. DATE 2000: 35-
13EELuca Benini, Alberto Macii, Massimo Poncino: A recursive algorithm for low-power memory partitioning. ISLPED 2000: 78-83
12EELuca Benini, Giuliano Castelli, Alberto Macii, Enrico Macii, Riccardo Scarsi: Battery-Driven Dynamic Power Management of Portable Systems. ISSS 2000: 25-33
11EELuca Benini, Alberto Macii, Enrico Macii, Massimo Poncino: Increasing Energy Efficiency of Embedded Systems by Application-Specific Memory Hierarchy Generation. IEEE Design & Test of Computers 17(2): 74-85 (2000)
10EELuca Benini, Giovanni De Micheli, Alberto Macii, Enrico Macii, Massimo Poncino, Riccardo Scarsi: Glitch power minimization by selective gate freezing. IEEE Trans. VLSI Syst. 8(3): 287-298 (2000)
9EELuca Benini, Alberto Macii, Massimo Poncino, Riccardo Scarsi: Architectures and synthesis algorithms for power-efficient businterfaces. IEEE Trans. on CAD of Integrated Circuits and Systems 19(9): 969-980 (2000)
1999
8EELuca Benini, Alberto Macii, Enrico Macii, Massimo Poncino, Riccardo Scarsi: Synthesis of Low-Overhead Interfaces for Power-Efficient Communication over Wide Buses. DAC 1999: 128-133
7EELuca Benini, Giovanni De Micheli, Alberto Macii, Enrico Macii, Massimo Poncino, Riccardo Scarsi: Glitch Power Minimization by Gate Freezing. DATE 1999: 163-167
6EELuca Benini, Alberto Macii, Enrico Macii, Massimo Poncino: Region Compression: A New Scheme for Memory Energy Minimization in Embedded Systems. EUROMICRO 1999: 1311-1317
5EEAlberto Macii, Enrico Macii, Giuseppe Odasso, Massimo Poncino, Riccardo Scarsi: Regression-Based Macromodeling for Delay Estimation of Behavioral Components. Great Lakes Symposium on VLSI 1999: 188-191
4EELuca Benini, Alberto Macii, Enrico Macii, Massimo Poncino: Selective instruction compression for memory energy reduction in embedded systems. ISLPED 1999: 206-211
1998
3EELuca Benini, Giovanni De Micheli, Alberto Macii, Enrico Macii, Massimo Poncino: Reducing Power Consumption of Dedicated Processors Through Instruction Set Encoding. Great Lakes Symposium on VLSI 1998: 8-12
2EEFabrizio Ferrandi, Alberto Macii, Enrico Macii, Massimo Poncino, Riccardo Scarsi, Fabio Somenzi: Symbolic algorithms for layout-oriented synthesis of pass transistor logic circuits. ICCAD 1998: 235-241
1EEAlberto Macii, Enrico Macii, Massimo Poncino, Riccardo Scarsi: Stream synthesis for efficient power simulation based on spectral transforms. ISLPED 1998: 30-35

Coauthor Index

1Pietro Babighian [42] [46] [50]
2Luca Benini [3] [4] [6] [7] [8] [9] [10] [11] [12] [13] [14] [15] [16] [17] [19] [20] [21] [22] [23] [24] [25] [26] [27] [28] [30] [31] [32] [34] [35] [39] [40] [41] [42] [43] [46] [48] [50] [53] [55] [56] [57]
3Davide Bruni [27] [28] [31] [34] [41]
4Maurizio Bruno [33]
5Andrea Calimera [55] [56]
6Giuliano Castelli [12] [14] [17] [19] [21]
7Ashutosh Chakraborty [47] [48] [49] [51]
8Fabrizio Crudo [37]
9Monica Donno [29]
10Karthik Duraisami [47] [48] [49] [51] [54]
11Fabrizio Ferrandi [2]
12Marco Ferrero [16]
13Angelo Galati [35]
14Alessandro Ivaldi [43]
15Luca Macchiarulo [22] [24] [29]
16Enrico Macii [1] [2] [3] [4] [5] [6] [7] [8] [10] [11] [12] [14] [15] [16] [17] [18] [21] [22] [23] [25] [26] [27] [28] [29] [30] [31] [34] [35] [36] [37] [38] [39] [40] [41] [42] [43] [44] [45] [46] [47] [48] [49] [50] [51] [52] [53] [54] [55] [56] [57]
17Giovanni De Micheli [3] [7] [10]
18Alberto Nannarelli [20]
19Giuseppe Odasso [5]
20Elvira Omerbegovic [39] [40]
21Massimo Poncino [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [13] [14] [15] [16] [17] [18] [21] [22] [23] [24] [26] [29] [30] [31] [32] [33] [35] [36] [38] [39] [40] [47] [48] [49] [51] [53] [54] [55] [56] [57]
22Fabrizio Pro [39] [40]
23Antonio Pullini [53] [56] [57]
24Bruno Riccò [27]
25A. Sathanur [54] [55]
26Ashoka Visweswara Sathanur [47] [48] [49] [53] [56] [57]
27Riccardo Scarsi [1] [2] [5] [7] [8] [9] [10] [12] [14] [17] [18] [19] [21] [30]
28Prassanna Sithambaram [44] [45] [47] [48] [49] [51] [52] [54]
29Fabio Somenzi [2]
30Roberto Zafalon [37]

Copyright © Thu Jun 5 07:42:39 2008 by Michael Ley (ley@uni-trier.de)