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Hi-Keung Tony Ma Vis

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*2008
24EESambuddha Bhattacharya, Shabbir H. Batterywala, Subramanian Rajagopalan, Hi-Keung Tony Ma, Narendra V. Shenoy: On Efficient and Robust Constraint Generation for Practical Layout Legalization. ISQED 2008: 379-384
23EEShabbir H. Batterywala, Sambuddha Bhattacharya, Subramanian Rajagopalan, Hi-Keung Tony Ma, Narendra V. Shenoy: Cell Swapping Based Migration Methodology for Analog and Custom Layouts. ISQED 2008: 450-455
2005
22EEEduard Cerny, Ashvin Dsouza, Kevin Harer, Pei-Hsin Ho, Hi-Keung Tony Ma: Supporting sequential assumptions in hybrid verification. ASP-DAC 2005: 1035-1038
2002
21EEDemos Anastasakis, Robert F. Damiano, Hi-Keung Tony Ma, Ted Stanion: A practical and efficient method for compare-point matching. DAC 2002: 305-310
2001
20EEDong Wang, Pei-Hsin Ho, Jiang Long, James H. Kukula, Yunshan Zhu, Hi-Keung Tony Ma, Robert F. Damiano: Formal Property Verification by Abstraction Refinement with Formal, Simulation and Hybrid Engines. DAC 2001: 35-40
1999
19EENarendra V. Shenoy, Mahesh A. Iyer, Robert F. Damiano, Kevin Harer, Hi-Keung Tony Ma, Paul Thilking: A Robust Solution to the Timing Convergence Problem in High-Performance Design. ICCD 1999: 250-257
1993
18EEKwang-Ting Cheng, Hi-Keung Tony Ma: On the over-specification problem in sequential ATPG algorithms. IEEE Trans. on CAD of Integrated Circuits and Systems 12(10): 1599-1604 (1993)
1992
17EEKwang-Ting Cheng, Hi-Keung Tony Ma: On the Over-Specification Problem in Sequential ATPG Algorithms. DAC 1992: 16-21
1990
16EESrinivas Devadas, Hi-Keung Tony Ma, A. Richard Newton, Alberto L. Sangiovanni-Vincentelli: Irredundant sequential machines via optimal logic synthesis. IEEE Trans. on CAD of Integrated Circuits and Systems 9(1): 8-18 (1990)
15EESrinivas Devadas, Hi-Keung Tony Ma: Easily testable PLA-based finite state machines. IEEE Trans. on CAD of Integrated Circuits and Systems 9(6): 604-611 (1990)
14EESrinivas Devadas, Hi-Keung Tony Ma, A. Richard Newton: Redundancies and don't cares in sequential logic synthesis. J. Electronic Testing 1(1): 15-30 (1990)
1989
13 Srinivas Devadas, Hi-Keung Tony Ma, A. Richard Newton: Redundancies and Don't Cares in Sequential Logic Synthesis. ITC 1989: 491-500
12EESrinivas Devadas, Hi-Keung Tony Ma, A. Richard Newton, Alberto L. Sangiovanni-Vincentelli: A synthesis and optimization procedure for fully and easily testable sequential machines. IEEE Trans. on CAD of Integrated Circuits and Systems 8(10): 1100-1107 (1989)
11EEHi-Keung Tony Ma, Srinivas Devadas, Ruey-Sing Wei, Alberto L. Sangiovanni-Vincentelli: Logic verification algorithms and their parallel implementation. IEEE Trans. on CAD of Integrated Circuits and Systems 8(2): 181-189 (1989)
1988
10 Srinivas Devadas, Hi-Keung Tony Ma, A. Richard Newton, Alberto L. Sangiovanni-Vincentelli: Synthesis and Optimization Procedures for Fully and Easily Testable Sequential Machines. ITC 1988: 621-630
9 Hi-Keung Tony Ma, A. Richard Newton, Srinivas Devadas, Alberto L. Sangiovanni-Vincentelli: An Incomplete Scan Design Approach to Test Generation for Sequential Machines. ITC 1988: 730-734
8EEHi-Keung Tony Ma, Srinivas Devadas, A. Richard Newton, Alberto L. Sangiovanni-Vincentelli: Test generation for sequential circuits. IEEE Trans. on CAD of Integrated Circuits and Systems 7(10): 1081-1093 (1988)
7EESrinivas Devadas, Hi-Keung Tony Ma, A. Richard Newton, Alberto L. Sangiovanni-Vincentelli: MUSTANG: state assignment of finite state machines targeting multilevel logic implementations. IEEE Trans. on CAD of Integrated Circuits and Systems 7(12): 1290-1300 (1988)
6EEDouglas Braun, Jeffrey L. Burns, Fabio Romeo, Alberto L. Sangiovanni-Vincentelli, Kartikeya Mayaram, Srinivas Devadas, Hi-Keung Tony Ma: Techniques for multilayer channel routing. IEEE Trans. on CAD of Integrated Circuits and Systems 7(6): 698-712 (1988)
5EESrinivas Devadas, Hi-Keung Tony Ma, A. Richard Newton: On the verification of sequential machines at differing levels of abstraction. IEEE Trans. on CAD of Integrated Circuits and Systems 7(6): 713-722 (1988)
1987
4EESrinivas Devadas, Hi-Keung Tony Ma, A. Richard Newton: On the Verification of Sequential Machines at Differing Levels of Abstraction. DAC 1987: 271-276
3EEHi-Keung Tony Ma, Srinivas Devadas, Alberto L. Sangiovanni-Vincentelli, R. Wei: Logic Verification Algorithms and Their Parallel Implementation. DAC 1987: 283-290
1986
2EEDouglas Braun, Jeffrey L. Burns, Srinivas Devadas, Hi-Keung Tony Ma, Kartikeya Mayaram, Fabio Romeo, Alberto L. Sangiovanni-Vincentelli: Chameleon: a new multi-layer channel router. DAC 1986: 495-502
1EEHi-Keung Tony Ma, Alberto L. Sangiovanni-Vincentelli: Mixed-level fault coverage estimation. DAC 1986: 553-559

Coauthor Index

1Demos Anastasakis [21]
2Shabbir H. Batterywala [23] [24]
3Sambuddha Bhattacharya [23] [24]
4Douglas Braun [2] [6]
5Jeffrey L. Burns [2] [6]
6Eduard Cerny [22]
7Kwang-Ting Cheng (Kwang-Ting (Tim) Cheng) [17] [18]
8Robert F. Damiano [19] [20] [21]
9Srinivas Devadas [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] [13] [14] [15] [16]
10Ashvin Dsouza [22]
11Kevin Harer [19] [22]
12Pei-Hsin Ho [20] [22]
13Mahesh A. Iyer [19]
14James H. Kukula [20]
15Jiang Long [20]
16Kartikeya Mayaram [2] [6]
17A. Richard Newton [4] [5] [7] [8] [9] [10] [12] [13] [14] [16]
18Subramanian Rajagopalan [23] [24]
19Fabio Romeo [2] [6]
20Alberto L. Sangiovanni-Vincentelli [1] [2] [3] [6] [7] [8] [9] [10] [11] [12] [16]
21Narendra V. Shenoy [19] [23] [24]
22Ted Stanion [21]
23Paul Thilking [19]
24Dong Wang [20]
25R. Wei [3]
26Ruey-Sing Wei [11]
27Yunshan Zhu [20]

Copyright © Tue Nov 3 08:52:44 2009 by Michael Ley (ley@uni-trier.de)