| |
| * | 2009 | |
|---|---|---|
| 2 | EE | Yifei Luo, Gang Chen, Kuan Zhou: A picosecond TDC architecture for multiphase PLLs. ACM Great Lakes Symposium on VLSI 2009: 437-440 |
| 2006 | ||
| 1 | EE | Kuan Zhou, Yifei Luo, Sizhong Chen, A. Drake, John F. McDonald, Tong Zhang: Triple-rail MOS current mode logic for high-speed self-timed pipeline applications. ISCAS 2006 |
| 1 | Gang Chen | [2] |
| 2 | Sizhong Chen | [1] |
| 3 | A. Drake | [1] |
| 4 | John F. McDonald | [1] |
| 5 | Tong Zhang | [1] |
| 6 | Kuan Zhou | [1] [2] |