Zhonghai Lu Vis

*	2009
19	EE	Yue Qian, Zhonghai Lu, Wenhua Dou: Analysis of communication delay bounds for network on chips. ASP-DAC 2009: 7-12
18	EE	Yue Qian, Zhonghai Lu, Wenhua Dou: Applying network calculus for performance analysis of self-similar traffic in on-chip networks. CODES+ISSS 2009: 453-460
17	EE	Zhonghai Lu, Mikael Millberg, Axel Jantsch, Alistair C. Bruce, Pieter van der Wolf, Tomas Henriksson: Flow regulation for on-chip communication. DATE 2009: 578-581
	2008
16	EE	Zhonghai Lu, Lei Xia, Axel Jantsch: Cluster-based Simulated Annealing for Mapping Cores onto 2D Mesh Networks on Chip. DDECS 2008: 92-97
15	EE	Ming Liu, Wolfgang Kuehn, Zhonghai Lu, Axel Jantsch: System-on-an-FPGA Design for Real-time Particle Track Recognition and Reconstruction in Physics Experiments. DSD 2008: 599-605
14	EE	Ming Liu, Johannes Lang, Shuo Yang, Tiago Perez, Wolfgang Kuehn, Hao Xu, Dapeng Jin, Qiang Wang, Lu Li, Zhen'An Liu, Zhonghai Lu, Axel Jantsch: ATCA-based computation platform for data acquisition and triggering in particle physics experiments. FPL 2008: 287-292
13	EE	Zhonghai Lu, Axel Jantsch: TDM Virtual-Circuit Configuration for Network-on-Chip. IEEE Trans. VLSI Syst. 16(8): 1021-1034 (2008)
	2007
12	EE	Zhonghai Lu, Ming Liu, Axel Jantsch: Layered Switching for Networks on Chip. DAC 2007: 122-127
11	EE	Huimin She, Zhonghai Lu, Axel Jantsch, Li-Rong Zheng, Dian Zhou: Traffic Splitting with Network Calculus for Mesh Sensor Networks. FGCN (2) 2007: 368-373
10	EE	Zhonghai Lu, Axel Jantsch: Slot allocation using logical networks for TDM virtual-circuit configuration for network-on-chip. ICCAD 2007: 18-25
9	EE	Zhonghai Lu, Jonas Sicking, Ingo Sander, Axel Jantsch: Using Synchronizers for Refining Synchronous Communication onto Hardware/Software Architectures. IEEE International Workshop on Rapid System Prototyping 2007: 143-149
	2006
8	EE	Zhonghai Lu, Mingchen Zhong, Axel Jantsch: Evaluation of on-chip networks using deflection routing. ACM Great Lakes Symposium on VLSI 2006: 296-301
7	EE	Zhonghai Lu, Ingo Sander, Axel Jantsch: Towards Performance-Oriented Pattern-Based Refinement of Synchronous Models onto NoC Communication. DSD 2006: 37-44
6	EE	Zhonghai Lu, Bei Yin, Axel Jantsch: Connection-oriented Multicasting in Wormhole-switched Networks on Chip. ISVLSI 2006: 205-2110
	2005
5	EE	Zhonghai Lu, Axel Jantsch, Ingo Sander: Feasibility analysis of messages for on-chip networks using wormhole routing. ASP-DAC 2005: 960-964
4	EE	Zhonghai Lu, Ingo Sander, Axel Jantsch: Refinement of Perfectly Synchronous Communication Model. FDL 2005: 453-465
3	EE	Zhonghai Lu, Axel Jantsch: Traffic Configuration for Evaluating Networks on Chips. IWSOC 2005: 535-540
	2003
2	EE	Ingo Sander, Axel Jantsch, Zhonghai Lu: Development and Application of Design Transformations in ForSyDe. DATE 2003: 10364-10369
	2002
1	EE	Ingo Sander, Axel Jantsch, Zhonghai Lu: A Case Study of Hardware and Software Synthesis in ForSyDe. ISSS 2002: 86-91

Coauthor Index

1	Alistair C. Bruce	[17]
2	Wenhua Dou	[18] [19]
3	Tomas Henriksson	[17]
4	Axel Jantsch	[1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] [13] [14] [15] [16] [17]
5	Dapeng Jin	[14]
6	Wolfgang Kuehn	[14] [15]
7	Johannes Lang	[14]
8	Lu Li	[14]
9	Ming Liu	[12] [14] [15]
10	Zhen'An Liu	[14]
11	Mikael Millberg	[17]
12	Tiago Perez	[14]
13	Yue Qian	[18] [19]
14	Ingo Sander	[1] [2] [4] [5] [7] [9]
15	Huimin She	[11]
16	Jonas Sicking	[9]
17	Qiang Wang	[14]
18	Pieter van der Wolf	[17]
19	Lei Xia	[16]
20	Hao Xu	[14]
21	Shuo Yang	[14]
22	Bei Yin	[6]
23	Li-Rong Zheng	[11]
24	Mingchen Zhong	[8]
25	Dian Zhou	[11]

Colors in the list of coauthors