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Chia-Tien Dan Lo Vis

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*2009
30EEWen-Jyi Hwang, Huang-Chun Roan, Ying-Nan Shih, Chia-Tien Dan Lo, Chien-Min Ou: FPGA-based ROM-free network intrusion detection using shift-OR circuit. J. Embedded Computing 3(2): 99-107 (2009)
2008
29EEChia-Tien Dan Lo, Yi-Gang Tai: Highly Space Efficient Counters for Perl Compatible Regular Expressions in FPGAs. ARC 2008: 51-62
28EEYi-Gang Tai, Chia-Tien Dan Lo, Kleanthis Psarris: Accelerating matrix decomposition with replications. IPDPS 2008: 1-8
27EEChia-Tien Dan Lo, Yi-Gang Tai, Kleanthis Psarris: Hardware implementation for network intrusion detection rules with regular expression support. SAC 2008: 1535-1539
26EEHuang-Chun Roan, Wen-Jyi Hwang, Wei-Jhih Huang, Chia-Tien Dan Lo: Network Intrusion Detection Based on Shift-OR Circuit. J. Inf. Sci. Eng. 24(4): 1229-1239 (2008)
2007
25EEMayumi Kato, Chia-Tien Dan Lo: Compression for Low Power Consumption in Battery-powered Handsets. DCC 2007: 386
24EEYi-Gang Tai, Chia-Tien Dan Lo, Kleanthis Psarris: Applying Out-of-Core QR Decomposition Algorithms on FPGA-Based Systems. FPL 2007: 86-91
23EEChia-Tien Dan Lo, J. Morris Chang: FPGA-based reconfigurable computing III. Microprocessors and Microsystems 31(8): 475-476 (2007)
2006
22EEHuang-Chun Roan, Chien-Min Ou, Wen-Jyi Hwang, Chia-Tien Dan Lo: Efficient Logic Circuit for Network Intrusion Detection. EUC 2006: 776-784
21EEHuang-Chun Roan, Wen-Jyi Hwang, Chia-Tien Dan Lo: Shift-Or Circuit for Efficient Network Intrusion Detection Pattern Matching. FPL 2006: 1-6
2005
20EEMayumi Kato, Chia-Tien Dan Lo: Hardware Solution to Java Compressed Heap. FCCM 2005: 307-308
19EEMayumi Kato, Chia-Tien Dan Lo: Impact of Java Compressed Heap on Mobile/Wireless Communication. ITCC (2) 2005: 2-7
2004
18EEMayumi Kato, Chia-Tien Dan Lo: Growing adaptation of computer science in Bioinfomatics. ISICT 2004: 226-231
17EEMayumi Kato, Chia-Tien Dan Lo: A heap de/compression module for wireless Java. PPPJ 2004: 91-99
16EEChia-Tien Dan Lo, Witawas Srisa-an, J. Morris Chang: The design and analysis of a quantitative simulator for dynamic memory management Journal of Systems and Software 72(3): 443-453 (2004)
2003
15EEChia-Tien Dan Lo: The Design of a Self-Maintained Memory Module for Real-Time Systems. IWSOC 2003: 337-342
14EEWitawas Srisa-an, Chia-Tien Dan Lo, J. Morris Chang: Active Memory Processor: A Hardware Garbage Collector for Real-Time Java Embedded Devices. IEEE Trans. Mob. Comput. 2(2): 89-101 (2003)
2002
13EEWitawas Srisa-an, Chia-Tien Dan Lo, J. Morris Chang: Performance Enhancements to the Active Memory System. ICCD 2002: 249-
12EEChia-Tien Dan Lo, Witawas Srisa-an, J. Morris Chang: A Multithreaded Concurrent Garbage Collector Parallelizing the New Instruction in Java. IPDPS 2002
11EEChia-Tien Dan Lo, J. Morris Chang, Ophir Frieder, David A. Grossman: The Object Behavior of Java Object-Oriented Database Management Systems. ITCC 2002: 247-253
10EEJ. Morris Chang, Witawas Srisa-an, Chia-Tien Dan Lo, Edward F. Gehringer: DMMX: Dynamic memory management extensions. Journal of Systems and Software 63(3): 187-199 (2002)
9EEWitawas Srisa-an, Chia-Tien Dan Lo, J. Morris Chang: Object resizing and reclamation through the use of hardware bit-maps. Microprocessors and Microsystems 25(9-10): 459-467 (2002)
8EEWitawas Srisa-an, Chia-Tien Dan Lo, J. Morris Chang: A performance perspective on the Active Memory System. Microprocessors and Microsystems 26(9-10): 421-432 (2002)
2001
7 Witawas Srisa-an, Chia-Tien Dan Lo, J. Morris Chang: A Performance Analysis of the Active Memory System. ICCD 2001: 493-496
6EEChia-Tien Dan Lo, Witawas Srisa-an, J. Morris Chang: A study of page replacement performance in garbage collection heap. Journal of Systems and Software 58(3): 235-245 (2001)
2000
5EEWitawas Srisa-an, Chia-Tien Dan Lo, J. Morris Chang: Scalable Hardware-Algorithm for Mark-Sweep Garbage Collection. EUROMICRO 2000: 1274-1281
4EEJ. Morris Chang, Witawas Srisa-an, Chia-Tien Dan Lo: Architectural Support for Dynamic Memory Management. ICCD 2000: 99-104
3EEWitawas Srisa-an, Chia-Tien Dan Lo, J. Morris Chang: A hardware implementation of realloc function. Integration 28(2): 173-184 (2000)
1999
2 Farn Wang, Chia-Tien Dan Lo: Procedure-Level Verification of Real-time Concurrent Systems. Real-Time Systems 16(1): 81-114 (1999)
1996
1EEFarn Wang, Chia-Tien Dan Lo: Procedure-Level Verification of Real-time Concurrent Systems. FME 1996: 682-701

Coauthor Index

1J. Morris Chang [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] [13] [14] [16] [23]
2Ophir Frieder [11]
3Edward F. Gehringer [10]
4David A. Grossman [11]
5Wei-Jhih Huang [26]
6Wen-Jyi Hwang [21] [22] [26] [30]
7Mayumi Kato [17] [18] [19] [20] [25]
8Chien-Min Ou [22] [30]
9Kleanthis Psarris [24] [27] [28]
10Huang-Chun Roan [21] [22] [26] [30]
11Ying-Nan Shih [30]
12Witawas Srisa-an [3] [4] [5] [6] [7] [8] [9] [10] [12] [13] [14] [16]
13Yi-Gang Tai [24] [27] [28] [29]
14Farn Wang [1] [2]

Colors in the list of coauthors

Copyright © Tue Nov 3 08:52:44 2009 by Michael Ley (ley@uni-trier.de)