| |
| * | 1991 | |
|---|---|---|
| 2 | EE | Paul de Dood, John Wawrzynek, Erwin Liu, Roberto Suaya: A Two-Dimensional Topological Compactor With Octagonal Geometry. DAC 1991: 727-731 |
| 1990 | ||
| 1 | EE | John Valainis, Sinan Kaptanoglu, Erwin Liu, Roberto Suaya: Two-dimensional IC layout compaction based on topological design rule checking. IEEE Trans. on CAD of Integrated Circuits and Systems 9(3): 260-275 (1990) |
| 1 | Paul de Dood | [2] |
| 2 | Sinan Kaptanoglu | [1] |
| 3 | Roberto Suaya | [1] [2] |
| 4 | John Valainis | [1] |
| 5 | John Wawrzynek | [2] |