Christian Landrault

2008
55	EE	Alexandre Rousset, Alberto Bosio, Patrick Girard, Christian Landrault, Serge Pravossoudovitch, Arnaud Virazel: Improving Diagnosis Resolution without Physical Information. DELTA 2008: 210-215
2007
54	EE	A. Ney, Patrick Girard, Christian Landrault, Serge Pravossoudovitch, Arnaud Virazel, Magali Bastian: Slow write driver faults in 65nm SRAM technology: analysis and March test solution. DATE 2007: 528-533
53		Alexandre Rousset, Alberto Bosio, Patrick Girard, Christian Landrault, Serge Pravossoudovitch, Arnaud Virazel: A Mixed Approach for Unified Logic Diagnosis. DDECS 2007: 239-242
52	EE	Alexandre Rousset, Alberto Bosio, Patrick Girard, Christian Landrault, Serge Pravossoudovitch, Arnaud Virazel: DERRIC: A Tool for Unified Logic Diagnosis. European Test Symposium 2007: 13-20
51	EE	O. Ginez, Jean Michel Daga, Patrick Girard, Christian Landrault, Serge Pravossoudovitch, Arnaud Virazel: Electrical Simulation Model of the 2T-FLOTOX Core-Cell for Defect Injection and Faulty Behavior Prediction in eFlash Memories. European Test Symposium 2007: 77-84
50	EE	A. Ney, Patrick Girard, Christian Landrault, Serge Pravossoudovitch, Arnaud Virazel, Magali Bastian: Dynamic Two-Cell Incorrect Read Fault Due to Resistive-Open Defects in the Sense Amplifiers of SRAMs. European Test Symposium 2007: 97-104
49	EE	A. Ney, Patrick Girard, Christian Landrault, Serge Pravossoudovitch, Arnaud Virazel, Magali Bastian: Un-Restored Destructive Write Faults Due to Resistive-Open Defects in the Write Driver of SRAMs. VTS 2007: 361-368
48	EE	O. Ginez, Jean Michel Daga, Patrick Girard, Christian Landrault, Serge Pravossoudovitch, Arnaud Virazel: Retention and Reliability Problems in Embedded Flash Memories: Analysis and Test of Defective 2T-FLOTOX Tunnel Window. VTS 2007: 47-52
2006
47	EE	Nabil Badereddine, Patrick Girard, Serge Pravossoudovitch, Christian Landrault, Arnaud Virazel, Hans-Joachim Wunderlich: Structural-Based Power-Aware Assignment of Don't Cares for Peak Power Reduction during Scan Testing. VLSI-SoC 2006: 403-408
46	EE	O. Ginez, Jean Michel Daga, Marylene Combe, Patrick Girard, Christian Landrault, Serge Pravossoudovitch, Arnaud Virazel: An Overview of Failure Mechanisms in Embedded Flash Memories. VTS 2006: 108-113
45	EE	Yannick Bonhomme, Patrick Girard, Loïs Guiller, Christian Landrault, Serge Pravossoudovitch, Arnaud Virazel: A Gated Clock Scheme for Low Power Testing of Logic Cores. J. Electronic Testing 22(1): 89-99 (2006)
2005
44	EE	Nabil Badereddine, Patrick Girard, Arnaud Virazel, Serge Pravossoudovitch, Christian Landrault: Controlling Peak Power Consumption During Scan Testing: Power-Aware DfT and Test Set Perspectives. PATMOS 2005: 540-549
43	EE	Nabil Badereddine, Patrick Girard, Serge Pravossoudovitch, Arnaud Virazel, Christian Landrault: Scan Cell Reordering for Peak Power Reduction during Scan Test Cycles. VLSI-SoC 2005: 267-281
2004
42	EE	Yannick Bonhomme, Patrick Girard, Loïs Guiller, Christian Landrault, Serge Pravossoudovitch, Arnaud Virazel: Design of Routing-Constrained Low Power Scan Chains. DATE 2004: 62-67
41	EE	Yannick Bonhomme, Patrick Girard, Loïs Guiller, Christian Landrault, Serge Pravossoudovitch, Arnaud Virazel: Design of Routing-Constrained Low Power Scan Chains. DELTA 2004: 287-294
2003
40	EE	Yannick Bonhomme, Patrick Girard, Loïs Guiller, Christian Landrault, Serge Pravossoudovitch: Efficient Scan Chain Design for Power Minimization During Scan Testing Under Routing Constraint. ITC 2003: 488-493
2002
39	EE	Yannick Bonhomme, Patrick Girard, Christian Landrault, Serge Pravossoudovitch: Test Power: a Big Issue in Large SOC Designs. DELTA 2002: 447-449
38	EE	Yannick Bonhomme, Patrick Girard, Christian Landrault, Serge Pravossoudovitch: Power Driven Chaining of Flip-Flops in Scan Architectures. ITC 2002: 796-803
37	EE	René David, Patrick Girard, Christian Landrault, Serge Pravossoudovitch, Arnaud Virazel: On Using Efficient Test Sequences for BIST. VTS 2002: 145-152
36	EE	Patrick Girard, Christian Landrault, Serge Pravossoudovitch, Arnaud Virazel, Hans-Joachim Wunderlich: High Defect Coverage with Low-Power Test Sequences in a BIST Environment. IEEE Design & Test of Computers 19(5): 44-52 (2002)
2001
35	EE	Yannick Bonhomme, Patrick Girard, Loïs Guiller, Christian Landrault, Serge Pravossoudovitch: A Gated Clock Scheme for Low Power Scan Testing of Logic ICs or Embedded Cores. Asian Test Symposium 2001: 253-258
34	EE	Yannick Bonhomme, Patrick Girard, Loïs Guiller, Christian Landrault, Serge Pravossoudovitch: A Gated Clock Scheme for Low Power Scan-Based BIST. IOLTW 2001: 87-89
33		David Bernard, Christian Landrault, Pascal Nouet: Interconnect Capacitance Modelling in a VDSM CMOS Technology. VLSI-SOC 2001: 133-144
32		René David, Patrick Girard, Christian Landrault, Serge Pravossoudovitch, Arnaud Virazel: Random Adjacent Sequences: An Efficient Solution for Logic BIST. VLSI-SOC 2001: 413-424
31	EE	Patrick Girard, Loïs Guiller, Christian Landrault, Serge Pravossoudovitch, Hans-Joachim Wunderlich: A Modified Clock Scheme for a Low Power BIST Test Pattern Generator. VTS 2001: 306-311
2000
30	EE	Marie-Lise Flottes, Christian Landrault, A. Petitqueux: Design for sequential testability: an internal state reseeding approach for 100 % fault coverage. Asian Test Symposium 2000: 404-
29	EE	Patrick Girard, Loïs Guiller, Christian Landrault, Serge Pravossoudovitch: An adjacency-based test pattern generator for low power BIST design. Asian Test Symposium 2000: 459-464
28	EE	Patrick Girard, Christian Landrault, Serge Pravossoudovitch, Arnaud Virazel: Comparison between Random and Pseudo-Random Generation for BIST of Delay, Stuck-at and Bridging Faults. IOLTW 2000: 121-126
27		Patrick Girard, Christian Landrault, Loïs Guiller, Serge Pravossoudovitch: Low power BIST design by hypergraph partitioning: methodology and architectures. ITC 2000: 652-661
26	EE	Laurent Bréhélin, Olivier Gascuel, Gilles Caraux, Patrick Girard, Christian Landrault: Hidden Markov and Independence Models with Patterns for Sequential BIST. VTS 2000: 359-368
1999
25	EE	Patrick Girard, Loïs Guiller, Christian Landrault, Serge Pravossoudovitch: Circuit Partitioning for Low Power BIST Design with Minimized Peak Power Consumption. Asian Test Symposium 1999: 89-94
24	EE	A. Toulouse, David Bernard, Christian Landrault, Pascal Nouet: Efficient 3D Modelling for Extraction of Interconnect Capacitances in Deep Submicron Dense Layouts. DATE 1999: 576-580
23	EE	Patrick Girard, Loïs Guiller, Christian Landrault, Serge Pravossoudovitch: A Test Vector Ordering Technique for Switching Activity Reduction During Test Operation. Great Lakes Symposium on VLSI 1999: 24-
22	EE	Patrick Girard, Loïs Guiller, Christian Landrault, Serge Pravossoudovitch, Joan Figueras, Salvador Manich, P. Teixeira, M. Santos: Low-energy BIST design: impact of the LFSR TPG parameters on the weighted switching activity. ISCAS (1) 1999: 110-113
21	EE	Patrick Girard, Loïs Guiller, Christian Landrault, Serge Pravossoudovitch: A Test Vector Inhibiting Technique for Low Energy BIST Design. VTS 1999: 407-412
1998
20	EE	Christophe Fagot, Olivier Gascuel, Patrick Girard, Christian Landrault: A Ring Architecture Strategy for BIST Test Pattern Generation. Asian Test Symposium 1998: 418-423
19	EE	Patrick Girard, Christian Landrault, V. Moreda, Serge Pravossoudovitch, Arnaud Virazel: A BIST Structure to Test Delay Faults in a Scan Environment. Asian Test Symposium 1998: 435-439
1997
18	EE	Marc Perbost, Ludovic Le Lan, Christian Landrault: Automatic Testability Analysis of Boards and MCMs at Chip Level. Asian Test Symposium 1997: 36-41
17	EE	Patrick Girard, Christian Landrault, Serge Pravossoudovitch, D. Severac: A gate resizing technique for high reduction in power consumption. ISLPED 1997: 281-286
16		Christophe Fagot, Patrick Girard, Christian Landrault: On Using Machine Learning for Logic BIST. ITC 1997: 338-346
15	EE	J. Abraham, P. Frankl, Christian Landrault, Meryem Marzouki, Paolo Prinetto, Chantal Robach, Pascale Thévenod-Fosse: Hardware Test: Can We Learn from Software Testing? VTS 1997: 320-321
14	EE	Patrick Girard, Christian Landrault, V. Moreda, Serge Pravossoudovitch: An optimized BIST test pattern generator for delay testing. VTS 1997: 94-100
13	EE	Patrick Girard, Christian Landrault, Serge Pravossoudovitch, D. Severac: A non-iterative gate resizing algorithm for high reduction in power consumption. Integration 24(1): 37-52 (1997)
1996
12		Patrick Girard, Christian Landrault, Serge Pravossoudovitch, B. Rodriguez: A Diagnostic ATPG for Delay Faults Based on Genetic Algorithms. ITC 1996: 286-293
11	EE	S. Cremoux, Christophe Fagot, Patrick Girard, Christian Landrault, Serge Pravossoudovitch: A new test pattern generation method for delay fault testing. VTS 1996: 296-301
1995
10	EE	S. Lavabre, Yves Bertrand, Michel Renovell, Christian Landrault: Test configurations to enhance the testability of sequential circuits. Asian Test Symposium 1995: 160-168
9		Christian Landrault, Marie-Lise Flottes, Bruno Rouzeyre: Is High-Level Test Synthesis Just Design for Test? ITC 1995: 294
8	EE	Patrick Girard, Christian Landrault, Serge Pravossoudovitch, B. Rodriguez: Diagnostic of path and gate delay faults in non-scan sequential circuits. VTS 1995: 380-386
1994
7		D. Dumas, Patrick Girard, Christian Landrault, Serge Pravossoudovitch: Effectiveness of a Variable Sampling Time Strategy for Delay Fault Diagnosis. EDAC-ETC-EUROASIC 1994: 518-523
1993
6		D. Dumas, Patrick Girard, Christian Landrault, Serge Pravossoudovitch: An Implicit Delay-Fault Simulation Method with Approximate Detection Threshold Calculation. ITC 1993: 705-713
1992
5	EE	Patrick Girard, Christian Landrault, Serge Pravossoudovitch: A Novel Approach to Delay-Fault Diagnosis. DAC 1992: 357-360
4	EE	Patrick Girard, Christian Landrault, Serge Pravossoudovitch: Delay-Fault Diagnosis by Critical-Path Tracing. IEEE Design & Test of Computers 9(4): 27-32 (1992)
1980
3		Yves Crouzet, Christian Landrault: Design of Self-Checking MOS-LSI Circuits: Application to a Four-Bit Microprocessor. IEEE Trans. Computers 29(6): 532-537 (1980)
1978
2		Christian Landrault, Jean-Claude Laprie: SURF - A Program for Modeling and Reliability Prediction for Fault-Tolerant Computing Systems. Jerusalem Conference on Information Technology 1978: 17-26
1		Alain Costes, Christian Landrault, Jean-Claude Laprie: Reliability and Availability Models for Maintained Systems Featuring Hardware Failures and Design Faults. IEEE Trans. Computers 27(6): 548-560 (1978)

Coauthor Index

1	J. Abraham	[15]
2	Nabil Badereddine	[43] [44] [47]
3	Magali Bastian	[49] [50] [54]
4	David Bernard	[24] [33]
5	Yves Bertrand	[10]
6	Yannick Bonhomme	[34] [35] [38] [39] [40] [41] [42] [45]
7	Alberto Bosio	[52] [53] [55]
8	Laurent Bréhélin	[26]
9	Gilles Caraux	[26]
10	Marylene Combe	[46]
11	Alain Costes	[1]
12	S. Cremoux	[11]
13	Yves Crouzet	[3]
14	Jean Michel Daga	[46] [48] [51]
15	René David	[32] [37]
16	D. Dumas	[6] [7]
17	Christophe Fagot	[11] [16] [20]
18	Joan Figueras	[22]
19	Marie-Lise Flottes	[9] [30]
20	P. Frankl	[15]
21	Olivier Gascuel	[20] [26]
22	O. Ginez	[46] [48] [51]
23	Patrick Girard	[4] [5] [6] [7] [8] [11] [12] [13] [14] [16] [17] [19] [20] [21] [22] [23] [25] [26] [27] [28] [29] [31] [32] [34] [35] [36] [37] [38] [39] [40] [41] [42] [43] [44] [45] [46] [47] [48] [49] [50] [51] [52] [53] [54] [55]
24	Loïs Guiller	[21] [22] [23] [25] [27] [29] [31] [34] [35] [40] [41] [42] [45]
25	Ludovic Le Lan	[18]
26	Jean-Claude Laprie	[1] [2]
27	S. Lavabre	[10]
28	Salvador Manich	[22]
29	Meryem Marzouki	[15]
30	V. Moreda	[14] [19]
31	A. Ney	[49] [50] [54]
32	Pascal Nouet	[24] [33]
33	Marc Perbost	[18]
34	A. Petitqueux	[30]
35	Serge Pravossoudovitch	[4] [5] [6] [7] [8] [11] [12] [13] [14] [17] [19] [21] [22] [23] [25] [27] [28] [29] [31] [32] [34] [35] [36] [37] [38] [39] [40] [41] [42] [43] [44] [45] [46] [47] [48] [49] [50] [51] [52] [53] [54] [55]
36	Paolo Prinetto	[15]
37	Michel Renovell	[10]
38	Chantal Robach	[15]
39	B. Rodriguez	[8] [12]
40	Alexandre Rousset	[52] [53] [55]
41	Bruno Rouzeyre	[9]
42	M. Santos	[22]
43	D. Severac	[13] [17]
44	P. Teixeira	[22]
45	Pascale Thévenod-Fosse	[15]
46	A. Toulouse	[24]
47	Arnaud Virazel	[19] [28] [32] [36] [37] [41] [42] [43] [44] [45] [46] [47] [48] [49] [50] [51] [52] [53] [54] [55]
48	Hans-Joachim Wunderlich	[31] [36] [47]

Colors in the list of coauthors