| * | 2008 |
| 24 | EE | Pedro Echeverría,
David B. Thomas,
Marisa López-Vallejo,
Wayne Luk:
An FPGA run-time parameterisable Log-Normal Random Number Generator.
ARC 2008: 219-230 |
| 23 | EE | Miguel Angel Sánchez,
Pedro Echeverría,
Francisco Mansilla,
Marisa López-Vallejo:
Designing Highly Parameterized Hardware using xHdl.
FDL 2008: 78-83 |
| 22 | | Angel Fernandez Herrero,
Ignacio Elguezábal,
Marisa López-Vallejo:
A Web-Based Environment Providing Remote Access To FPGA Platforms For Teaching Digital Hardware Design.
e-Learning 2008: 161-165 |
| 21 | EE | José Luis Ayala,
Marisa López-Vallejo,
Carlos A. López-Barrio,
Alexander V. Veidenbaum:
A hardware mechanism to reduce the energy consumption of the register file of in-order architectures.
IJES 3(4): 285-293 (2008) |
| 20 | EE | David Atienza,
Praveen Raghavan,
José Luis Ayala,
Giovanni De Micheli,
Francky Catthoor,
Diederik Verkest,
Marisa López-Vallejo:
Joint hardware-software leakage minimization approach for the register file of VLIW embedded architectures.
Integration 41(1): 38-48 (2008) |
| 2007 |
| 19 | EE | Pablo Ituero,
Gorka Landaburu,
Javier Del Ser,
Marisa López-Vallejo,
Pedro M. Crespo,
Vicente Atxa,
Jon Altuna:
Joint Source-Channel Decoding ASIP Architecture for Sensor Networks.
ICESS 2007: 98-108 |
| 18 | EE | Praveen Raghavan,
José L. Ayala,
David Atienza,
Francky Catthoor,
Giovanni De Micheli,
Marisa López-Vallejo:
Reduction of Register File Delay Due to Process Variability in VLIW Embedded Processors.
ISCAS 2007: 121-124 |
| 17 | EE | Pablo Ituero,
José L. Ayala,
Marisa López-Vallejo:
Leakage-based On-Chip Thermal Sensor for CMOS Technology.
ISCAS 2007: 3327-3330 |
| 16 | EE | José Luis Ayala,
Anya Apavatjrut,
David Atienza,
Marisa López-Vallejo,
Carlos A. López-Barrio:
Thermal Characterization and Thermal Management in Processor-Based Systems.
Power-aware Computing Systems 2007 |
| 15 | EE | José L. Ayala,
Marisa López-Vallejo,
David Atienza,
Praveen Raghavan,
Francky Catthoor,
Diederik Verkest:
Energy-aware compilation and hardware design for VLIW embedded systems.
IJES 3(1/2): 73-82 (2007) |
| 2006 |
| 14 | EE | Pablo Ituero,
Marisa López-Vallejo:
New Schemes in Clustered VLIW Processors Applied to Turbo Decoding.
ASAP 2006: 291-296 |
| 13 | EE | David Atienza,
Praveen Raghavan,
José L. Ayala,
Giovanni De Micheli,
Francky Catthoor,
Diederik Verkest,
Marisa López-Vallejo:
Compiler-Driven Leakage Energy Reduction in Banked Register Files.
PATMOS 2006: 107-116 |
| 2005 |
| 12 | EE | José Luis Ayala,
Marisa López-Vallejo:
Compiler-Driven Power Optimizations in the Register File of Processor-Based Systems.
Power-aware Computing Systems 2005 |
| 11 | EE | José Luis Ayala,
Marisa López-Vallejo:
Integrating functional and power simulation in embedded systems design.
J. Embedded Computing 1(3): 325-340 (2005) |
| 2003 |
| 10 | EE | José L. Ayala,
Marisa Luisa López-Vallejo,
Alexander V. Veidenbaum,
Carlos A. Lopez:
Energy Aware Register File Implementation through Instruction Predecode.
ASAP 2003: 86-96 |
| 9 | EE | Antonio G. Lomeña,
Marisa Luisa López-Vallejo,
Yosinori Watanabe,
Alex Kondratyev:
An Efficient Hash Table Based Approach to Avoid State Space Explosion in History Driven Quasi-Static Scheduling.
DATE 2003: 10428-10435 |
| 8 | EE | José L. Ayala,
Marisa Luisa López-Vallejo:
A Unified Framework for Power-Aware Design of Embedded Systems.
PATMOS 2003: 239-248 |
| 7 | EE | Marisa Luisa López-Vallejo,
Juan Carlos López:
On the hardware-software partitioning problem: System modeling and partitioning techniques.
ACM Trans. Design Autom. Electr. Syst. 8(3): 269-297 (2003) |
| 6 | EE | José L. Ayala,
Alexander V. Veidenbaum,
Marisa Luisa López-Vallejo:
Power-Aware Compilation for Register File Energy Reduction.
International Journal of Parallel Programming 31(6): 451-467 (2003) |
| 2001 |
| 5 | | Marisa Luisa López-Vallejo,
J. M. Fernández Freire,
J. Colás:
ED68K. A design framework for the development of digital systems based on MC68000.
Computers and Education. Towards an Interconnected Society 2001: 215-225 |
| 2000 |
| 4 | EE | Marisa Luisa López-Vallejo,
Jesús Grajal,
Juan Carlos López:
Constraint-Driven System Partitioning.
DATE 2000: 411-416 |
| 1999 |
| 3 | | Marisa Luisa López-Vallejo,
Juan Carlos López,
Carlos Angel Iglesias:
Hardware-Software Partitioning at the Knowledge Level.
Appl. Intell. 10(2-3): 173-184 (1999) |
| 1998 |
| 2 | EE | Marisa Luisa López-Vallejo,
Carlos Angel Iglesias,
Juan Carlos López:
A Knowledge-based System for Hardware-Software Partitioning.
DATE 1998: 914-915 |
| 1 | | Marisa Luisa López-Vallejo,
Carlos Angel Iglesias,
Juan Carlos López:
Applying the Propose&Revise Strategy to the Hardware-Software Partitioning Problem.
IEA/AIE (Vol. 1) 1998: 169-179 |