Sandip Kundu

2008
51	EE	Irith Pomeranz, Sudhakar M. Reddy, Sandip Kundu: On Common-Mode Skewed-Load and Broadside Tests. VLSI Design 2008: 151-156
50	EE	Piet Engelke, Ilia Polian, Michel Renovell, Sandip Kundu, Bharath Seshadri, Bernd Becker: On Detection of Resistive Bridging Defects by Low-Temperature and Low-Voltage Testing. IEEE Trans. on CAD of Integrated Circuits and Systems 27(2): 327-338 (2008)
2007
49	EE	Ashesh Rastogi, Wei Chen, Sandip Kundu: On Estimating Impact of Loading Effect on Leakage Current in Sub-65nm Scaled CMOS Circuits Based on Newton-Raphson Method. DAC 2007: 712-715
48	EE	Kunal P. Ganeshpure, Sandip Kundu: Interactive presentation: Automatic test pattern generation for maximal circuit noise in multiple aggressor crosstalk faults. DATE 2007: 540-545
47	EE	Alodeep Sanyal, Sandip Kundu: On Derating Soft Error Probability Based on Strength Filtering. IOLTS 2007: 152-160
46	EE	Alodeep Sanyal, Kunal P. Ganeshpure, Sandip Kundu: Accelerating Soft Error Rate Testing Through Pattern Selection. IOLTS 2007: 191-193
45	EE	Ashesh Rastogi, Kunal P. Ganeshpure, Sandip Kundu: A Study on Impact of Leakage Current on Dynamic Power. ISCAS 2007: 1069-1072
44	EE	Alodeep Sanyal, Kunal P. Ganeshpure, Sandip Kundu: On Accelerating Soft-Error Detection by Targeted Pattern Generation. ISQED 2007: 723-728
43	EE	Ashesh Rastogi, Wei Chen, Alodeep Sanyal, Sandip Kundu: An Efficient Technique for Leakage Current Estimation in Sub 65nm Scaled CMOS Circuits Based on Loading Effect. VLSI Design 2007: 583-588
42	EE	Ilia Polian, Alejandro Czutro, Sandip Kundu, Bernd Becker: Power Droop Testing. IEEE Design & Test of Computers 24(3): 276-284 (2007)
2006
41	EE	Sandip Kundu: A design for failure analysis (DFFA) technique to ensure incorruptible signatures. DATE 2006: 309-310
40	EE	Kunal P. Ganeshpure, Alodeep Sanyal, Sandip Kundu: A Pattern Generation Technique for Maximizing Power Supply Currents. ICCD 2006
39	EE	Ilia Polian, Alejandro Czutro, Sandip Kundu, Bernd Becker: Power Droop Testing. ICCD 2006
38	EE	Sandip Kundu, Ilia Polian: An Improved Technique for Reducing False Alarms Due to Soft Errors. IOLTS 2006: 105-110
37	EE	Debasis Mitra, Subhasis Bhattacharjee, Susmita Sur-Kolay, Bhargab B. Bhattacharya, Sujit T. Zachariah, Sandip Kundu: Test Pattern Generation for Power Supply Droop Faults. VLSI Design 2006: 343-348
36	EE	Sandip Kundu: TTTC technical forum honoring Sudhakar M. Reddy. IEEE Design & Test of Computers 23(2): 167 (2006)
2005
35	EE	Sandip Kundu, Piet Engelke, Ilia Polian, Bernd Becker: On Detection of Resistive Bridging Defects by Low-Temperature and Low-Voltage Testing. Asian Test Symposium 2005: 266-271
34	EE	Ilia Polian, Sandip Kundu, Jean Marc Galliere, Piet Engelke, Michel Renovell, Bernd Becker: Resistive Bridge Fault Model Evolution from Conventional to Ultra Deep Submicron Technologies. VTS 2005: 343-348
33	EE	Sandip Kundu, Sujit T. Zachariah, Yi-Shing Chang, Chandra Tirumurti: On modeling crosstalk faults. IEEE Trans. on CAD of Integrated Circuits and Systems 24(12): 1909-1915 (2005)
2004
32	EE	Chandra Tirumurti, Sandip Kundu, Susmita Sur-Kolay, Yi-Shing Chang: A Modeling Approach for Addressing Power Supply Switching Noise Related Failures of Integrated Circuit. DATE 2004: 1078-1083
31	EE	Rob A. Rutenbar, Li-C. Wang, Kwang-Ting Cheng, Sandip Kundu: Static statistical timing analysis for latch-based pipeline designs. ICCAD 2004: 468-472
30	EE	Sandip Kundu, T. M. Mak, Rajesh Galivanche: Trends in manufacturing test methods and their implications. ITC 2004: 679-687
29		Rob Aitken, Stefan Eichenberger, Gary Maier, Sandip Kundu, Hank Walker: ITC 2003 Roundtable: Design for Manufacturability. IEEE Design & Test of Computers 21(2): 144-156 (2004)
28	EE	Irith Pomeranz, Sandip Kundu, Sudhakar M. Reddy: Masking of Unknown Output Values during Output Response Compression byUsing Comparison Units. IEEE Trans. Computers 53(1): 83-88 (2004)
27	EE	Irith Pomeranz, Sudhakar M. Reddy, Sandip Kundu: On the characterization and efficient computation of hard-to-detect bridging faults. IEEE Trans. on CAD of Integrated Circuits and Systems 23(12): 1640-1649 (2004)
26	EE	Sandip Kundu: Pitfalls of hierarchical fault simulation. IEEE Trans. on CAD of Integrated Circuits and Systems 23(2): 312-314 (2004)
2003
25	EE	Bill Grundmann, Rajesh Galivanche, Sandip Kundu: Circuit and Platform Design Challenges in Technologies beyond 90nm. DATE 2003: 10044-10049
24	EE	Sujit T. Zachariah, Yi-Shing Chang, Sandip Kundu, Chandra Tirumurti: On Modeling Cross-Talk Faults. DATE 2003: 10490-10495
23	EE	Irith Pomeranz, Sudhakar M. Reddy, Sandip Kundu: On the Characterization of Hard-to-Detect Bridging Faults. DATE 2003: 11012-11019
22	EE	Masao Naruse, Irith Pomeranz, Sudhakar M. Reddy, Sandip Kundu: On-chip Compression of Output Responses with Unknown Values Using LFSR Reseeding. ITC 2003: 1060-1068
2002
21	EE	Irith Pomeranz, Sandip Kundu, Sudhakar M. Reddy: On output response compression in the presence of unknown output values. DAC 2002: 255-258
2001
20	EE	Jing-Jia Liou, Kwang-Ting Cheng, Sandip Kundu, Angela Krstic: Fast Statistical Timing Analysis By Probabilistic Event Propagation. DAC 2001: 661-666
19	EE	Sitaram Yadavalli, Sandip Kundu: On Fault-Simulation Through Embedded Memories On Large Industrial Designs. VLSI Design 2001: 117-121
2000
18	EE	Jing-Jia Liou, Angela Krstic, Kwang-Ting Cheng, Deb Aditya Mukherjee, Sandip Kundu: Performance sensitivity analysis using statistical method and its applications to delay. ASP-DAC 2000: 587-592
1999
17	EE	Sreenivas Mandava, Sreejit Chakravarty, Sandip Kundu: On Detecting Bridges Causing Timing Failures. ICCD 1999: 400-406
1998
16		Anirudh Devgan, Sandip Kundu: Timing Analysis and Optimization: From Devices to Systems (Abstract of Embedded Tutorial). ASP-DAC 1998: 345
15	EE	Sandip Kundu: IDDQ Defect Detection in Deep Submicron CMOS ICs. Asian Test Symposium 1998: 150-152
14	EE	Sandip Kundu: GateMaker: a transistor to gate level model extractor for simulation, automatic test pattern generation and verification. ITC 1998: 372-
1997
13	EE	Anirudh Devgan, Leon Stok, Sandip Kundu: Timing analysis and optimization: from devices to systems (tutorial). ICCAD 1997
1995
12	EE	Vishwani D. Agrawal, Bernard Courtois, Fumiyasu Hirose, Sandip Kundu, Chung-Len Lee, Yinghua Min, P. Pal Chaudhuri: Panel: New Research Problems in the Emerging Test Technology. Asian Test Symposium 1995: 189-
1994
11	EE	Jacob A. Abraham, Sandip Kundu, Janak H. Patel, Manuel A. d'Abreu, Bulent I. Dervisoglu, Marc E. Levitt, Hector R. Sucar, Ron G. Walther: Microprocessor Testing: Which Technique is Best? (Panel). DAC 1994: 294
10	EE	Daniel Brand, Anthony D. Drumm, Sandip Kundu, Prakash Narain: Incremental synthesis. ICCAD 1994: 14-18
9		Sandip Kundu: Multifault Testable Circuits Based on Binary Parity Diagrams. ICCD 1994: 363-366
8	EE	Leendert M. Huisman, Sandip Kundu: Highly Reliable Symmetric Networks. IEEE Trans. Parallel Distrib. Syst. 5(1): 94-97 (1994)
1993
7		Ankan K. Pramanick, Sandip Kundu: Design of Scan-Based Path-Delay-Testable Sequential Circuits. ITC 1993: 962-971
1992
6		Sandip Kundu, Leendert M. Huisman, Indira Nair, Vijay S. Iyengar, Lakshmi N. Reddy: A Small Test Generator for Large Designs. ITC 1992: 30-40
1991
5	EE	Sandip Kundu, Sudhakar M. Reddy, Niraj K. Jha: Design of robustly testable combinational logic circuits. IEEE Trans. on CAD of Integrated Circuits and Systems 10(8): 1036-1048 (1991)
1990
4	EE	Sandip Kundu, Sudhakar M. Reddy: Embedded Totally Self-Checking Checkers: A Practical Design. IEEE Design & Test of Computers 7(4): 5-12 (1990)
3		Sandip Kundu, Sudhakar M. Reddy: On Symmetric Error Correcting and All Unidirectional Error Detecting Codes. IEEE Trans. Computers 39(6): 752-761 (1990)
1989
2	EE	Sandip Kundu: Design of multioutput CMOS combinational logic circuits for robust testability. IEEE Trans. on CAD of Integrated Circuits and Systems 8(11): 1222-1226 (1989)
1988
1		Sandip Kundu, Sudhakar M. Reddy: Robust Tests for Parity Trees. ITC 1988: 680-687

Coauthor Index

1	Jacob A. Abraham	[11]
2	Vishwani D. Agrawal	[12]
3	Rob Aitken	[29]
4	Bernd Becker	[34] [35] [39] [42] [50]
5	Subhasis Bhattacharjee	[37]
6	Bhargab B. Bhattacharya	[37]
7	Daniel Brand	[10]
8	Sreejit Chakravarty	[17]
9	Yi-Shing Chang	[24] [32] [33]
10	P. Pal Chaudhuri	[12]
11	Wei Chen	[43] [49]
12	Kwang-Ting Cheng (Kwang-Ting (Tim) Cheng)	[18] [20] [31]
13	Bernard Courtois	[12]
14	Alejandro Czutro	[39] [42]
15	Bulent I. Dervisoglu	[11]
16	Anirudh Devgan	[13] [16]
17	Anthony D. Drumm	[10]
18	Stefan Eichenberger	[29]
19	Piet Engelke	[34] [35] [50]
20	Rajesh Galivanche	[25] [30]
21	Jean Marc Galliere	[34]
22	Kunal P. Ganeshpure	[40] [44] [45] [46] [48]
23	Bill Grundmann	[25]
24	Fumiyasu Hirose	[12]
25	Leendert M. Huisman	[6] [8]
26	Vijay S. Iyengar	[6]
27	Niraj K. Jha	[5]
28	Angela Krstic	[18] [20]
29	Chung-Len Lee	[12]
30	Marc E. Levitt	[11]
31	Jing-Jia Liou	[18] [20]
32	Gary Maier	[29]
33	T. M. Mak	[30]
34	Sreenivas Mandava	[17]
35	Yinghua Min	[12]
36	Debasis Mitra	[37]
37	Deb Aditya Mukherjee	[18]
38	Indira Nair	[6]
39	Prakash Narain	[10]
40	Masao Naruse	[22]
41	Janak H. Patel	[11]
42	Ilia Polian	[34] [35] [38] [39] [42] [50]
43	Irith Pomeranz	[21] [22] [23] [27] [28] [51]
44	Ankan K. Pramanick	[7]
45	Ashesh Rastogi	[43] [45] [49]
46	Lakshmi N. Reddy	[6]
47	Sudhakar M. Reddy	[1] [3] [4] [5] [21] [22] [23] [27] [28] [51]
48	Michel Renovell	[34] [50]
49	Rob A. Rutenbar	[31]
50	Alodeep Sanyal	[40] [43] [44] [46] [47]
51	Bharath Seshadri	[50]
52	Leon Stok	[13]
53	Hector R. Sucar	[11]
54	Susmita Sur-Kolay	[32] [37]
55	Chandra Tirumurti	[24] [32] [33]
56	Hank Walker	[29]
57	Ron G. Walther	[11]
58	Li-C. Wang	[31]
59	Sitaram Yadavalli	[19]
60	Sujit T. Zachariah	[24] [33] [37]
61	Manuel A. d'Abreu	[11]

Colors in the list of coauthors