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Ramayya Kumar Vis

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*1999
32 Ramayya Kumar: Invited Talk: Practical Use of Formal Verification - Where are we? Where do we go? VLSI Design 1999
1998
31 Sofiène Tahar, Ramayya Kumar: A Practical Methodology for the Formal Verification of RISC Processors. Formal Methods in System Design 13(2): 159-225 (1998)
1997
30EEDirk Eisenbiegler, Ramayya Kumar, Christian Blumenröhr: A constructive approach towards correctness of synthesis-application within retiming. ED&TC 1997: 427-431
1996
29 Ramayya Kumar, Christian Blumenröhr, Dirk Eisenbiegler, Detlef Schmid: Formal Synthesis in Circuit Design - A Classification and Survey. FMCAD 1996: 294-309
28EEDirk Eisenbiegler, Christian Blumenröhr, Ramayya Kumar: Implementation Issues About the Embedding of Existing High Level Synthesis Algorithms in HOL. TPHOLs 1996: 157-172
1995
27 Dirk Eisenbiegler, Ramayya Kumar: Formally embedding existing high level synthesis algorithms. CHARME 1995: 71-83
26EEDirk Eisenbiegler, Ramayya Kumar: An Automata Theory Dedicated towards Formal Circuit Synthesis. TPHOLs 1995: 154-169
25EERamayya Kumar, Thomas Kropf, Klaus Schneider: Formal synthesis of circuits with a simple handshake protocol. VLSI Design 1995: 255-259
24 Sofiène Tahar, Ramayya Kumar: Formal Specification and Verification Techniques for RISC Pipeline Conflicts. Comput. J. 38(2): 111-120 (1995)
1994
23 Ramayya Kumar, Thomas Kropf: Theorem Provers in Circuit Design - Theory, Practice and Experience, Second International Conference, TPCD '94, Bad Herrenalb, Germany, September 26-28, 1994, Proceedings Springer 1994
22 Klaus Schneider, Thomas Kropf, Ramayya Kumar: Control Path Oriented Verification of Sequential Generic Circuits with Control and Data Path. EDAC-ETC-EUROASIC 1994: 648-652
21EERamayya Kumar, Sofiène Tahar: Formal verification of pipeline conflicts in RISC processors. EURO-DAC 1994: 284-289
20 Thomas Kropf, Klaus Schneider, Ramayya Kumar: A Formal Framework for High Level Synthesis. TPCD 1994: 223-238
19EEKlaus Schneider, Ramayya Kumar, Thomas Kropf: Automating Verification by Functional Abstraction at the System Level. TPHOLs 1994: 391-406
18EESofiène Tahar, Ramayya Kumar: Implementational Issues for Verifying RISC-Pipeline Conflicts in HOL. TPHOLs 1994: 424-439
17 Klaus Schneider, Ramayya Kumar, Thomas Kropf: Accelerating Tableaux Proofs Using Compact Representations. Formal Methods in System Design 5(1/2): 145-176 (1994)
1993
16 Thomas Kropf, Ramayya Kumar, Klaus Schneider: Embedding Hardware Verification Within a Commercial Design Framework. CHARME 1993: 242-257
15 Klaus Schneider, Ramayya Kumar, Thomas Kropf: Hardware-Verification using First Order BDDs. CHDL 1993: 45-62
14EEDirk Eisenbiegler, Klaus Schneider, Ramayya Kumar: A Functional Approach for Formalizing Regular Hardware Structures. HUG 1993: 101-114
13EEKlaus Schneider, Ramayya Kumar, Thomas Kropf: Alternative Proof Procedures for Finite-State Machines in Higher-Order Logic. HUG 1993: 213-226
12EESofiène Tahar, Ramayya Kumar: Implementing a Methodology for Formally Verifying RISC Processors in HOL. HUG 1993: 281-294
11EEKlaus Schneider, Ramayya Kumar, Thomas Kropf: Eliminating Higher-Order Quantifiers to Obtain Decision Procedures for Hardware Verification. HUG 1993: 385-398
10 Sofiène Tahar, Ramayya Kumar: Towards a Methodology for the Formal Hierarchical Verification. ICCD 1993: 58-62
9 Ramayya Kumar, Klaus Schneider, Thomas Kropf: Structuring and Automating Hardware Proofs in a Higher-Order Theorem-Proving Environment. Formal Methods in System Design 2(2): 165-223 (1993)
1992
8EEKlaus Schneider, Ramayya Kumar, Thomas Kropf: The FAUST - Prover. CADE 1992: 766-770
7 Klaus Schneider, Ramayya Kumar, Thomas Kropf: Modelling Generic Hardware Structures by Abstract Datatypes. TPHOLs 1992: 165-175
6 Klaus Schneider, Ramayya Kumar, Thomas Kropf: Efficient Representation and Computation of Tableau Proofs. TPHOLs 1992: 39-57
1991
5EEKlaus Schneider, Ramayya Kumar, Thomas Kropf: Automating Most Parts of Hardware Proofs in HOL. CAV 1991: 365-375
4 Ramayya Kumar, Thomas Kropf, Klaus Schneider: Integrating a First-Order Automatic Prover in the HOL Environment. TPHOLs 1991: 170-176
3 Ramayya Kumar, Thomas Kropf, Klaus Schneider: First Steps Towards Automating Hardware Proofs in HOL. TPHOLs 1991: 190-193
2 Klaus Schneider, Ramayya Kumar, Thomas Kropf: Structurein Hardware Proofs: Fist Steps Towards Automation in a Higher-Order Environment. VLSI 1991: 81-90
1989
1 Thomas Wecker, Ramayya Kumar, Wolfgang Rosenstiel, Heinrich Krämer, Michael Neher: CALLAS - ein System zur automatischen Synthese digitaler Schaltungen. Inform., Forsch. Entwickl. 4(1): 37-54 (1989)

Coauthor Index

1Christian Blumenröhr [28] [29] [30]
2Dirk Eisenbiegler [14] [26] [27] [28] [29] [30]
3Heinrich Krämer [1]
4Thomas Kropf [2] [3] [4] [5] [6] [7] [8] [9] [11] [13] [15] [16] [17] [19] [20] [22] [23] [25]
5Michael Neher [1]
6Wolfgang Rosenstiel [1]
7Detlef Schmid [29]
8Klaus Schneider [2] [3] [4] [5] [6] [7] [8] [9] [11] [13] [14] [15] [16] [17] [19] [20] [22] [25]
9Sofiène Tahar [10] [12] [18] [21] [24] [31]
10Thomas Wecker [1]

Colors in the list of coauthors

Copyright © Tue Nov 3 08:52:44 2009 by Michael Ley (ley@uni-trier.de)