| * | 2009 |
| 4 | EE | Tatsuo Nakagawa,
Tatsuji Matsuura,
Eiki Imaizumi,
Junya Kudoh,
Goichi Ono,
Masayuki Miyazaki:
1-GHz Input Bandwidth Under-Sampling A/D Converter with Dynamic Current Reduction Comparator for UWB-IR Receiver.
IEICE Transactions 92-C(6): 835-842 (2009) |
| 2007 |
| 3 | EE | Hao San,
Yoshitaka Jingu,
Hiroki Wada,
Hiroyuki Hagiwara,
Akira Hayakawa,
Haruo Kobayashi,
Tatsuji Matsuura,
Kouichi Yahagi,
Junya Kudoh,
Hideo Nakane,
Masao Hotta,
Toshiro Tsukada,
Koichiro Mashiko,
Atsushi Wada:
A Second-Order Multibit Complex Bandpass DeltaSigmaAD Modulator with I, Q Dynamic Matching and DWA Algorithm.
IEICE Transactions 90-C(6): 1181-1188 (2007) |
| 2006 |
| 2 | EE | Hao San,
Akira Hayakawa,
Yoshitaka Jingu,
Hiroki Wada,
Hiroyuki Hagiwara,
Kazuyuki Kobayashi,
Haruo Kobayashi,
Tatsuji Matsuura,
Kouichi Yahagi,
Junya Kudoh,
Hideo Nakane,
Masao Hotta,
Toshiro Tsukada,
Koichiro Mashiko,
Atsushi Wada:
Complex Bandpass DeltaSigmaAD Modulator Architecture without I, Q-Path Crossing Layout.
IEICE Transactions 89-A(4): 908-915 (2006) |
| 1995 |
| 1 | EE | Junya Kudoh,
Toshiro Takahashi,
Yukio Umada,
Masaharu Kimura,
Shigeru Yamamoto,
Youichi Ito:
A CMOS gate array with dynamic-termination GTL I/O circuits.
ICCD 1995: 25- |