| * | 2009 |
| 9 | EE | M. Maragkakis,
Martin Reczko,
Victor A. Simossis,
P. Alexiou,
Giorgos L. Papadopoulos,
Theodore Dalamagas,
Giorgos Giannopoulos,
Georgios I. Goumas,
Evangelos Koukis,
Kornilios Kourtis,
T. Vergoulis,
Nectarios Koziris,
Timos K. Sellis,
Panayotis Tsanakas,
Artemis G. Hatzigeorgiou:
DIANA-microT web server: elucidating microRNA functions through target prediction.
Nucleic Acids Research 37(Web-Server-Issue): 273-276 (2009) |
| 2008 |
| 8 | EE | Kornilios Kourtis,
Georgios I. Goumas,
Nectarios Koziris:
Optimizing sparse matrix-vector multiplication using index and value compression.
Conf. Computing Frontiers 2008: 87-96 |
| 7 | EE | Kornilios Kourtis,
Georgios I. Goumas,
Nectarios Koziris:
Improving the Performance of Multithreaded Sparse Matrix-Vector Multiplication Using Index and Value Compression.
ICPP 2008: 511-519 |
| 6 | EE | Georgios I. Goumas,
Kornilios Kourtis,
Nikos Anastopoulos,
Vasileios Karakasis,
Nectarios Koziris:
Understanding the Performance of Sparse Matrix-Vector Multiplication.
PDP 2008: 283-292 |
| 5 | EE | Evangelia Athanasaki,
Nikos Anastopoulos,
Kornilios Kourtis,
Nectarios Koziris:
Exploring the performance limits of simultaneous multithreading for memory intensive applications.
The Journal of Supercomputing 44(1): 64-97 (2008) |
| 2007 |
| 4 | EE | Antony Chazapis,
Georgios Tsoukalas,
Georgios Verigakis,
Kornilios Kourtis,
Aristidis Sotiropoulos,
Nectarios Koziris:
Global-scale peer-to-peer file services with DFS.
GRID 2007: 251-258 |
| 2006 |
| 3 | EE | Evangelia Athanasaki,
Nikos Anastopoulos,
Kornilios Kourtis,
Nectarios Koziris:
Exploring the Capacity of a Modern SMT Architecture to Deliver High Scientific Application Performance.
HPCC 2006: 180-189 |
| 2 | EE | Evangelia Athanasaki,
Nikos Anastopoulos,
Kornilios Kourtis,
Nectarios Koziris:
Exploring the Performance Limits of Simultaneous Multithreading for Scientific Codes.
ICPP 2006: 45-54 |
| 2005 |
| 1 | EE | Evangelia Athanasaki,
Kornilios Kourtis,
Nikos Anastopoulos,
Nectarios Koziris:
Tuning Blocked Array Layouts to Exploit Memory Hierarchy in SMT Architectures.
Panhellenic Conference on Informatics 2005: 600-610 |