| |
| 1998 | ||
|---|---|---|
| 4 | EE | Shiu-Kai Chin, Jang Dae Kim: An Instruction Set Process Calculus. FMCAD 1998: 451-468 |
| 1996 | ||
| 3 | EE | Juin-Yeu Joseph Lu, Jang Dae Kim, Shiu-Kai Chin: Hardware Composition with Hardware Flowcharts and Process Algebras. ICECCS 1996: 352- |
| 1995 | ||
| 2 | EE | Anand Chavan, Shiu-Kai Chin, Shahid Ikram, Jang Dae Kim, Juin-Yeu Zu: Extending VLSI design with higher-order logic. ICCD 1995: 85- |
| 1 | Jang Dae Kim, Shiu-Kai Chin: Formal Verification of Serial Pipeline Multipliers. TPHOLs 1995: 229-244 | |
| 1 | Anand Chavan | [2] |
| 2 | Shiu-Kai Chin | [1] [2] [3] [4] |
| 3 | Shahid Ikram | [2] |
| 4 | Juin-Yeu Joseph Lu | [3] |
| 5 | Juin-Yeu Zu | [2] |